pci_eb164.c revision 1.16
1 /* $NetBSD: pci_eb164.c,v 1.16 1998/05/11 23:36:46 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 42 * All rights reserved. 43 * 44 * Author: Chris G. Demetriou 45 * 46 * Permission to use, copy, modify and distribute this software and 47 * its documentation is hereby granted, provided that both the copyright 48 * notice and this permission notice appear in all copies of the 49 * software, derivative works or modified versions, and any portions 50 * thereof, and that both notices appear in supporting documentation. 51 * 52 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 53 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 54 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 55 * 56 * Carnegie Mellon requests users of this software to return to 57 * 58 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 59 * School of Computer Science 60 * Carnegie Mellon University 61 * Pittsburgh PA 15213-3890 62 * 63 * any improvements or extensions that they make and grant Carnegie the 64 * rights to redistribute these changes. 65 */ 66 67 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 68 69 __KERNEL_RCSID(0, "$NetBSD: pci_eb164.c,v 1.16 1998/05/11 23:36:46 thorpej Exp $"); 70 71 #include <sys/types.h> 72 #include <sys/param.h> 73 #include <sys/time.h> 74 #include <sys/systm.h> 75 #include <sys/errno.h> 76 #include <sys/malloc.h> 77 #include <sys/device.h> 78 #include <sys/syslog.h> 79 80 #include <vm/vm.h> 81 82 #include <machine/autoconf.h> 83 84 #include <dev/pci/pcireg.h> 85 #include <dev/pci/pcivar.h> 86 #include <dev/pci/pciidereg.h> 87 #include <dev/pci/pciidevar.h> 88 89 #include <alpha/pci/ciareg.h> 90 #include <alpha/pci/ciavar.h> 91 92 #include <alpha/pci/pci_eb164.h> 93 94 #ifndef EVCNT_COUNTERS 95 #include <machine/intrcnt.h> 96 #endif 97 98 #include "sio.h" 99 #if NSIO 100 #include <alpha/pci/siovar.h> 101 #endif 102 103 int dec_eb164_intr_map __P((void *, pcitag_t, int, int, 104 pci_intr_handle_t *)); 105 const char *dec_eb164_intr_string __P((void *, pci_intr_handle_t)); 106 void *dec_eb164_intr_establish __P((void *, pci_intr_handle_t, 107 int, int (*func)(void *), void *)); 108 void dec_eb164_intr_disestablish __P((void *, void *)); 109 110 void *dec_eb164_pciide_compat_intr_establish __P((void *, struct device *, 111 struct pci_attach_args *, int, int (*)(void *), void *)); 112 113 #define EB164_SIO_IRQ 4 114 #define EB164_MAX_IRQ 24 115 #define PCI_STRAY_MAX 5 116 117 struct alpha_shared_intr *eb164_pci_intr; 118 #ifdef EVCNT_COUNTERS 119 struct evcnt eb164_intr_evcnt; 120 #endif 121 122 bus_space_tag_t eb164_intrgate_iot; 123 bus_space_handle_t eb164_intrgate_ioh; 124 125 void eb164_iointr __P((void *framep, unsigned long vec)); 126 extern void eb164_intr_enable __P((int irq)); /* pci_eb164_intr.S */ 127 extern void eb164_intr_disable __P((int irq)); /* pci_eb164_intr.S */ 128 129 void 130 pci_eb164_pickintr(ccp) 131 struct cia_config *ccp; 132 { 133 bus_space_tag_t iot = &ccp->cc_iot; 134 pci_chipset_tag_t pc = &ccp->cc_pc; 135 int i; 136 137 pc->pc_intr_v = ccp; 138 pc->pc_intr_map = dec_eb164_intr_map; 139 pc->pc_intr_string = dec_eb164_intr_string; 140 pc->pc_intr_establish = dec_eb164_intr_establish; 141 pc->pc_intr_disestablish = dec_eb164_intr_disestablish; 142 143 pc->pc_pciide_compat_intr_establish = 144 dec_eb164_pciide_compat_intr_establish; 145 146 eb164_intrgate_iot = iot; 147 if (bus_space_map(eb164_intrgate_iot, 0x804, 3, 0, 148 &eb164_intrgate_ioh) != 0) 149 panic("pci_eb164_pickintr: couldn't map interrupt PLD"); 150 for (i = 0; i < EB164_MAX_IRQ; i++) 151 eb164_intr_disable(i); 152 153 eb164_pci_intr = alpha_shared_intr_alloc(EB164_MAX_IRQ); 154 for (i = 0; i < EB164_MAX_IRQ; i++) 155 alpha_shared_intr_set_maxstrays(eb164_pci_intr, i, 156 PCI_STRAY_MAX); 157 158 #if NSIO 159 sio_intr_setup(pc, iot); 160 eb164_intr_enable(EB164_SIO_IRQ); 161 #endif 162 163 set_iointr(eb164_iointr); 164 } 165 166 int 167 dec_eb164_intr_map(ccv, bustag, buspin, line, ihp) 168 void *ccv; 169 pcitag_t bustag; 170 int buspin, line; 171 pci_intr_handle_t *ihp; 172 { 173 struct cia_config *ccp = ccv; 174 pci_chipset_tag_t pc = &ccp->cc_pc; 175 int bus, device, function; 176 177 if (buspin == 0) { 178 /* No IRQ used. */ 179 return 1; 180 } 181 if (buspin > 4) { 182 printf("dec_eb164_intr_map: bad interrupt pin %d\n", buspin); 183 return 1; 184 } 185 186 alpha_pci_decompose_tag(pc, bustag, &bus, &device, &function); 187 188 /* 189 * The PCI-ISA bridge lives on device 8 of bus 0. On the AlphaPC 190 * 164SX, this is a Cypress chip with PCI IDE wired to compatibility 191 * mode on functions 1 and 2. There will be no interrupt mapping 192 * for this device, so just bail out now. 193 */ 194 if (bus == 0 && device == 8) { 195 if (function == 0) 196 panic("dec_eb164_intr_map: SIO device"); 197 return (1); 198 } 199 200 /* 201 * The console places the interrupt mapping in the "line" value. 202 * A value of (char)-1 indicates there is no mapping. 203 */ 204 if (line == 0xff) { 205 printf("dec_eb164_intr_map: no mapping for %d/%d/%d\n", 206 bus, device, function); 207 return (1); 208 } 209 210 if (line > EB164_MAX_IRQ) 211 panic("dec_eb164_intr_map: eb164 irq too large (%d)\n", 212 line); 213 214 *ihp = line; 215 return (0); 216 } 217 218 const char * 219 dec_eb164_intr_string(ccv, ih) 220 void *ccv; 221 pci_intr_handle_t ih; 222 { 223 #if 0 224 struct cia_config *ccp = ccv; 225 #endif 226 static char irqstr[15]; /* 11 + 2 + NULL + sanity */ 227 228 if (ih > EB164_MAX_IRQ) 229 panic("dec_eb164_intr_string: bogus eb164 IRQ 0x%x\n", ih); 230 sprintf(irqstr, "eb164 irq %d", ih); 231 return (irqstr); 232 } 233 234 void * 235 dec_eb164_intr_establish(ccv, ih, level, func, arg) 236 void *ccv, *arg; 237 pci_intr_handle_t ih; 238 int level; 239 int (*func) __P((void *)); 240 { 241 #if 0 242 struct cia_config *ccp = ccv; 243 #endif 244 void *cookie; 245 246 if (ih > EB164_MAX_IRQ) 247 panic("dec_eb164_intr_establish: bogus eb164 IRQ 0x%x\n", ih); 248 249 cookie = alpha_shared_intr_establish(eb164_pci_intr, ih, IST_LEVEL, 250 level, func, arg, "eb164 irq"); 251 252 if (cookie != NULL && alpha_shared_intr_isactive(eb164_pci_intr, ih)) 253 eb164_intr_enable(ih); 254 return (cookie); 255 } 256 257 void 258 dec_eb164_intr_disestablish(ccv, cookie) 259 void *ccv, *cookie; 260 { 261 #if 0 262 struct cia_config *ccp = ccv; 263 #endif 264 265 panic("dec_eb164_intr_disestablish not implemented"); /* XXX */ 266 } 267 268 void * 269 dec_eb164_pciide_compat_intr_establish(v, dev, pa, chan, func, arg) 270 void *v; 271 struct device *dev; 272 struct pci_attach_args *pa; 273 int chan; 274 int (*func) __P((void *)); 275 void *arg; 276 { 277 pci_chipset_tag_t pc = pa->pa_pc; 278 void *cookie = NULL; 279 int bus, irq; 280 281 alpha_pci_decompose_tag(pc, pa->pa_tag, &bus, NULL, NULL); 282 283 /* 284 * If this isn't PCI bus #0, all bets are off. 285 */ 286 if (bus != 0) 287 return (NULL); 288 289 irq = PCIIDE_COMPAT_IRQ(chan); 290 #if NSIO 291 cookie = sio_intr_establish(NULL /*XXX*/, irq, IST_EDGE, IPL_BIO, 292 func, arg); 293 #endif 294 return (cookie); 295 } 296 297 void 298 eb164_iointr(framep, vec) 299 void *framep; 300 unsigned long vec; 301 { 302 int irq; 303 304 if (vec >= 0x900) { 305 if (vec >= 0x900 + (EB164_MAX_IRQ << 4)) 306 panic("eb164_iointr: vec 0x%x out of range\n", vec); 307 irq = (vec - 0x900) >> 4; 308 309 #ifdef EVCNT_COUNTERS 310 eb164_intr_evcnt.ev_count++; 311 #else 312 if (EB164_MAX_IRQ != INTRCNT_EB164_IRQ_LEN) 313 panic("eb164 interrupt counter sizes inconsistent"); 314 intrcnt[INTRCNT_EB164_IRQ + irq]++; 315 #endif 316 317 if (!alpha_shared_intr_dispatch(eb164_pci_intr, irq)) { 318 alpha_shared_intr_stray(eb164_pci_intr, irq, 319 "eb164 irq"); 320 if (eb164_pci_intr[irq].intr_nstrays == 321 eb164_pci_intr[irq].intr_maxstrays) 322 eb164_intr_disable(irq); 323 } 324 return; 325 } 326 #if NSIO 327 if (vec >= 0x800) { 328 sio_iointr(framep, vec); 329 return; 330 } 331 #endif 332 panic("eb164_iointr: weird vec 0x%x\n", vec); 333 } 334 335 #if 0 /* THIS DOES NOT WORK! see pci_eb164_intr.S. */ 336 u_int8_t eb164_intr_mask[3] = { 0xff, 0xff, 0xff }; 337 338 void 339 eb164_intr_enable(irq) 340 int irq; 341 { 342 int byte = (irq / 8), bit = (irq % 8); 343 344 #if 1 345 printf("eb164_intr_enable: enabling %d (%d:%d)\n", irq, byte, bit); 346 #endif 347 eb164_intr_mask[byte] &= ~(1 << bit); 348 349 bus_space_write_1(eb164_intrgate_iot, eb164_intrgate_ioh, byte, 350 eb164_intr_mask[byte]); 351 } 352 353 void 354 eb164_intr_disable(irq) 355 int irq; 356 { 357 int byte = (irq / 8), bit = (irq % 8); 358 359 #if 1 360 printf("eb164_intr_disable: disabling %d (%d:%d)\n", irq, byte, bit); 361 #endif 362 eb164_intr_mask[byte] |= (1 << bit); 363 364 bus_space_write_1(eb164_intrgate_iot, eb164_intrgate_ioh, byte, 365 eb164_intr_mask[byte]); 366 } 367 #endif 368
Indexes created Mon Sep 29 21:09:56 GMT 2025