pci_eb164.c revision 1.5
1 /* $NetBSD: pci_eb164.c,v 1.5 1997/04/07 02:01:22 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <machine/options.h> /* Pull in config options headers */ 31 32 #include <sys/types.h> 33 #include <sys/param.h> 34 #include <sys/time.h> 35 #include <sys/systm.h> 36 #include <sys/errno.h> 37 #include <sys/malloc.h> 38 #include <sys/device.h> 39 #include <sys/syslog.h> 40 41 #include <vm/vm.h> 42 43 #include <machine/autoconf.h> 44 45 #include <dev/pci/pcireg.h> 46 #include <dev/pci/pcivar.h> 47 48 #include <alpha/pci/ciareg.h> 49 #include <alpha/pci/ciavar.h> 50 51 #include <alpha/pci/pci_eb164.h> 52 53 #ifndef EVCNT_COUNTERS 54 #include <machine/intrcnt.h> 55 #endif 56 57 #include "sio.h" 58 #if NSIO 59 #include <alpha/pci/siovar.h> 60 #endif 61 62 int dec_eb164_intr_map __P((void *, pcitag_t, int, int, 63 pci_intr_handle_t *)); 64 const char *dec_eb164_intr_string __P((void *, pci_intr_handle_t)); 65 void *dec_eb164_intr_establish __P((void *, pci_intr_handle_t, 66 int, int (*func)(void *), void *)); 67 void dec_eb164_intr_disestablish __P((void *, void *)); 68 69 #define EB164_SIO_IRQ 4 70 #define EB164_MAX_IRQ 24 71 #define PCI_STRAY_MAX 5 72 73 struct alpha_shared_intr *eb164_pci_intr; 74 #ifdef EVCNT_COUNTERS 75 struct evcnt eb164_intr_evcnt; 76 #endif 77 78 bus_space_tag_t eb164_intrgate_iot; 79 bus_space_handle_t eb164_intrgate_ioh; 80 81 void eb164_iointr __P((void *framep, unsigned long vec)); 82 extern void eb164_intr_enable __P((int irq)); /* pci_eb164_intr.S */ 83 extern void eb164_intr_disable __P((int irq)); /* pci_eb164_intr.S */ 84 85 void 86 pci_eb164_pickintr(ccp) 87 struct cia_config *ccp; 88 { 89 bus_space_tag_t iot = ccp->cc_iot; 90 pci_chipset_tag_t pc = &ccp->cc_pc; 91 int i; 92 93 pc->pc_intr_v = ccp; 94 pc->pc_intr_map = dec_eb164_intr_map; 95 pc->pc_intr_string = dec_eb164_intr_string; 96 pc->pc_intr_establish = dec_eb164_intr_establish; 97 pc->pc_intr_disestablish = dec_eb164_intr_disestablish; 98 99 eb164_intrgate_iot = iot; 100 if (bus_space_map(eb164_intrgate_iot, 0x804, 3, 0, 101 &eb164_intrgate_ioh) != 0) 102 panic("pci_eb164_pickintr: couldn't map interrupt PLD"); 103 for (i = 0; i < EB164_MAX_IRQ; i++) 104 eb164_intr_disable(i); 105 106 eb164_pci_intr = alpha_shared_intr_alloc(EB164_MAX_IRQ); 107 for (i = 0; i < EB164_MAX_IRQ; i++) 108 alpha_shared_intr_set_maxstrays(eb164_pci_intr, i, 109 PCI_STRAY_MAX); 110 111 #if NSIO 112 sio_intr_setup(iot); 113 eb164_intr_enable(EB164_SIO_IRQ); 114 #endif 115 116 set_iointr(eb164_iointr); 117 } 118 119 int 120 dec_eb164_intr_map(ccv, bustag, buspin, line, ihp) 121 void *ccv; 122 pcitag_t bustag; 123 int buspin, line; 124 pci_intr_handle_t *ihp; 125 { 126 struct cia_config *ccp = ccv; 127 pci_chipset_tag_t pc = &ccp->cc_pc; 128 int device; 129 int eb164_irq, pinbase, pinoff; 130 131 if (buspin == 0) { 132 /* No IRQ used. */ 133 return 1; 134 } 135 if (buspin > 4) { 136 printf("pci_map_int: bad interrupt pin %d\n", buspin); 137 return 1; 138 } 139 140 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 141 switch (device) { 142 #if 0 /* THIS CODE SHOULD NEVER BE CALLED FOR THE SIO */ 143 case 8: /* SIO */ 144 eb164_irq = 4; 145 break; 146 #endif 147 148 case 11: 149 eb164_irq = 5; /* IDE */ 150 break; 151 152 case 5: 153 case 6: 154 case 7: 155 case 9: 156 switch (buspin) { 157 case 1: 158 pinbase = 0; 159 break; 160 case 2: 161 case 3: 162 case 4: 163 pinbase = (buspin * 4) - 1; 164 break; 165 #ifdef DIAGNOSTIC 166 default: 167 panic("dec_eb164_intr_map: slot buspin switch"); 168 #endif 169 }; 170 switch (device) { 171 case 5: 172 pinoff = 2; 173 break; 174 175 case 6: 176 case 7: 177 case 9: 178 pinoff = device - 6; 179 break; 180 #ifdef DIAGNOSTIC 181 default: 182 panic("dec_eb164_intr_map: slot device switch"); 183 #endif 184 } 185 eb164_irq = pinoff + pinbase; 186 break; 187 default: 188 panic("pci_eb164_map_int: invalid device number %d\n", 189 device); 190 } 191 192 if (eb164_irq > EB164_MAX_IRQ) 193 panic("pci_eb164_map_int: eb164_irq too large (%d)\n", 194 eb164_irq); 195 196 *ihp = eb164_irq; 197 return (0); 198 } 199 200 const char * 201 dec_eb164_intr_string(ccv, ih) 202 void *ccv; 203 pci_intr_handle_t ih; 204 { 205 #if 0 206 struct cia_config *ccp = ccv; 207 #endif 208 static char irqstr[15]; /* 11 + 2 + NULL + sanity */ 209 210 if (ih > EB164_MAX_IRQ) 211 panic("dec_eb164_intr_string: bogus eb164 IRQ 0x%x\n", ih); 212 sprintf(irqstr, "eb164 irq %d", ih); 213 return (irqstr); 214 } 215 216 void * 217 dec_eb164_intr_establish(ccv, ih, level, func, arg) 218 void *ccv, *arg; 219 pci_intr_handle_t ih; 220 int level; 221 int (*func) __P((void *)); 222 { 223 #if 0 224 struct cia_config *ccp = ccv; 225 #endif 226 void *cookie; 227 228 if (ih > EB164_MAX_IRQ) 229 panic("dec_eb164_intr_establish: bogus eb164 IRQ 0x%x\n", ih); 230 231 cookie = alpha_shared_intr_establish(eb164_pci_intr, ih, IST_LEVEL, 232 level, func, arg, "eb164 irq"); 233 234 if (cookie != NULL && alpha_shared_intr_isactive(eb164_pci_intr, ih)) 235 eb164_intr_enable(ih); 236 return (cookie); 237 } 238 239 void 240 dec_eb164_intr_disestablish(ccv, cookie) 241 void *ccv, *cookie; 242 { 243 #if 0 244 struct cia_config *ccp = ccv; 245 #endif 246 247 panic("dec_eb164_intr_disestablish not implemented"); /* XXX */ 248 } 249 250 void 251 eb164_iointr(framep, vec) 252 void *framep; 253 unsigned long vec; 254 { 255 int irq; 256 257 if (vec >= 0x900) { 258 if (vec >= 0x900 + (EB164_MAX_IRQ << 4)) 259 panic("eb164_iointr: vec 0x%x out of range\n", vec); 260 irq = (vec - 0x900) >> 4; 261 262 #ifdef EVCNT_COUNTERS 263 eb164_intr_evcnt.ev_count++; 264 #else 265 if (EB164_MAX_IRQ != INTRCNT_EB164_IRQ_LEN) 266 panic("eb164 interrupt counter sizes inconsistent"); 267 intrcnt[INTRCNT_EB164_IRQ + irq]++; 268 #endif 269 270 if (!alpha_shared_intr_dispatch(eb164_pci_intr, irq)) { 271 alpha_shared_intr_stray(eb164_pci_intr, irq, 272 "eb164 irq"); 273 if (eb164_pci_intr[irq].intr_nstrays == 274 eb164_pci_intr[irq].intr_maxstrays) 275 eb164_intr_disable(irq); 276 } 277 return; 278 } 279 #if NSIO 280 if (vec >= 0x800) { 281 sio_iointr(framep, vec); 282 return; 283 } 284 #endif 285 panic("eb164_iointr: weird vec 0x%x\n", vec); 286 } 287 288 #if 0 /* THIS DOES NOT WORK! see pci_eb164_intr.S. */ 289 u_int8_t eb164_intr_mask[3] = { 0xff, 0xff, 0xff }; 290 291 void 292 eb164_intr_enable(irq) 293 int irq; 294 { 295 int byte = (irq / 8), bit = (irq % 8); 296 297 #if 1 298 printf("eb164_intr_enable: enabling %d (%d:%d)\n", irq, byte, bit); 299 #endif 300 eb164_intr_mask[byte] &= ~(1 << bit); 301 302 bus_space_write_1(eb164_intrgate_iot, eb164_intrgate_ioh, byte, 303 eb164_intr_mask[byte]); 304 } 305 306 void 307 eb164_intr_disable(irq) 308 int irq; 309 { 310 int byte = (irq / 8), bit = (irq % 8); 311 312 #if 1 313 printf("eb164_intr_disable: disabling %d (%d:%d)\n", irq, byte, bit); 314 #endif 315 eb164_intr_mask[byte] |= (1 << bit); 316 317 bus_space_write_1(eb164_intrgate_iot, eb164_intrgate_ioh, byte, 318 eb164_intr_mask[byte]); 319 } 320 #endif 321
Indexes created Sun Sep 28 16:09:52 GMT 2025