pci_eb164.c revision 1.6
1 /* $NetBSD: pci_eb164.c,v 1.6 1997/04/07 23:40:42 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <machine/options.h> /* Config options headers */ 31 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 32 33 __KERNEL_RCSID(0, "$NetBSD: pci_eb164.c,v 1.6 1997/04/07 23:40:42 cgd Exp $"); 34 35 #include <sys/types.h> 36 #include <sys/param.h> 37 #include <sys/time.h> 38 #include <sys/systm.h> 39 #include <sys/errno.h> 40 #include <sys/malloc.h> 41 #include <sys/device.h> 42 #include <sys/syslog.h> 43 44 #include <vm/vm.h> 45 46 #include <machine/autoconf.h> 47 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcivar.h> 50 51 #include <alpha/pci/ciareg.h> 52 #include <alpha/pci/ciavar.h> 53 54 #include <alpha/pci/pci_eb164.h> 55 56 #ifndef EVCNT_COUNTERS 57 #include <machine/intrcnt.h> 58 #endif 59 60 #include "sio.h" 61 #if NSIO 62 #include <alpha/pci/siovar.h> 63 #endif 64 65 int dec_eb164_intr_map __P((void *, pcitag_t, int, int, 66 pci_intr_handle_t *)); 67 const char *dec_eb164_intr_string __P((void *, pci_intr_handle_t)); 68 void *dec_eb164_intr_establish __P((void *, pci_intr_handle_t, 69 int, int (*func)(void *), void *)); 70 void dec_eb164_intr_disestablish __P((void *, void *)); 71 72 #define EB164_SIO_IRQ 4 73 #define EB164_MAX_IRQ 24 74 #define PCI_STRAY_MAX 5 75 76 struct alpha_shared_intr *eb164_pci_intr; 77 #ifdef EVCNT_COUNTERS 78 struct evcnt eb164_intr_evcnt; 79 #endif 80 81 bus_space_tag_t eb164_intrgate_iot; 82 bus_space_handle_t eb164_intrgate_ioh; 83 84 void eb164_iointr __P((void *framep, unsigned long vec)); 85 extern void eb164_intr_enable __P((int irq)); /* pci_eb164_intr.S */ 86 extern void eb164_intr_disable __P((int irq)); /* pci_eb164_intr.S */ 87 88 void 89 pci_eb164_pickintr(ccp) 90 struct cia_config *ccp; 91 { 92 bus_space_tag_t iot = ccp->cc_iot; 93 pci_chipset_tag_t pc = &ccp->cc_pc; 94 int i; 95 96 pc->pc_intr_v = ccp; 97 pc->pc_intr_map = dec_eb164_intr_map; 98 pc->pc_intr_string = dec_eb164_intr_string; 99 pc->pc_intr_establish = dec_eb164_intr_establish; 100 pc->pc_intr_disestablish = dec_eb164_intr_disestablish; 101 102 eb164_intrgate_iot = iot; 103 if (bus_space_map(eb164_intrgate_iot, 0x804, 3, 0, 104 &eb164_intrgate_ioh) != 0) 105 panic("pci_eb164_pickintr: couldn't map interrupt PLD"); 106 for (i = 0; i < EB164_MAX_IRQ; i++) 107 eb164_intr_disable(i); 108 109 eb164_pci_intr = alpha_shared_intr_alloc(EB164_MAX_IRQ); 110 for (i = 0; i < EB164_MAX_IRQ; i++) 111 alpha_shared_intr_set_maxstrays(eb164_pci_intr, i, 112 PCI_STRAY_MAX); 113 114 #if NSIO 115 sio_intr_setup(iot); 116 eb164_intr_enable(EB164_SIO_IRQ); 117 #endif 118 119 set_iointr(eb164_iointr); 120 } 121 122 int 123 dec_eb164_intr_map(ccv, bustag, buspin, line, ihp) 124 void *ccv; 125 pcitag_t bustag; 126 int buspin, line; 127 pci_intr_handle_t *ihp; 128 { 129 struct cia_config *ccp = ccv; 130 pci_chipset_tag_t pc = &ccp->cc_pc; 131 int device; 132 int eb164_irq, pinbase, pinoff; 133 134 if (buspin == 0) { 135 /* No IRQ used. */ 136 return 1; 137 } 138 if (buspin > 4) { 139 printf("pci_map_int: bad interrupt pin %d\n", buspin); 140 return 1; 141 } 142 143 pci_decompose_tag(pc, bustag, NULL, &device, NULL); 144 switch (device) { 145 #if 0 /* THIS CODE SHOULD NEVER BE CALLED FOR THE SIO */ 146 case 8: /* SIO */ 147 eb164_irq = 4; 148 break; 149 #endif 150 151 case 11: 152 eb164_irq = 5; /* IDE */ 153 break; 154 155 case 5: 156 case 6: 157 case 7: 158 case 9: 159 switch (buspin) { 160 case 1: 161 pinbase = 0; 162 break; 163 case 2: 164 case 3: 165 case 4: 166 pinbase = (buspin * 4) - 1; 167 break; 168 #ifdef DIAGNOSTIC 169 default: 170 panic("dec_eb164_intr_map: slot buspin switch"); 171 #endif 172 }; 173 switch (device) { 174 case 5: 175 pinoff = 2; 176 break; 177 178 case 6: 179 case 7: 180 case 9: 181 pinoff = device - 6; 182 break; 183 #ifdef DIAGNOSTIC 184 default: 185 panic("dec_eb164_intr_map: slot device switch"); 186 #endif 187 } 188 eb164_irq = pinoff + pinbase; 189 break; 190 default: 191 panic("pci_eb164_map_int: invalid device number %d\n", 192 device); 193 } 194 195 if (eb164_irq > EB164_MAX_IRQ) 196 panic("pci_eb164_map_int: eb164_irq too large (%d)\n", 197 eb164_irq); 198 199 *ihp = eb164_irq; 200 return (0); 201 } 202 203 const char * 204 dec_eb164_intr_string(ccv, ih) 205 void *ccv; 206 pci_intr_handle_t ih; 207 { 208 #if 0 209 struct cia_config *ccp = ccv; 210 #endif 211 static char irqstr[15]; /* 11 + 2 + NULL + sanity */ 212 213 if (ih > EB164_MAX_IRQ) 214 panic("dec_eb164_intr_string: bogus eb164 IRQ 0x%x\n", ih); 215 sprintf(irqstr, "eb164 irq %d", ih); 216 return (irqstr); 217 } 218 219 void * 220 dec_eb164_intr_establish(ccv, ih, level, func, arg) 221 void *ccv, *arg; 222 pci_intr_handle_t ih; 223 int level; 224 int (*func) __P((void *)); 225 { 226 #if 0 227 struct cia_config *ccp = ccv; 228 #endif 229 void *cookie; 230 231 if (ih > EB164_MAX_IRQ) 232 panic("dec_eb164_intr_establish: bogus eb164 IRQ 0x%x\n", ih); 233 234 cookie = alpha_shared_intr_establish(eb164_pci_intr, ih, IST_LEVEL, 235 level, func, arg, "eb164 irq"); 236 237 if (cookie != NULL && alpha_shared_intr_isactive(eb164_pci_intr, ih)) 238 eb164_intr_enable(ih); 239 return (cookie); 240 } 241 242 void 243 dec_eb164_intr_disestablish(ccv, cookie) 244 void *ccv, *cookie; 245 { 246 #if 0 247 struct cia_config *ccp = ccv; 248 #endif 249 250 panic("dec_eb164_intr_disestablish not implemented"); /* XXX */ 251 } 252 253 void 254 eb164_iointr(framep, vec) 255 void *framep; 256 unsigned long vec; 257 { 258 int irq; 259 260 if (vec >= 0x900) { 261 if (vec >= 0x900 + (EB164_MAX_IRQ << 4)) 262 panic("eb164_iointr: vec 0x%x out of range\n", vec); 263 irq = (vec - 0x900) >> 4; 264 265 #ifdef EVCNT_COUNTERS 266 eb164_intr_evcnt.ev_count++; 267 #else 268 if (EB164_MAX_IRQ != INTRCNT_EB164_IRQ_LEN) 269 panic("eb164 interrupt counter sizes inconsistent"); 270 intrcnt[INTRCNT_EB164_IRQ + irq]++; 271 #endif 272 273 if (!alpha_shared_intr_dispatch(eb164_pci_intr, irq)) { 274 alpha_shared_intr_stray(eb164_pci_intr, irq, 275 "eb164 irq"); 276 if (eb164_pci_intr[irq].intr_nstrays == 277 eb164_pci_intr[irq].intr_maxstrays) 278 eb164_intr_disable(irq); 279 } 280 return; 281 } 282 #if NSIO 283 if (vec >= 0x800) { 284 sio_iointr(framep, vec); 285 return; 286 } 287 #endif 288 panic("eb164_iointr: weird vec 0x%x\n", vec); 289 } 290 291 #if 0 /* THIS DOES NOT WORK! see pci_eb164_intr.S. */ 292 u_int8_t eb164_intr_mask[3] = { 0xff, 0xff, 0xff }; 293 294 void 295 eb164_intr_enable(irq) 296 int irq; 297 { 298 int byte = (irq / 8), bit = (irq % 8); 299 300 #if 1 301 printf("eb164_intr_enable: enabling %d (%d:%d)\n", irq, byte, bit); 302 #endif 303 eb164_intr_mask[byte] &= ~(1 << bit); 304 305 bus_space_write_1(eb164_intrgate_iot, eb164_intrgate_ioh, byte, 306 eb164_intr_mask[byte]); 307 } 308 309 void 310 eb164_intr_disable(irq) 311 int irq; 312 { 313 int byte = (irq / 8), bit = (irq % 8); 314 315 #if 1 316 printf("eb164_intr_disable: disabling %d (%d:%d)\n", irq, byte, bit); 317 #endif 318 eb164_intr_mask[byte] |= (1 << bit); 319 320 bus_space_write_1(eb164_intrgate_iot, eb164_intrgate_ioh, byte, 321 eb164_intr_mask[byte]); 322 } 323 #endif 324
Indexes created Mon Sep 29 18:09:42 GMT 2025