pci_eb64plus.c revision 1.18
1 /* $NetBSD: pci_eb64plus.c,v 1.18 2009/03/14 15:35:59 dsl Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 35 * All rights reserved. 36 * 37 * Author: Chris G. Demetriou 38 * 39 * Permission to use, copy, modify and distribute this software and 40 * its documentation is hereby granted, provided that both the copyright 41 * notice and this permission notice appear in all copies of the 42 * software, derivative works or modified versions, and any portions 43 * thereof, and that both notices appear in supporting documentation. 44 * 45 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 46 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 47 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 48 * 49 * Carnegie Mellon requests users of this software to return to 50 * 51 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 52 * School of Computer Science 53 * Carnegie Mellon University 54 * Pittsburgh PA 15213-3890 55 * 56 * any improvements or extensions that they make and grant Carnegie the 57 * rights to redistribute these changes. 58 */ 59 60 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 61 62 __KERNEL_RCSID(0, "$NetBSD: pci_eb64plus.c,v 1.18 2009/03/14 15:35:59 dsl Exp $"); 63 64 #include <sys/types.h> 65 #include <sys/param.h> 66 #include <sys/time.h> 67 #include <sys/systm.h> 68 #include <sys/errno.h> 69 #include <sys/malloc.h> 70 #include <sys/device.h> 71 #include <sys/syslog.h> 72 73 #include <uvm/uvm_extern.h> 74 75 #include <machine/autoconf.h> 76 77 #include <dev/pci/pcireg.h> 78 #include <dev/pci/pcivar.h> 79 80 #include <alpha/pci/apecsreg.h> 81 #include <alpha/pci/apecsvar.h> 82 83 #include <alpha/pci/pci_eb64plus.h> 84 85 #include "sio.h" 86 #if NSIO 87 #include <alpha/pci/siovar.h> 88 #endif 89 90 int dec_eb64plus_intr_map(struct pci_attach_args *, 91 pci_intr_handle_t *); 92 const char *dec_eb64plus_intr_string(void *, pci_intr_handle_t); 93 const struct evcnt *dec_eb64plus_intr_evcnt(void *, pci_intr_handle_t); 94 void *dec_eb64plus_intr_establish(void *, pci_intr_handle_t, 95 int, int (*func)(void *), void *); 96 void dec_eb64plus_intr_disestablish(void *, void *); 97 98 #define EB64PLUS_MAX_IRQ 32 99 #define PCI_STRAY_MAX 5 100 101 struct alpha_shared_intr *eb64plus_pci_intr; 102 103 bus_space_tag_t eb64plus_intrgate_iot; 104 bus_space_handle_t eb64plus_intrgate_ioh; 105 106 void eb64plus_iointr(void *arg, unsigned long vec); 107 extern void eb64plus_intr_enable(int irq); /* pci_eb64plus_intr.S */ 108 extern void eb64plus_intr_disable(int irq); /* pci_eb64plus_intr.S */ 109 110 void 111 pci_eb64plus_pickintr(struct apecs_config *acp) 112 { 113 bus_space_tag_t iot = &acp->ac_iot; 114 pci_chipset_tag_t pc = &acp->ac_pc; 115 char *cp; 116 int i; 117 118 pc->pc_intr_v = acp; 119 pc->pc_intr_map = dec_eb64plus_intr_map; 120 pc->pc_intr_string = dec_eb64plus_intr_string; 121 pc->pc_intr_evcnt = dec_eb64plus_intr_evcnt; 122 pc->pc_intr_establish = dec_eb64plus_intr_establish; 123 pc->pc_intr_disestablish = dec_eb64plus_intr_disestablish; 124 125 /* Not supported on the EB64+. */ 126 pc->pc_pciide_compat_intr_establish = NULL; 127 128 eb64plus_intrgate_iot = iot; 129 if (bus_space_map(eb64plus_intrgate_iot, 0x804, 3, 0, 130 &eb64plus_intrgate_ioh) != 0) 131 panic("pci_eb64plus_pickintr: couldn't map interrupt PLD"); 132 for (i = 0; i < EB64PLUS_MAX_IRQ; i++) 133 eb64plus_intr_disable(i); 134 135 eb64plus_pci_intr = alpha_shared_intr_alloc(EB64PLUS_MAX_IRQ, 8); 136 for (i = 0; i < EB64PLUS_MAX_IRQ; i++) { 137 alpha_shared_intr_set_maxstrays(eb64plus_pci_intr, i, 138 PCI_STRAY_MAX); 139 140 cp = alpha_shared_intr_string(eb64plus_pci_intr, i); 141 sprintf(cp, "irq %d", i); 142 evcnt_attach_dynamic(alpha_shared_intr_evcnt( 143 eb64plus_pci_intr, i), EVCNT_TYPE_INTR, NULL, 144 "eb64+", cp); 145 } 146 147 #if NSIO 148 sio_intr_setup(pc, iot); 149 #endif 150 } 151 152 int 153 dec_eb64plus_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 154 { 155 pcitag_t bustag = pa->pa_intrtag; 156 int buspin = pa->pa_intrpin, line = pa->pa_intrline; 157 pci_chipset_tag_t pc = pa->pa_pc; 158 int bus, device, function; 159 160 if (buspin == 0) { 161 /* No IRQ used. */ 162 return 1; 163 } 164 if (buspin > 4) { 165 printf("dec_eb64plus_intr_map: bad interrupt pin %d\n", buspin); 166 return 1; 167 } 168 169 pci_decompose_tag(pc, bustag, &bus, &device, &function); 170 171 /* 172 * The console places the interrupt mapping in the "line" value. 173 * A value of (char)-1 indicates there is no mapping. 174 */ 175 if (line == 0xff) { 176 printf("dec_eb64plus_intr_map: no mapping for %d/%d/%d\n", 177 bus, device, function); 178 return (1); 179 } 180 181 if (line >= EB64PLUS_MAX_IRQ) 182 panic("dec_eb64plus_intr_map: eb64+ irq too large (%d)", 183 line); 184 185 *ihp = line; 186 return (0); 187 } 188 189 const char * 190 dec_eb64plus_intr_string(void *acv, pci_intr_handle_t ih) 191 { 192 static char irqstr[15]; /* 11 + 2 + NULL + sanity */ 193 194 if (ih > EB64PLUS_MAX_IRQ) 195 panic("dec_eb64plus_intr_string: bogus eb64+ IRQ 0x%lx", ih); 196 sprintf(irqstr, "eb64+ irq %ld", ih); 197 return (irqstr); 198 } 199 200 const struct evcnt * 201 dec_eb64plus_intr_evcnt(void *acv, pci_intr_handle_t ih) 202 { 203 204 if (ih > EB64PLUS_MAX_IRQ) 205 panic("dec_eb64plus_intr_string: bogus eb64+ IRQ 0x%lx", ih); 206 return (alpha_shared_intr_evcnt(eb64plus_pci_intr, ih)); 207 } 208 209 void * 210 dec_eb64plus_intr_establish(acv, ih, level, func, arg) 211 void *acv, *arg; 212 pci_intr_handle_t ih; 213 int level; 214 int (*func)(void *); 215 { 216 void *cookie; 217 218 if (ih > EB64PLUS_MAX_IRQ) 219 panic("dec_eb64plus_intr_establish: bogus eb64+ IRQ 0x%lx", 220 ih); 221 222 cookie = alpha_shared_intr_establish(eb64plus_pci_intr, ih, IST_LEVEL, 223 level, func, arg, "eb64+ irq"); 224 225 if (cookie != NULL && 226 alpha_shared_intr_firstactive(eb64plus_pci_intr, ih)) { 227 scb_set(0x900 + SCB_IDXTOVEC(ih), eb64plus_iointr, NULL, 228 level); 229 eb64plus_intr_enable(ih); 230 } 231 return (cookie); 232 } 233 234 void 235 dec_eb64plus_intr_disestablish(acv, cookie) 236 void *acv, *cookie; 237 { 238 struct alpha_shared_intrhand *ih = cookie; 239 unsigned int irq = ih->ih_num; 240 int s; 241 242 s = splhigh(); 243 244 alpha_shared_intr_disestablish(eb64plus_pci_intr, cookie, 245 "eb64+ irq"); 246 if (alpha_shared_intr_isactive(eb64plus_pci_intr, irq) == 0) { 247 eb64plus_intr_disable(irq); 248 alpha_shared_intr_set_dfltsharetype(eb64plus_pci_intr, irq, 249 IST_NONE); 250 scb_free(0x900 + SCB_IDXTOVEC(irq)); 251 } 252 253 splx(s); 254 } 255 256 void 257 eb64plus_iointr(void *arg, unsigned long vec) 258 { 259 int irq; 260 261 irq = SCB_VECTOIDX(vec - 0x900); 262 263 if (!alpha_shared_intr_dispatch(eb64plus_pci_intr, irq)) { 264 alpha_shared_intr_stray(eb64plus_pci_intr, irq, 265 "eb64+ irq"); 266 if (ALPHA_SHARED_INTR_DISABLE(eb64plus_pci_intr, irq)) 267 eb64plus_intr_disable(irq); 268 } else 269 alpha_shared_intr_reset_strays(eb64plus_pci_intr, irq); 270 } 271 272 #if 0 /* THIS DOES NOT WORK! see pci_eb64plus_intr.S. */ 273 u_int8_t eb64plus_intr_mask[3] = { 0xff, 0xff, 0xff }; 274 275 void 276 eb64plus_intr_enable(int irq) 277 { 278 int byte = (irq / 8), bit = (irq % 8); 279 280 #if 1 281 printf("eb64plus_intr_enable: enabling %d (%d:%d)\n", irq, byte, bit); 282 #endif 283 eb64plus_intr_mask[byte] &= ~(1 << bit); 284 285 bus_space_write_1(eb64plus_intrgate_iot, eb64plus_intrgate_ioh, byte, 286 eb64plus_intr_mask[byte]); 287 } 288 289 void 290 eb64plus_intr_disable(int irq) 291 { 292 int byte = (irq / 8), bit = (irq % 8); 293 294 #if 1 295 printf("eb64plus_intr_disable: disabling %d (%d:%d)\n", irq, byte, bit); 296 #endif 297 eb64plus_intr_mask[byte] |= (1 << bit); 298 299 bus_space_write_1(eb64plus_intrgate_iot, eb64plus_intrgate_ioh, byte, 300 eb64plus_intr_mask[byte]); 301 } 302 #endif 303
Indexes created Tue Sep 30 07:10:03 GMT 2025