pmap.h revision 1.14
1/* $NetBSD: pmap.h,v 1.14 2007/10/18 15:28:34 yamt Exp $ */ 2 3/* 4 * 5 * Copyright (c) 1997 Charles D. Cranor and Washington University. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgment: 18 * This product includes software developed by Charles D. Cranor and 19 * Washington University. 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35/* 36 * Copyright (c) 2001 Wasabi Systems, Inc. 37 * All rights reserved. 38 * 39 * Written by Frank van der Linden for Wasabi Systems, Inc. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed for the NetBSD Project by 52 * Wasabi Systems, Inc. 53 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 54 * or promote products derived from this software without specific prior 55 * written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 * POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70#ifndef _AMD64_PMAP_H_ 71#define _AMD64_PMAP_H_ 72 73#include <machine/pte.h> 74#include <machine/segments.h> 75#include <machine/atomic.h> 76#ifdef _KERNEL 77#include <machine/cpufunc.h> 78#endif 79 80#include <uvm/uvm_object.h> 81 82/* 83 * The x86_64 pmap module closely resembles the i386 one. It uses 84 * the same recursive entry scheme, and the same alternate area 85 * trick for accessing non-current pmaps. See the i386 pmap.h 86 * for a description. The obvious difference is that 3 extra 87 * levels of page table need to be dealt with. The level 1 page 88 * table pages are at: 89 * 90 * l1: 0x00007f8000000000 - 0x00007fffffffffff (39 bits, needs PML4 entry) 91 * 92 * The alternate space is at: 93 * 94 * l1: 0xffffff8000000000 - 0xffffffffffffffff (39 bits, needs PML4 entry) 95 * 96 * The rest is kept as physical pages in 3 UVM objects, and is 97 * temporarily mapped for virtual access when needed. 98 * 99 * Note that address space is signed, so the layout for 48 bits is: 100 * 101 * +---------------------------------+ 0xffffffffffffffff 102 * | | 103 * | alt.L1 table (PTE pages) | 104 * | | 105 * +---------------------------------+ 0xffffff8000000000 106 * ~ ~ 107 * | | 108 * | Kernel Space | 109 * | | 110 * | | 111 * +---------------------------------+ 0xffff800000000000 = 0x0000800000000000 112 * | | 113 * | alt.L1 table (PTE pages) | 114 * | | 115 * +---------------------------------+ 0x00007f8000000000 116 * ~ ~ 117 * | | 118 * | User Space | 119 * | | 120 * | | 121 * +---------------------------------+ 0x0000000000000000 122 * 123 * In other words, there is a 'VA hole' at 0x0000800000000000 - 124 * 0xffff800000000000 which will trap, just as on, for example, 125 * sparcv9. 126 * 127 * The unused space can be used if needed, but it adds a little more 128 * complexity to the calculations. 129 */ 130 131/* 132 * The first generation of Hammer processors can use 48 bits of 133 * virtual memory, and 40 bits of physical memory. This will be 134 * more for later generations. These defines can be changed to 135 * variable names containing the # of bits, extracted from an 136 * extended cpuid instruction (variables are harder to use during 137 * bootstrap, though) 138 */ 139#define VIRT_BITS 48 140#define PHYS_BITS 40 141 142/* 143 * Mask to get rid of the sign-extended part of addresses. 144 */ 145#define VA_SIGN_MASK 0xffff000000000000 146#define VA_SIGN_NEG(va) ((va) | VA_SIGN_MASK) 147/* 148 * XXXfvdl this one's not right. 149 */ 150#define VA_SIGN_POS(va) ((va) & ~VA_SIGN_MASK) 151 152#define L4_SLOT_PTE 255 153#define L4_SLOT_KERN 256 154#define L4_SLOT_KERNBASE 511 155#define L4_SLOT_APTE 510 156 157#define PDIR_SLOT_KERN L4_SLOT_KERN 158#define PDIR_SLOT_PTE L4_SLOT_PTE 159#define PDIR_SLOT_APTE L4_SLOT_APTE 160 161/* 162 * the following defines give the virtual addresses of various MMU 163 * data structures: 164 * PTE_BASE and APTE_BASE: the base VA of the linear PTE mappings 165 * PTD_BASE and APTD_BASE: the base VA of the recursive mapping of the PTD 166 * PDP_PDE and APDP_PDE: the VA of the PDE that points back to the PDP/APDP 167 * 168 */ 169 170#define PTE_BASE ((pt_entry_t *) (L4_SLOT_PTE * NBPD_L4)) 171#define APTE_BASE ((pt_entry_t *) (VA_SIGN_NEG((L4_SLOT_APTE * NBPD_L4)))) 172 173#define L1_BASE PTE_BASE 174#define AL1_BASE APTE_BASE 175 176#define L2_BASE ((pd_entry_t *)((char *)L1_BASE + L4_SLOT_PTE * NBPD_L3)) 177#define L3_BASE ((pd_entry_t *)((char *)L2_BASE + L4_SLOT_PTE * NBPD_L2)) 178#define L4_BASE ((pd_entry_t *)((char *)L3_BASE + L4_SLOT_PTE * NBPD_L1)) 179 180#define AL2_BASE ((pd_entry_t *)((char *)AL1_BASE + L4_SLOT_PTE * NBPD_L3)) 181#define AL3_BASE ((pd_entry_t *)((char *)AL2_BASE + L4_SLOT_PTE * NBPD_L2)) 182#define AL4_BASE ((pd_entry_t *)((char *)AL3_BASE + L4_SLOT_PTE * NBPD_L1)) 183 184#define PDP_PDE (L4_BASE + PDIR_SLOT_PTE) 185#define APDP_PDE (L4_BASE + PDIR_SLOT_APTE) 186 187#define PDP_BASE L4_BASE 188#define APDP_BASE AL4_BASE 189 190#define NKL4_MAX_ENTRIES (unsigned long)1 191#define NKL3_MAX_ENTRIES (unsigned long)(NKL4_MAX_ENTRIES * 512) 192#define NKL2_MAX_ENTRIES (unsigned long)(NKL3_MAX_ENTRIES * 512) 193#define NKL1_MAX_ENTRIES (unsigned long)(NKL2_MAX_ENTRIES * 512) 194 195#define NKL4_KIMG_ENTRIES 1 196#define NKL3_KIMG_ENTRIES 1 197#define NKL2_KIMG_ENTRIES 8 198 199/* 200 * Since kva space is below the kernel in its entirety, we start off 201 * with zero entries on each level. 202 */ 203#define NKL4_START_ENTRIES 0 204#define NKL3_START_ENTRIES 0 205#define NKL2_START_ENTRIES 0 206#define NKL1_START_ENTRIES 0 /* XXX */ 207 208#define NTOPLEVEL_PDES (PAGE_SIZE / (sizeof (pd_entry_t))) 209 210#define NPDPG (PAGE_SIZE / sizeof (pd_entry_t)) 211 212#define PTP_MASK_INITIALIZER { L1_FRAME, L2_FRAME, L3_FRAME, L4_FRAME } 213#define PTP_SHIFT_INITIALIZER { L1_SHIFT, L2_SHIFT, L3_SHIFT, L4_SHIFT } 214#define NKPTP_INITIALIZER { NKL1_START_ENTRIES, NKL2_START_ENTRIES, \ 215 NKL3_START_ENTRIES, NKL4_START_ENTRIES } 216#define NKPTPMAX_INITIALIZER { NKL1_MAX_ENTRIES, NKL2_MAX_ENTRIES, \ 217 NKL3_MAX_ENTRIES, NKL4_MAX_ENTRIES } 218#define NBPD_INITIALIZER { NBPD_L1, NBPD_L2, NBPD_L3, NBPD_L4 } 219#define PDES_INITIALIZER { L2_BASE, L3_BASE, L4_BASE } 220#define APDES_INITIALIZER { AL2_BASE, AL3_BASE, AL4_BASE } 221 222#define PTP_LEVELS 4 223 224/* 225 * PG_AVAIL usage: we make use of the ignored bits of the PTE 226 */ 227 228#define PG_W PG_AVAIL1 /* "wired" mapping */ 229#define PG_PVLIST PG_AVAIL2 /* mapping has entry on pvlist */ 230/* PG_AVAIL3 not used */ 231 232#define PG_X 0 /* XXX dummy */ 233 234/* 235 * Number of PTE's per cache line. 8 byte pte, 64-byte cache line 236 * Used to avoid false sharing of cache lines. 237 */ 238#define NPTECL 8 239 240#define pmap_pte_set(p, n) x86_atomic_testset_u64(p, n) 241#define pmap_pte_setbits(p, b) x86_atomic_setbits_u64(p, b) 242#define pmap_pte_clearbits(p, b) x86_atomic_clearbits_u64(p, b) 243#define pmap_cpu_has_pg_n() (1) 244#define pmap_cpu_has_invlpg (1) 245 246#include <x86/pmap.h> 247 248void pmap_prealloc_lowmem_ptps(void); 249void pmap_changeprot_local(vaddr_t, vm_prot_t); 250 251#endif /* _AMD64_PMAP_H_ */ 252