History log of /src/sys/arch/amd64/include/pmap.h
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: perseant-exfatfs-base-20250801 netbsd-11-base netbsd-10-1-RELEASE perseant-exfatfs-base-20240630 perseant-exfatfs-base netbsd-10-0-RELEASE netbsd-10-0-RC6 netbsd-10-0-RC5 netbsd-10-0-RC4 netbsd-10-0-RC3 netbsd-10-0-RC2 thorpej-ifq-base thorpej-altq-separation-base netbsd-10-0-RC1 netbsd-10-base bouyer-sunxi-drm-base
# 1.69 20-Aug-2022 riastradh

x86: Move definition of struct pmap to pmap_private.h.

This makes pmap_resident_count and pmap_wired_count out-of-line
functions instead of inline. No functional change intended
otherwise.


# 1.68 20-Aug-2022 riastradh

x86: Split most of pmap.h into pmap_private.h or vmparam.h.

This way pmap.h only contains the MD definition of the MI pmap(9)
API, which loads of things in the kernel rely on, so changing x86
pmap internals no longer requires recompiling the entire kernel every
time.

Callers needing these internals must now use machine/pmap_private.h.
Note: This is not x86/pmap_private.h because it contains three parts:

1. CPU-specific (different for i386/amd64) definitions used by...

2. common definitions, including Xenisms like xpmap_ptetomach,
further used by...

3. more CPU-specific inlines for pmap_pte_* operations

So {amd64,i386}/pmap_private.h defines 1, includes x86/pmap_private.h
for 2, and then defines 3. Maybe we should split that out into a new
pmap_pte.h to reduce this trouble.

No functional change intended, other than that some .c files must
include machine/pmap_private.h when previously uvm/uvm_pmap.h
polluted the namespace with pmap internals.

Note: This migrates part of i386/pmap.h into i386/vmparam.h --
specifically the parts that are needed for several constants defined
in vmparam.h:

VM_MAXUSER_ADDRESS
VM_MAX_ADDRESS
VM_MAX_KERNEL_ADDRESS
VM_MIN_KERNEL_ADDRESS

Since i386 needs PDP_SIZE in vmparam.h, I added it there on amd64
too, just to keep things parallel.


# 1.67 20-Aug-2022 riastradh

x86: Move struct vm_page_md to common x86/pmap.h.


Revision tags: thorpej-i2c-spi-conf2-base thorpej-futex2-base thorpej-cfargs2-base cjep_sun2x-base1 cjep_sun2x-base cjep_staticlib_x-base1 cjep_staticlib_x-base thorpej-i2c-spi-conf-base thorpej-cfargs-base thorpej-futex-base
# 1.66 15-May-2020 ad

Revert previous after thinking about it. It was wrong, don't need to use
an atomic to clear a PTE or set initial version unless the circumstances
call for it.


Revision tags: bouyer-xenpvh-base2 phil-wifi-20200421 bouyer-xenpvh-base1 phil-wifi-20200411 bouyer-xenpvh-base phil-wifi-20200406
# 1.65 17-Mar-2020 ad

Always set PTEs using atomics. There are too many assumptions to go wrong.


Revision tags: is-mlppp-base ad-namecache-base3 ad-namecache-base2 ad-namecache-base1 ad-namecache-base phil-wifi-20191119
# 1.64 14-Nov-2019 maxv

Add support for Kernel Memory Sanitizer (kMSan). It detects uninitialized
memory used by the kernel at run time, and just like kASan and kCSan, it
is an excellent feature. It has already detected 38 uninitialized variables
in the kernel during my testing, which I have since discreetly fixed.

We use two shadows:
- "shad", to track uninitialized memory with a bit granularity (1:1).
Each bit set to 1 in the shad corresponds to one uninitialized bit of
real kernel memory.
- "orig", to track the origin of the memory with a 4-byte granularity
(1:1). Each uint32_t cell in the orig indicates the origin of the
associated uint32_t of real kernel memory.

The memory consumption of these shadows is consequent, so at least 4GB of
RAM is recommended to run kMSan.

The compiler inserts calls to specific __msan_* functions on each memory
access, to manage both the shad and the orig and detect uninitialized
memory accesses that change the execution flow (like an "if" on an
uninitialized variable).

We mark as uninit several types of memory buffers (stack, pools, kmem,
malloc, uvm_km), and check each buffer passed to copyout, copyoutstr,
bwrite, if_transmit_lock and DMA operations, to detect uninitialized memory
that leaves the system. This allows us to detect kernel info leaks in a way
that is more efficient and also more user-friendly than KLEAK.

Contrary to kASan, kMSan requires comprehensive coverage, ie we cannot
tolerate having one non-instrumented function, because this could cause
false positives. kMSan cannot instrument ASM functions, so I converted
most of them to __asm__ inlines, which kMSan is able to instrument. Those
that remain receive special treatment.

Contrary to kASan again, kMSan uses a TLS, so we must context-switch this
TLS during interrupts. We use different contexts depending on the interrupt
level.

The orig tracks precisely the origin of a buffer. We use a special encoding
for the orig values, and pack together in each uint32_t cell of the orig:
- a code designating the type of memory (Stack, Pool, etc), and
- a compressed pointer, which points either (1) to a string containing
the name of the variable associated with the cell, or (2) to an area
in the kernel .text section which we resolve to a symbol name + offset.

This encoding allows us not to consume extra memory for associating
information with each cell, and produces a precise output, that can tell
for example the name of an uninitialized variable on the stack, the
function in which it was pushed on the stack, and the function where we
accessed this uninitialized variable.

kMSan is available with LLVM, but not with GCC.

The code is organized in a way that is similar to kASan and kCSan, so it
means that other architectures than amd64 can be supported.


# 1.63 01-Nov-2019 maxv

Fix KUBSAN: the kernel size now exceeds the mapping limit, so bump the
limit.


# 1.62 07-Aug-2019 maxv

Add support for USER_LDT in SVS. This allows us to have both enabled at
the same time.

We allocate an LDT for each CPU in the GDT and map an area for it, in
addition to the default LDT already present. In context switches between
different processes, we choose between the default or the per-cpu LDT
selector: if the user set specific LDT entries, we memcpy them to the
per-cpu LDT and load the per-cpu selector.

Tested by Naveen Narayanan (with Wine on amd64).


Revision tags: netbsd-9-4-RELEASE netbsd-9-3-RELEASE netbsd-9-2-RELEASE netbsd-9-1-RELEASE netbsd-9-0-RELEASE netbsd-9-0-RC2 netbsd-9-0-RC1 netbsd-9-base phil-wifi-20190609
# 1.61 29-May-2019 maxv

Add PCID support in SVS. This avoids TLB flushes during kernel<->user
transitions, which greatly reduces the performance penalty introduced by
SVS.

We use two ASIDs, 0 (kern) and 1 (user), and use invpcid to flush pages
in both ASIDs.

The read-only machdep.svs.pcid={0,1} sysctl is added, and indicates whether
SVS+PCID is in use.


Revision tags: isaki-audio2-base
# 1.60 09-Mar-2019 maxv

New software PTE bits.


# 1.59 11-Feb-2019 cherry

We reorganise definitions for XEN source support as follows:

XEN - common sources required for baseline XEN support.
XENPV - sources required for support of XEN in PV mode.
XENPVHVM - sources required for support for XEN in HVM mode.
XENPVH - sources required for support for XEN in PVH mode.


Revision tags: pgoyette-compat-20190127 pgoyette-compat-20190118 pgoyette-compat-1226 pgoyette-compat-1126
# 1.58 19-Nov-2018 maxv

Introduce pl_pi, will be used soon.


# 1.57 19-Nov-2018 maxv

Rename 'mask' -> 'frame', we will use the real 'mask' soon.


Revision tags: pgoyette-compat-1020 pgoyette-compat-0930 pgoyette-compat-0906
# 1.56 29-Aug-2018 maxv

Remove the constants of the DMAP, they are unused, and move NL4_SLOT_DIRECT
into amd64/.


# 1.55 20-Aug-2018 maxv

Add support for kASan on amd64. Written by me, with some parts inspired
from Siddharth Muralee's initial work. This feature can detect several
kinds of memory bugs, and it's an excellent feature.

It can be enabled by uncommenting these three lines in GENERIC:

#makeoptions KASAN=1 # Kernel Address Sanitizer
#options KASAN
#no options SVS

The kernel is compiled without SVS, without DMAP and without PCPU area.
A shadow area is created at boot time, and it can cover the upper 128TB
of the address space. This area is populated gradually as we allocate
memory. With this design the memory consumption is kept at its lowest
level.

The compiler calls the __asan_* functions each time a memory access is
done. We verify whether this access is legal by looking at the shadow
area.

We declare our own special memcpy/memset/etc functions, because the
compiler's builtins don't add the __asan_* instrumentation.

Initially all the mappings are marked as valid. During dynamic
allocations, we add a redzone, which we mark as invalid. Any access on
it will trigger a kASan error message. Additionally, the compiler adds
a redzone on global variables, and we mark these redzones as invalid too.
The illegal-access detection works with a 1-byte granularity.

For now, we cover three areas:

- global variables
- kmem_alloc-ated areas
- malloc-ated areas

More will come, but that's a good start.


# 1.54 17-Aug-2018 maxv

Remove big outdated comment, remove unused macros, remove XXX that has
nothing to do here, style.


# 1.53 12-Aug-2018 maxv

More ASLR: randomize the location of the PTE area. The PTE slot is not
created in locore anymore, but a little later; by using the already
entered L4 page, rather than the recursive slot itself (which doesn't
exist yet).

In the prekern we still map the slot - the prekern behaves as an external
locore -, because we need it as part of the randomization/relocation
work. The kernel then removes this slot, and regenerates a randomized
one.

Tested on GENERIC and GENERIC_KASLR, Xen doesn't have it and dom0 still
boots fine.


# 1.52 12-Aug-2018 maxv

Move the PTE area from slot 255 to slot 509. I've never understood why we
put it on 255; the "kernel" half of the VM space begins on slot 256, so
if anything, the PTE area should have been above it, not below.

Virtually extend the user slots in slotspace, because we don't want
(randomized) kernel mappings to land on slot 255.

The prekern is updated accordingly.

Tested on GENERIC, GENERIC_KASLR and XEN3_DOM0.


# 1.51 12-Aug-2018 maxv

Introduce PDIR_SLOT_USERLIM, which indicates the limit of the user slots.
Use it instead of PDIR_SLOT_PTE when we just want to iterate over the
user slots. Also use it in SVS, I had hardcoded 255 because there was no
proper define (which there now is).


# 1.50 12-Aug-2018 maxv

Randomize the main memory on Xen, same as native. Tested on amd64-dom0.


# 1.49 12-Aug-2018 maxv

More ASLR: randomize the kernel main memory. VM_MIN_KERNEL_ADDRESS becomes
variable, and its location is chosen at boot time. There is room for
improvement, since for now we ask for an alignment of NBPD_L4.

This is enabled by default in GENERIC, but not in Xen. Tested extensively
on GENERIC and GENERIC_KASLR, XEN3_DOM0 still boots fine.


Revision tags: pgoyette-compat-0728
# 1.48 27-Jul-2018 maxv

Remove KERN_BASE, unused. It has always been wrong anyway, the value
should have been passed into VA_SIGN_NEG().


# 1.47 25-Jul-2018 maxv

Remove NPTECL, unused.


Revision tags: phil-wifi-base pgoyette-compat-0625 pgoyette-compat-0521
# 1.46 19-May-2018 jdolecek

branches: 1.46.2;
add experimental new function uvm_direct_process(), to allow of read/writes
of contents of uvm pages without mapping them into kernel, using
direct map or moral equivalent; pmaps supporting the interface need
to provide pmap_direct_process() and define PMAP_DIRECT

implement the new interface for amd64; I hear alpha and mips might be relatively
easy to add too, but I lack the knowledge

part of resolution for PR kern/53124


Revision tags: pgoyette-compat-0502 pgoyette-compat-0422 pgoyette-compat-0415 pgoyette-compat-0407 pgoyette-compat-0330 pgoyette-compat-0322 pgoyette-compat-0315 pgoyette-compat-base
# 1.45 22-Feb-2018 maxv

branches: 1.45.2;
Remove svs_pgg_update(). Instead of manually changing PG_G on each page,
we can disable the global-paging mechanism in %cr4 with CR4_PGE. Do that.

In addition, install CR4_PGE when SVS is disabled manually (via the
sysctl).

Now, doing "sysctl -w machdep.svs_enabled=0" restores the performance
completely, exactly as if SVS hadn't been enabled in the first place.


# 1.44 22-Feb-2018 maxv

Improve the SVS initialization.

Declare x86_patch_window_open() and x86_patch_window_close(), and globalify
x86_hotpatch().

Introduce svs_enable() in x86/svs.c, that does the SVS hotpatching.

Change svs_init() to take a bool. This function gets called twice; early
when the system just booted (and nothing is initialized), lately when at
least pmap_kernel has been initialized.


# 1.43 18-Feb-2018 maxv

Add svs_enabled, which defaults to 'true' when SVS is compiled (no dynamic
detection yet).


# 1.42 21-Jan-2018 maxv

Increase the size of the initial mapping of the kernel. KASLR kernels are
bigger than their GENERIC counterparts, and the limit will soon be hit on
them.


# 1.41 07-Jan-2018 maxv

Add a new option, SVS (for Separate Virtual Space), that unmaps kernel
pages when running in userland. For now, only the PTE area is unmapped.

Sent on tech-kern@.


Revision tags: tls-maxphys-base-20171202 nick-nhusb-base-20170825 perseant-stdc-iso10646-base
# 1.40 17-Jun-2017 maxv

Increase the kernel heap size from 512GB to 32TB, in such a way that it
is able to map the maximum amount of ram supported twice (16TB x 2).


Revision tags: matt-nb8-mediatek-base netbsd-8-base prg-localcount2-base3 prg-localcount2-base2 prg-localcount2-base1 prg-localcount2-base pgoyette-localcount-20170426 bouyer-socketcan-base1 jdolecek-ncq-base pgoyette-localcount-20170320 nick-nhusb-base-20170204 bouyer-socketcan-base pgoyette-localcount-20170107 nick-nhusb-base-20161204
# 1.39 11-Nov-2016 maxv

branches: 1.39.8;
Remove useless values, and explain where some others come from


Revision tags: pgoyette-localcount-20161104 nick-nhusb-base-20161004 localcount-20160914 pgoyette-localcount-20160806 pgoyette-localcount-20160726
# 1.38 22-Jul-2016 maxv

Remove pmap_prealloc_lowmem_ptps on amd64. This function creates levels in
the page tree so that the first 2MB of virtual memory can be kentered in
L1.

Strictly speaking, the kernel should never kenter a virtual page below
VM_MIN_KERNEL_ADDRESS, because then it wouldn't be available in userland.
It used to need the first 2MB in order to map the CPU trampoline and the
initial VAs used by the bootstrap code. Now, the CPU trampoline VA is
allocated with uvm_km_alloc and the VAs used by the bootstrap code are
allocated with pmap_bootstrap_valloc, and in either case the resulting VA
is above VM_MIN_KERNEL_ADDRESS.

The low levels in the page tree are therefore unused. By removing this
function, we are making sure no one will be tempted to map an area below
VM_MIN_KERNEL_ADDRESS in kernel mode, and particularly, we are making sure
NULL cannot be kentered.

In short, there is no way to map NULL in kernel mode anymore.


Revision tags: pgoyette-localcount-base nick-nhusb-base-20160907 nick-nhusb-base-20160529
# 1.37 21-May-2016 maxv

branches: 1.37.2;
Explain where this value comes from.


# 1.36 14-May-2016 maxv

KNF so it appears aligned on NXR, and fix a comment.


Revision tags: nick-nhusb-base-20160422 nick-nhusb-base-20160319 nick-nhusb-base-20151226 nick-nhusb-base-20150921 nick-nhusb-base-20150606 nick-nhusb-base-20150406
# 1.35 09-Jan-2015 riastradh

Bump amd64 module map size to 32 MB.

For lack of anything better to do, after no progress in discussion on
the matter:

https://mail-index.netbsd.org/port-amd64/2014/08/22/msg002108.html

Needed in order to load the (solaris module needed by) dtrace module.


Revision tags: nick-nhusb-base netbsd-7-base yamt-pagecache-base9 tls-earlyentropy-base riastradh-xf86-video-intel-2-7-1-pre-2-21-15 riastradh-drm2-base3 rmind-smpnet-nbase riastradh-drm2-base2 riastradh-drm2-base1 riastradh-drm2-base rmind-smpnet-base agc-symver-base yamt-pagecache-base8 yamt-pagecache-base7 yamt-pagecache-base6 tls-maxphys-base
# 1.34 30-Jun-2012 jym

branches: 1.34.2; 1.34.14; 1.34.16;
Extend the xpmap API, as described in [1]. This change is mechanical and
avoids exposing the MD phys_to_machine/machine_to_phys tables directly.
Added:

- xpmap_ptom handles PFN (pseudo physical) to MFN (machine frame number)
translations, and is under control of the domain.
- xpmap_mtop is its counterpart (MFN to PFN), and is under control of
hypervisor.

xpmap_ptom_map() map a pseudo-phys address to a machine address
xpmap_ptom_unmap() unmap a pseudo-phys address (invalidation)
xpmap_ptom_isvalid() check for pseudo-phys address validity

The parameters are physical/machine addresses, like bus_dma/bus_space(9).
As x86 MFNs are tracked by u_long (Xen's choice) while machine addresses
can be 64 bits entities (PAE), use ptoa() to avoid truncation when bit
shifting by PAGE_SHIFT.

I kept the same namespace (xpmap_) to avoid code churn.

[1] http://mail-index.netbsd.org/port-xen/2009/05/09/msg004951.html

XXX will document ptoa/atop/trunc_page separately.


# 1.33 11-Jun-2012 chs

allow more space for modules.


Revision tags: jmcneill-usbmp-base10 yamt-pagecache-base5 jmcneill-usbmp-base9 yamt-pagecache-base4 jmcneill-usbmp-base8 jmcneill-usbmp-base7 jmcneill-usbmp-base6 jmcneill-usbmp-base5 jmcneill-usbmp-base4 jmcneill-usbmp-base3
# 1.32 19-Feb-2012 cherry

Removing remaining references to the alternate PTE space. Modify documentation appropriately


Revision tags: netbsd-6-0-6-RELEASE netbsd-6-0-5-RELEASE netbsd-6-0-4-RELEASE netbsd-6-0-3-RELEASE netbsd-6-0-2-RELEASE netbsd-6-0-1-RELEASE matt-nb6-plus-nbase netbsd-6-0-RELEASE netbsd-6-0-RC2 matt-nb6-plus-base netbsd-6-0-RC1 jmcneill-usbmp-base2 netbsd-6-base
# 1.31 19-Jan-2012 bouyer

branches: 1.31.2;
pmap_pte_set() is not supposed to be atomic, so only raise IPL, no need to
take pte_lock


# 1.30 15-Jan-2012 cherry

for xen on amd64 PDP_BASE points to the per-cpu ci->ci_kpm_pdir copy of *pmap_kernel()*'s L4 pdir, which is an alias for ci->ci_kpm_pdir. This is unlike PAE, where PDP_BASE points to the per-pmap pm_pdir consisting of 4 pages, the last of which is the "shadow". This "shadow" is not used directly in an active pmap, since it duplicates the kernel space and, for PAE, xen dissallows multiple cpus pointing to the same L3[3] page. Therefore, we use a per-cpu copy of the pmap_kernel() pdir's L3[3] page, ci->ci_pae_l3_pdir[3], while L3[0-2] point to the original pmap's pm_pdir[0 - 2]. Thus the "shadow" pdir only exists on i386 PAE. Note that on PAE, the recursive PDIR_SLOT_PTE is not per-cpu, and therefore cannot be made to point to per-cpu pdirs via (L4_BASE + PDIR_SLOT_PTE), unlike xen x86_64 where this is exactly the case.


# 1.29 09-Jan-2012 cherry

Make cross-cpu pte access MP safe.
XXX: review cases of use of pmap_set_pte() vs direct use of xpq_queue_pte_update()


Revision tags: jmcneill-usbmp-pre-base2 jmcneill-usbmp-base jmcneill-audiomp3-base yamt-pagecache-base3 yamt-pagecache-base2
# 1.28 06-Nov-2011 cherry

branches: 1.28.4;
[merging from cherry-xenmp] make pmap_kernel() shadow PMD per-cpu and MP aware.


# 1.27 06-Nov-2011 cherry

[merging from cherry-xenmp] Make the xen MMU op queue locking api private. Implement per-cpu queues.


Revision tags: yamt-pagecache-base
# 1.26 27-Aug-2011 christos

branches: 1.26.2;
Implement sparse dumps for amd64 (copied from i386). Disabled for now via
sysctl.
XXX: most of the code can be merged.


Revision tags: jym-xensuspend-nbase jym-xensuspend-base
# 1.25 13-Aug-2011 cherry

Add locking around ops to the hypervisor MMU "queue".


Revision tags: rmind-uvmplock-nbase cherry-xenmp-base uebayasi-xip-base7 bouyer-quota2-nbase bouyer-quota2-base rmind-uvmplock-base
# 1.24 01-Feb-2011 chuck

branches: 1.24.2;
udpate license clauses on my code to match the new-style BSD licenses.
based on diff that rmind@ sent me.

no functional change with this commit.


Revision tags: jruoho-x86intr-base matt-mips64-premerge-20101231 uebayasi-xip-base6
# 1.23 14-Nov-2010 uebayasi

branches: 1.23.2; 1.23.4;
Move struct vm_page_md definition from vmparam.h to pmap.h, because
it's used only by pmap. vmparam.h has definitions for wider
audience.

All GENERIC kernels build tested, except ia64.

powerpc/include/booke/vmparam.h has one too, but it has no pmap.h,
so it's left as is.


Revision tags: netbsd-5-2-3-RELEASE netbsd-5-1-5-RELEASE netbsd-5-2-2-RELEASE netbsd-5-1-4-RELEASE netbsd-5-2-1-RELEASE netbsd-5-1-3-RELEASE netbsd-5-2-RELEASE netbsd-5-2-RC1 netbsd-5-1-2-RELEASE netbsd-5-1-1-RELEASE matt-nb5-mips64-premerge-20101231 matt-nb5-pq3-base uebayasi-xip-base5 netbsd-5-1-RELEASE uebayasi-xip-base4 uebayasi-xip-base3 yamt-nfs-mp-base11 netbsd-5-1-RC4 matt-nb5-mips64-k15 uebayasi-xip-base2 yamt-nfs-mp-base10 netbsd-5-1-RC3 netbsd-5-1-RC2 uebayasi-xip-base1 netbsd-5-1-RC1 yamt-nfs-mp-base9 uebayasi-xip-base netbsd-5-0-2-RELEASE matt-nb5-mips64-premerge-20091211 matt-premerge-20091211 yamt-nfs-mp-base8 matt-nb5-mips64-u2-k2-k4-k7-k8-k9 matt-nb4-mips64-k7-u2a-k9b matt-nb5-mips64-u1-k1-k5 yamt-nfs-mp-base7 netbsd-5-0-1-RELEASE jymxensuspend-base yamt-nfs-mp-base6 yamt-nfs-mp-base5 yamt-nfs-mp-base4 yamt-nfs-mp-base3 nick-hppapmap-base4 nick-hppapmap-base3 netbsd-5-0-RELEASE netbsd-5-0-RC4 netbsd-5-0-RC3 nick-hppapmap-base2 netbsd-5-0-RC2 netbsd-5-0-RC1 haad-dm-base2 haad-nbase2 ad-audiomp2-base netbsd-5-base nick-hppapmap-base haad-dm-base mjf-devfs2-base
# 1.22 26-Oct-2008 mrg

branches: 1.22.8; 1.22.14; 1.22.16;
put the contents of these header files around #ifdef __x86_64__, and
#include the <i386/foo.h> in the #else clause, making these files
largely bit-size independant.


Revision tags: matt-mips64-base2 haad-dm-base1 wrstuden-revivesa-base-4 wrstuden-revivesa-base-3 wrstuden-revivesa-base-2 wrstuden-revivesa-base-1 simonb-wapbl-nbase yamt-pf42-base4 simonb-wapbl-base yamt-pf42-base3 hpcarm-cleanup-nbase yamt-pf42-baseX yamt-pf42-base2 yamt-nfs-mp-base2 wrstuden-revivesa-base yamt-nfs-mp-base yamt-pf42-base ad-socklock-base1 yamt-lazymbuf-base15 yamt-lazymbuf-base14 keiichi-mipv6-nbase nick-net80211-sync-base keiichi-mipv6-base matt-armv6-nbase mjf-devfs-base hpcarm-cleanup-base
# 1.21 23-Jan-2008 bouyer

branches: 1.21.6; 1.21.10; 1.21.16;
Merge the bouyer-xeni386 branch. This brings in PAE support to NetBSD xeni386
(domU only). PAE support is enabled by 'options PAE', see the new XEN3PAE_DOMU
and INSTALL_XEN3PAE_DOMU kernel config files.

See the comments in arch/i386/include/{pte.h,pmap.h} to see how it works.
In short, we still handle it as a 2-level MMU, with the second level page
directory being 4 pages in size. pmap switching is done by switching the
L2 pages in the L3 entries, instead of loading %cr3. This is almost required
by Xen, which handle the last L2 page (the one mapping 0xc0000000 - 0xffffffff)
in a very special way. But this approach should also work for native PAE
support if ever supported (in fact, the pmap should almost suport native
PAE, what's missing is bootstrap code in locore.S).


Revision tags: bouyer-xeni386-nbase
# 1.20 20-Jan-2008 bouyer

Make first argument of Xen's pmap_pte_cas() volatile, fix a warning
building pmap.c.


Revision tags: bouyer-xeni386-base
# 1.19 13-Jan-2008 yamt

add pmap_pte_cas.


Revision tags: matt-armv6-base
# 1.18 03-Jan-2008 ad

Bump NKL2_KIMG_ENTRIES to allow for 20MB of kernel.

Well past time for an in-kernel linker...


Revision tags: vmlocking2-base3 yamt-kmem-base3 cube-autoconf-base yamt-kmem-base2 yamt-kmem-base vmlocking2-base2 reinoud-bufcleanup-nbase vmlocking2-base1 vmlocking-nbase jmcneill-pm-base reinoud-bufcleanup-base
# 1.17 28-Nov-2007 ad

branches: 1.17.6;
Remove remaining CPUCLASS_386 tests.


# 1.16 28-Nov-2007 ad

Use the new atomic ops.


# 1.15 22-Nov-2007 bouyer

Pull up the bouyer-xenamd64 branch to HEAD. This brings in amd64 support
to NetBSD/Xen, both Dom0 and DomU.


Revision tags: jmcneill-base bouyer-xenamd64-base2 bouyer-xenamd64-base
# 1.14 18-Oct-2007 yamt

branches: 1.14.2;
merge yamt-x86pmap branch.

- reduce differences between amd64 and i386. notably, share pmap.c
between them. it makes several i386 pmap improvements available to
amd64, including tlb shootdown reduction and bug fixes from Stephan Uphoff.
- implement deferred pmap switching for amd64.
- remove LARGEPAGES option. always use large pages if available.
also, make it work on amd64.


Revision tags: yamt-x86pmap-base4
# 1.13 17-Oct-2007 garbled

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.


Revision tags: yamt-x86pmap-base3 yamt-x86pmap-base2 ppcoea-renovation-base vmlocking-base
# 1.12 27-Sep-2007 ad

branches: 1.12.2;
Only include machine/cpufunc.h if _KERNEL.


Revision tags: nick-csl-alignment-base5 yamt-x86pmap-base
# 1.11 29-Aug-2007 ad

branches: 1.11.2;
Merge most x86 changes from the vmlocking branch, except the threaded soft
interrupt stuff. This is mostly comprised of changes to the pmap modules to
work on multiprocessor systems without kernel_lock, and changes to speed up
tlb shootdowns.


Revision tags: nick-csl-alignment-base matt-mips64-base yamt-idlelwp-base8 thorpej-atomic-base mjf-ufs-trans-base ad-audiomp-base
# 1.10 21-Feb-2007 thorpej

branches: 1.10.4; 1.10.10; 1.10.12; 1.10.16; 1.10.20; 1.10.22;
Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.


Revision tags: netbsd-4-0-1-RELEASE wrstuden-fixsa-newbase wrstuden-fixsa-base-1 netbsd-4-0-RELEASE netbsd-4-0-RC5 matt-nb4-arm-base netbsd-4-0-RC4 netbsd-4-0-RC3 netbsd-4-0-RC2 netbsd-4-0-RC1 wrstuden-fixsa-base post-newlock2-merge newlock2-nbase yamt-splraiseipl-base5 yamt-splraiseipl-base4 yamt-splraiseipl-base3 abandoned-netbsd-4-base yamt-splraiseipl-base2 yamt-splraiseipl-base yamt-pdpolicy-base9 newlock2-base yamt-pdpolicy-base8 yamt-pdpolicy-base7 netbsd-4-base yamt-pdpolicy-base6 chap-midi-nbase gdamore-uart-base yamt-pdpolicy-base5 chap-midi-base yamt-pdpolicy-base4 yamt-pdpolicy-base3 peter-altq-base yamt-pdpolicy-base2 elad-kernelauth-base yamt-pdpolicy-base yamt-uio_vmspace-base5 simonb-timecounters-base rpaulo-netinet-merge-pcb-base
# 1.9 16-Feb-2006 perry

branches: 1.9.20;
Change "inline" back to "__inline" in .h files -- C99 is still too
new, and some apps compile things in C89 mode. C89 keywords stay.

As per core@.


# 1.8 24-Dec-2005 perry

branches: 1.8.2; 1.8.4; 1.8.6;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.


# 1.7 11-Dec-2005 christos

merge ktrace-lwp.


Revision tags: yamt-readahead-base3 yamt-readahead-base2 yamt-readahead-pervnode yamt-readahead-perfile yamt-readahead-base yamt-vop-base3 yamt-vop-base2 thorpej-vnode-attr-base yamt-vop-base ktrace-lwp-base
# 1.6 04-Jul-2005 blymn

branches: 1.6.2;
Remove bogus external declaration for pdes, it appears not to be needed.


Revision tags: netbsd-3-1-1-RELEASE netbsd-3-0-3-RELEASE netbsd-3-1-RELEASE netbsd-3-0-2-RELEASE netbsd-3-1-RC4 netbsd-3-1-RC3 netbsd-3-1-RC2 netbsd-3-1-RC1 netbsd-3-0-1-RELEASE netbsd-3-0-RELEASE netbsd-3-0-RC6 netbsd-3-0-RC5 netbsd-3-0-RC4 netbsd-3-0-RC3 netbsd-3-0-RC2 netbsd-3-0-RC1 yamt-km-base4 yamt-km-base3 netbsd-3-base yamt-km-base2 yamt-km-base kent-audio2-base kent-audio1-beforemerge kent-audio1-base
# 1.5 08-Aug-2004 yamt

kvtopte: use a correct base addr for LARGEPAGES.


# 1.4 08-Aug-2004 yamt

correct VAs in a comment.


# 1.3 15-Jun-2004 fvdl

Add a prototype for pmap_changeprot_local, a function that changes
protection for a page and doesn't care about TLB shootdowns.


# 1.2 04-Jun-2004 sekiya

Use the SPLAY_* macros. Copied from the i386 pmap, okay'ed by fvdl@


Revision tags: netbsd-2-0-3-RELEASE netbsd-2-1-RELEASE netbsd-2-1-RC6 netbsd-2-1-RC5 netbsd-2-1-RC4 netbsd-2-1-RC3 netbsd-2-1-RC2 netbsd-2-1-RC1 netbsd-2-0-2-RELEASE netbsd-2-0-1-RELEASE netbsd-2-base netbsd-2-0-RELEASE netbsd-2-0-RC5 netbsd-2-0-RC4 netbsd-2-0-RC3 netbsd-2-0-RC2 netbsd-2-0-RC1 netbsd-2-0-base
# 1.1 26-Apr-2003 fvdl

branches: 1.1.2;
Rename the x86_64 port to amd64, as this is the actual name used for
the processor family now. x86_64 is kept as the MACHINE_ARCH value,
since it's already widely used (by e.g. the toolchain, etc), and
by other operating systems.