pmap.h revision 1.15 
1/*	$NetBSD: pmap.h,v 1.15 2007/11/22 16:16:45 bouyer Exp $	*/
2
3/*
4 *
5 * Copyright (c) 1997 Charles D. Cranor and Washington University.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 *    must display the following acknowledgment:
18 *      This product includes software developed by Charles D. Cranor and
19 *      Washington University.
20 * 4. The name of the author may not be used to endorse or promote products
21 *    derived from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/*
36 * Copyright (c) 2001 Wasabi Systems, Inc.
37 * All rights reserved.
38 *
39 * Written by Frank van der Linden for Wasabi Systems, Inc.
40 *
41 * Redistribution and use in source and binary forms, with or without
42 * modification, are permitted provided that the following conditions
43 * are met:
44 * 1. Redistributions of source code must retain the above copyright
45 *    notice, this list of conditions and the following disclaimer.
46 * 2. Redistributions in binary form must reproduce the above copyright
47 *    notice, this list of conditions and the following disclaimer in the
48 *    documentation and/or other materials provided with the distribution.
49 * 3. All advertising materials mentioning features or use of this software
50 *    must display the following acknowledgement:
51 *      This product includes software developed for the NetBSD Project by
52 *      Wasabi Systems, Inc.
53 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
54 *    or promote products derived from this software without specific prior
55 *    written permission.
56 *
57 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
60 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
67 * POSSIBILITY OF SUCH DAMAGE.
68 */
69
70#ifndef	_AMD64_PMAP_H_
71#define	_AMD64_PMAP_H_
72
73#if defined(_KERNEL_OPT)
74#include "opt_xen.h"
75#endif
76
77#include <machine/pte.h>
78#include <machine/segments.h>
79#include <machine/atomic.h>
80#ifdef _KERNEL
81#include <machine/cpufunc.h>
82#endif
83
84#include <uvm/uvm_object.h>
85#ifdef XEN
86#include <xen/xenfunc.h>
87#include <xen/xenpmap.h>
88#endif /* XEN */
89
90/*
91 * The x86_64 pmap module closely resembles the i386 one. It uses
92 * the same recursive entry scheme, and the same alternate area
93 * trick for accessing non-current pmaps. See the i386 pmap.h
94 * for a description. The obvious difference is that 3 extra
95 * levels of page table need to be dealt with. The level 1 page
96 * table pages are at:
97 *
98 * l1: 0x00007f8000000000 - 0x00007fffffffffff     (39 bits, needs PML4 entry)
99 *
100 * The alternate space is at:
101 *
102 * l1: 0xffffff8000000000 - 0xffffffffffffffff     (39 bits, needs PML4 entry)
103 *
104 * The rest is kept as physical pages in 3 UVM objects, and is
105 * temporarily mapped for virtual access when needed.
106 *
107 * Note that address space is signed, so the layout for 48 bits is:
108 *
109 *  +---------------------------------+ 0xffffffffffffffff
110 *  |                                 |
111 *  |    alt.L1 table (PTE pages)     |
112 *  |                                 |
113 *  +---------------------------------+ 0xffffff8000000000
114 *  ~                                 ~
115 *  |                                 |
116 *  |         Kernel Space            |
117 *  |                                 |
118 *  |                                 |
119 *  +---------------------------------+ 0xffff800000000000 = 0x0000800000000000
120 *  |                                 |
121 *  |    alt.L1 table (PTE pages)     |
122 *  |                                 |
123 *  +---------------------------------+ 0x00007f8000000000
124 *  ~                                 ~
125 *  |                                 |
126 *  |         User Space              |
127 *  |                                 |
128 *  |                                 |
129 *  +---------------------------------+ 0x0000000000000000
130 *
131 * In other words, there is a 'VA hole' at 0x0000800000000000 -
132 * 0xffff800000000000 which will trap, just as on, for example,
133 * sparcv9.
134 *
135 * The unused space can be used if needed, but it adds a little more
136 * complexity to the calculations.
137 */
138
139/*
140 * The first generation of Hammer processors can use 48 bits of
141 * virtual memory, and 40 bits of physical memory. This will be
142 * more for later generations. These defines can be changed to
143 * variable names containing the # of bits, extracted from an
144 * extended cpuid instruction (variables are harder to use during
145 * bootstrap, though)
146 */
147#define VIRT_BITS	48
148#define PHYS_BITS	40
149
150/*
151 * Mask to get rid of the sign-extended part of addresses.
152 */
153#define VA_SIGN_MASK		0xffff000000000000
154#define VA_SIGN_NEG(va)		((va) | VA_SIGN_MASK)
155/*
156 * XXXfvdl this one's not right.
157 */
158#define VA_SIGN_POS(va)		((va) & ~VA_SIGN_MASK)
159
160#define L4_SLOT_PTE		255
161#ifndef XEN
162#define L4_SLOT_KERN		256
163#else
164/* Xen use slots 256-272, let's move farther */
165#define L4_SLOT_KERN		320
166#endif
167#define L4_SLOT_KERNBASE	511
168#define L4_SLOT_APTE		510
169
170#define PDIR_SLOT_KERN	L4_SLOT_KERN
171#define PDIR_SLOT_PTE	L4_SLOT_PTE
172#define PDIR_SLOT_APTE	L4_SLOT_APTE
173
174/*
175 * the following defines give the virtual addresses of various MMU
176 * data structures:
177 * PTE_BASE and APTE_BASE: the base VA of the linear PTE mappings
178 * PTD_BASE and APTD_BASE: the base VA of the recursive mapping of the PTD
179 * PDP_PDE and APDP_PDE: the VA of the PDE that points back to the PDP/APDP
180 *
181 */
182
183#define PTE_BASE  ((pt_entry_t *) (L4_SLOT_PTE * NBPD_L4))
184#define APTE_BASE ((pt_entry_t *) (VA_SIGN_NEG((L4_SLOT_APTE * NBPD_L4))))
185
186#define L1_BASE		PTE_BASE
187#define AL1_BASE	APTE_BASE
188
189#define L2_BASE ((pd_entry_t *)((char *)L1_BASE + L4_SLOT_PTE * NBPD_L3))
190#define L3_BASE ((pd_entry_t *)((char *)L2_BASE + L4_SLOT_PTE * NBPD_L2))
191#define L4_BASE ((pd_entry_t *)((char *)L3_BASE + L4_SLOT_PTE * NBPD_L1))
192
193#define AL2_BASE ((pd_entry_t *)((char *)AL1_BASE + L4_SLOT_PTE * NBPD_L3))
194#define AL3_BASE ((pd_entry_t *)((char *)AL2_BASE + L4_SLOT_PTE * NBPD_L2))
195#define AL4_BASE ((pd_entry_t *)((char *)AL3_BASE + L4_SLOT_PTE * NBPD_L1))
196
197#define PDP_PDE		(L4_BASE + PDIR_SLOT_PTE)
198#define APDP_PDE	(L4_BASE + PDIR_SLOT_APTE)
199
200#define PDP_BASE	L4_BASE
201#define APDP_BASE	AL4_BASE
202
203#define NKL4_MAX_ENTRIES	(unsigned long)1
204#define NKL3_MAX_ENTRIES	(unsigned long)(NKL4_MAX_ENTRIES * 512)
205#define NKL2_MAX_ENTRIES	(unsigned long)(NKL3_MAX_ENTRIES * 512)
206#define NKL1_MAX_ENTRIES	(unsigned long)(NKL2_MAX_ENTRIES * 512)
207
208#define NKL4_KIMG_ENTRIES	1
209#define NKL3_KIMG_ENTRIES	1
210#define NKL2_KIMG_ENTRIES	8
211
212/*
213 * Since kva space is below the kernel in its entirety, we start off
214 * with zero entries on each level.
215 */
216#define NKL4_START_ENTRIES	0
217#define NKL3_START_ENTRIES	0
218#define NKL2_START_ENTRIES	0
219#define NKL1_START_ENTRIES	0	/* XXX */
220
221#define NTOPLEVEL_PDES		(PAGE_SIZE / (sizeof (pd_entry_t)))
222
223#define NPDPG			(PAGE_SIZE / sizeof (pd_entry_t))
224
225#define PTP_MASK_INITIALIZER	{ L1_FRAME, L2_FRAME, L3_FRAME, L4_FRAME }
226#define PTP_SHIFT_INITIALIZER	{ L1_SHIFT, L2_SHIFT, L3_SHIFT, L4_SHIFT }
227#define NKPTP_INITIALIZER	{ NKL1_START_ENTRIES, NKL2_START_ENTRIES, \
228				  NKL3_START_ENTRIES, NKL4_START_ENTRIES }
229#define NKPTPMAX_INITIALIZER	{ NKL1_MAX_ENTRIES, NKL2_MAX_ENTRIES, \
230				  NKL3_MAX_ENTRIES, NKL4_MAX_ENTRIES }
231#define NBPD_INITIALIZER	{ NBPD_L1, NBPD_L2, NBPD_L3, NBPD_L4 }
232#define PDES_INITIALIZER	{ L2_BASE, L3_BASE, L4_BASE }
233#define APDES_INITIALIZER	{ AL2_BASE, AL3_BASE, AL4_BASE }
234
235#define PTP_LEVELS	4
236
237/*
238 * PG_AVAIL usage: we make use of the ignored bits of the PTE
239 */
240
241#define PG_W		PG_AVAIL1	/* "wired" mapping */
242#define PG_PVLIST	PG_AVAIL2	/* mapping has entry on pvlist */
243/* PG_AVAIL3 not used */
244
245#define	PG_X		0		/* XXX dummy */
246
247/*
248 * Number of PTE's per cache line.  8 byte pte, 64-byte cache line
249 * Used to avoid false sharing of cache lines.
250 */
251#define NPTECL		8
252
253#include <x86/pmap.h>
254
255#ifndef XEN
256#define pmap_pa2pte(a)			(a)
257#define pmap_pte2pa(a)			((a) & PG_FRAME)
258#define pmap_pte_set(p, n)		do { *(p) = (n); } while (0)
259#define pmap_pte_testset(p, n)		x86_atomic_testset_u64(p, n)
260#define pmap_pte_setbits(p, b)		x86_atomic_setbits_u64(p, b)
261#define pmap_pte_clearbits(p, b)	x86_atomic_clearbits_u64(p, b)
262#define pmap_pte_flush()		/* nothing */
263#define pmap_cpu_has_pg_n()		(1)
264#define pmap_cpu_has_invlpg		(1)
265#else
266static __inline pt_entry_t
267pmap_pa2pte(paddr_t pa)
268{
269	return (pt_entry_t)xpmap_ptom_masked(pa);
270}
271
272static __inline paddr_t
273pmap_pte2pa(pt_entry_t pte)
274{
275	return xpmap_mtop_masked(pte & PG_FRAME);
276}
277static __inline void
278pmap_pte_set(pt_entry_t *pte, pt_entry_t npte)
279{
280	int s = splvm();
281	xpq_queue_pte_update((pt_entry_t *)xpmap_ptetomach(pte), npte);
282	splx(s);
283}
284
285static __inline pt_entry_t
286pmap_pte_testset(volatile pt_entry_t *pte, pt_entry_t npte)
287{
288	int s = splvm();
289	pt_entry_t opte = *pte;
290	xpq_queue_pte_update((pt_entry_t *)xpmap_ptetomach(__UNVOLATILE(pte)),
291	    npte);
292	xpq_flush_queue();
293	splx(s);
294	return opte;
295}
296
297static __inline void
298pmap_pte_setbits(volatile pt_entry_t *pte, pt_entry_t bits)
299{
300	int s = splvm();
301	xpq_queue_pte_update((pt_entry_t *)xpmap_ptetomach(__UNVOLATILE(pte)),
302	    (*pte) | bits);
303	xpq_flush_queue();
304	splx(s);
305}
306
307static __inline void
308pmap_pte_clearbits(volatile pt_entry_t *pte, pt_entry_t bits)
309{
310	int s = splvm();
311	xpq_queue_pte_update((pt_entry_t *)xpmap_ptetomach(__UNVOLATILE(pte)),
312	    (*pte) & ~bits);
313	xpq_flush_queue();
314	splx(s);
315}
316
317#define pmap_cpu_has_pg_n()		(1)
318#define pmap_cpu_has_invlpg		(1)
319static __inline void
320pmap_pte_flush(void)
321{
322	int s = splvm();
323	xpq_flush_queue();
324	splx(s);
325}
326#endif
327
328void pmap_prealloc_lowmem_ptps(void);
329void pmap_changeprot_local(vaddr_t, vm_prot_t);
330
331#endif	/* _AMD64_PMAP_H_ */
332