pmap.h revision 1.20
1/* $NetBSD: pmap.h,v 1.20 2008/01/20 18:41:47 bouyer Exp $ */ 2 3/* 4 * 5 * Copyright (c) 1997 Charles D. Cranor and Washington University. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgment: 18 * This product includes software developed by Charles D. Cranor and 19 * Washington University. 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35/* 36 * Copyright (c) 2001 Wasabi Systems, Inc. 37 * All rights reserved. 38 * 39 * Written by Frank van der Linden for Wasabi Systems, Inc. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed for the NetBSD Project by 52 * Wasabi Systems, Inc. 53 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 54 * or promote products derived from this software without specific prior 55 * written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 * POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70#ifndef _AMD64_PMAP_H_ 71#define _AMD64_PMAP_H_ 72 73#if defined(_KERNEL_OPT) 74#include "opt_xen.h" 75#endif 76 77#include <sys/atomic.h> 78 79#include <machine/pte.h> 80#include <machine/segments.h> 81#ifdef _KERNEL 82#include <machine/cpufunc.h> 83#endif 84 85#include <uvm/uvm_object.h> 86#ifdef XEN 87#include <xen/xenfunc.h> 88#include <xen/xenpmap.h> 89#endif /* XEN */ 90 91/* 92 * The x86_64 pmap module closely resembles the i386 one. It uses 93 * the same recursive entry scheme, and the same alternate area 94 * trick for accessing non-current pmaps. See the i386 pmap.h 95 * for a description. The obvious difference is that 3 extra 96 * levels of page table need to be dealt with. The level 1 page 97 * table pages are at: 98 * 99 * l1: 0x00007f8000000000 - 0x00007fffffffffff (39 bits, needs PML4 entry) 100 * 101 * The alternate space is at: 102 * 103 * l1: 0xffffff8000000000 - 0xffffffffffffffff (39 bits, needs PML4 entry) 104 * 105 * The rest is kept as physical pages in 3 UVM objects, and is 106 * temporarily mapped for virtual access when needed. 107 * 108 * Note that address space is signed, so the layout for 48 bits is: 109 * 110 * +---------------------------------+ 0xffffffffffffffff 111 * | | 112 * | alt.L1 table (PTE pages) | 113 * | | 114 * +---------------------------------+ 0xffffff8000000000 115 * ~ ~ 116 * | | 117 * | Kernel Space | 118 * | | 119 * | | 120 * +---------------------------------+ 0xffff800000000000 = 0x0000800000000000 121 * | | 122 * | alt.L1 table (PTE pages) | 123 * | | 124 * +---------------------------------+ 0x00007f8000000000 125 * ~ ~ 126 * | | 127 * | User Space | 128 * | | 129 * | | 130 * +---------------------------------+ 0x0000000000000000 131 * 132 * In other words, there is a 'VA hole' at 0x0000800000000000 - 133 * 0xffff800000000000 which will trap, just as on, for example, 134 * sparcv9. 135 * 136 * The unused space can be used if needed, but it adds a little more 137 * complexity to the calculations. 138 */ 139 140/* 141 * The first generation of Hammer processors can use 48 bits of 142 * virtual memory, and 40 bits of physical memory. This will be 143 * more for later generations. These defines can be changed to 144 * variable names containing the # of bits, extracted from an 145 * extended cpuid instruction (variables are harder to use during 146 * bootstrap, though) 147 */ 148#define VIRT_BITS 48 149#define PHYS_BITS 40 150 151/* 152 * Mask to get rid of the sign-extended part of addresses. 153 */ 154#define VA_SIGN_MASK 0xffff000000000000 155#define VA_SIGN_NEG(va) ((va) | VA_SIGN_MASK) 156/* 157 * XXXfvdl this one's not right. 158 */ 159#define VA_SIGN_POS(va) ((va) & ~VA_SIGN_MASK) 160 161#define L4_SLOT_PTE 255 162#ifndef XEN 163#define L4_SLOT_KERN 256 164#else 165/* Xen use slots 256-272, let's move farther */ 166#define L4_SLOT_KERN 320 167#endif 168#define L4_SLOT_KERNBASE 511 169#define L4_SLOT_APTE 510 170 171#define PDIR_SLOT_KERN L4_SLOT_KERN 172#define PDIR_SLOT_PTE L4_SLOT_PTE 173#define PDIR_SLOT_APTE L4_SLOT_APTE 174 175/* 176 * the following defines give the virtual addresses of various MMU 177 * data structures: 178 * PTE_BASE and APTE_BASE: the base VA of the linear PTE mappings 179 * PTD_BASE and APTD_BASE: the base VA of the recursive mapping of the PTD 180 * PDP_PDE and APDP_PDE: the VA of the PDE that points back to the PDP/APDP 181 * 182 */ 183 184#define PTE_BASE ((pt_entry_t *) (L4_SLOT_PTE * NBPD_L4)) 185#define APTE_BASE ((pt_entry_t *) (VA_SIGN_NEG((L4_SLOT_APTE * NBPD_L4)))) 186 187#define L1_BASE PTE_BASE 188#define AL1_BASE APTE_BASE 189 190#define L2_BASE ((pd_entry_t *)((char *)L1_BASE + L4_SLOT_PTE * NBPD_L3)) 191#define L3_BASE ((pd_entry_t *)((char *)L2_BASE + L4_SLOT_PTE * NBPD_L2)) 192#define L4_BASE ((pd_entry_t *)((char *)L3_BASE + L4_SLOT_PTE * NBPD_L1)) 193 194#define AL2_BASE ((pd_entry_t *)((char *)AL1_BASE + L4_SLOT_PTE * NBPD_L3)) 195#define AL3_BASE ((pd_entry_t *)((char *)AL2_BASE + L4_SLOT_PTE * NBPD_L2)) 196#define AL4_BASE ((pd_entry_t *)((char *)AL3_BASE + L4_SLOT_PTE * NBPD_L1)) 197 198#define PDP_PDE (L4_BASE + PDIR_SLOT_PTE) 199#define APDP_PDE (L4_BASE + PDIR_SLOT_APTE) 200 201#define PDP_BASE L4_BASE 202#define APDP_BASE AL4_BASE 203 204#define NKL4_MAX_ENTRIES (unsigned long)1 205#define NKL3_MAX_ENTRIES (unsigned long)(NKL4_MAX_ENTRIES * 512) 206#define NKL2_MAX_ENTRIES (unsigned long)(NKL3_MAX_ENTRIES * 512) 207#define NKL1_MAX_ENTRIES (unsigned long)(NKL2_MAX_ENTRIES * 512) 208 209#define NKL4_KIMG_ENTRIES 1 210#define NKL3_KIMG_ENTRIES 1 211#define NKL2_KIMG_ENTRIES 10 212 213/* 214 * Since kva space is below the kernel in its entirety, we start off 215 * with zero entries on each level. 216 */ 217#define NKL4_START_ENTRIES 0 218#define NKL3_START_ENTRIES 0 219#define NKL2_START_ENTRIES 0 220#define NKL1_START_ENTRIES 0 /* XXX */ 221 222#define NTOPLEVEL_PDES (PAGE_SIZE / (sizeof (pd_entry_t))) 223 224#define NPDPG (PAGE_SIZE / sizeof (pd_entry_t)) 225 226#define PTP_MASK_INITIALIZER { L1_FRAME, L2_FRAME, L3_FRAME, L4_FRAME } 227#define PTP_SHIFT_INITIALIZER { L1_SHIFT, L2_SHIFT, L3_SHIFT, L4_SHIFT } 228#define NKPTP_INITIALIZER { NKL1_START_ENTRIES, NKL2_START_ENTRIES, \ 229 NKL3_START_ENTRIES, NKL4_START_ENTRIES } 230#define NKPTPMAX_INITIALIZER { NKL1_MAX_ENTRIES, NKL2_MAX_ENTRIES, \ 231 NKL3_MAX_ENTRIES, NKL4_MAX_ENTRIES } 232#define NBPD_INITIALIZER { NBPD_L1, NBPD_L2, NBPD_L3, NBPD_L4 } 233#define PDES_INITIALIZER { L2_BASE, L3_BASE, L4_BASE } 234#define APDES_INITIALIZER { AL2_BASE, AL3_BASE, AL4_BASE } 235 236#define PTP_LEVELS 4 237 238/* 239 * PG_AVAIL usage: we make use of the ignored bits of the PTE 240 */ 241 242#define PG_W PG_AVAIL1 /* "wired" mapping */ 243#define PG_PVLIST PG_AVAIL2 /* mapping has entry on pvlist */ 244/* PG_AVAIL3 not used */ 245 246#define PG_X 0 /* XXX dummy */ 247 248/* 249 * Number of PTE's per cache line. 8 byte pte, 64-byte cache line 250 * Used to avoid false sharing of cache lines. 251 */ 252#define NPTECL 8 253 254#include <x86/pmap.h> 255 256#ifndef XEN 257#define pmap_pa2pte(a) (a) 258#define pmap_pte2pa(a) ((a) & PG_FRAME) 259#define pmap_pte_set(p, n) do { *(p) = (n); } while (0) 260#define pmap_pte_cas(p, o, n) atomic_cas_64((p), (o), (n)) 261#define pmap_pte_testset(p, n) \ 262 atomic_swap_ulong((volatile unsigned long *)p, n) 263#define pmap_pte_setbits(p, b) \ 264 atomic_or_ulong((volatile unsigned long *)p, b) 265#define pmap_pte_clearbits(p, b) \ 266 atomic_and_ulong((volatile unsigned long *)p, ~(b)) 267#define pmap_pte_flush() /* nothing */ 268#else 269static __inline pt_entry_t 270pmap_pa2pte(paddr_t pa) 271{ 272 return (pt_entry_t)xpmap_ptom_masked(pa); 273} 274 275static __inline paddr_t 276pmap_pte2pa(pt_entry_t pte) 277{ 278 return xpmap_mtop_masked(pte & PG_FRAME); 279} 280static __inline void 281pmap_pte_set(pt_entry_t *pte, pt_entry_t npte) 282{ 283 int s = splvm(); 284 xpq_queue_pte_update((pt_entry_t *)xpmap_ptetomach(pte), npte); 285 splx(s); 286} 287 288static __inline pt_entry_t 289pmap_pte_cas(volatile pt_entry_t *ptep, pt_entry_t o, pt_entry_t n) 290{ 291 int s = splvm(); 292 pt_entry_t opte = *ptep; 293 294 if (opte == o) { 295 xpq_queue_pte_update((pt_entry_t *)xpmap_ptetomach(__UNVOLATILE(ptep)), n); 296 xpq_flush_queue(); 297 } 298 splx(s); 299 return opte; 300} 301 302static __inline pt_entry_t 303pmap_pte_testset(volatile pt_entry_t *pte, pt_entry_t npte) 304{ 305 int s = splvm(); 306 pt_entry_t opte = *pte; 307 xpq_queue_pte_update((pt_entry_t *)xpmap_ptetomach(__UNVOLATILE(pte)), 308 npte); 309 xpq_flush_queue(); 310 splx(s); 311 return opte; 312} 313 314static __inline void 315pmap_pte_setbits(volatile pt_entry_t *pte, pt_entry_t bits) 316{ 317 int s = splvm(); 318 xpq_queue_pte_update((pt_entry_t *)xpmap_ptetomach(__UNVOLATILE(pte)), 319 (*pte) | bits); 320 xpq_flush_queue(); 321 splx(s); 322} 323 324static __inline void 325pmap_pte_clearbits(volatile pt_entry_t *pte, pt_entry_t bits) 326{ 327 int s = splvm(); 328 xpq_queue_pte_update((pt_entry_t *)xpmap_ptetomach(__UNVOLATILE(pte)), 329 (*pte) & ~bits); 330 xpq_flush_queue(); 331 splx(s); 332} 333 334static __inline void 335pmap_pte_flush(void) 336{ 337 int s = splvm(); 338 xpq_flush_queue(); 339 splx(s); 340} 341#endif 342 343void pmap_prealloc_lowmem_ptps(void); 344void pmap_changeprot_local(vaddr_t, vm_prot_t); 345 346#endif /* _AMD64_PMAP_H_ */ 347