1 /* $NetBSD: isp1763hc_rrreg.h,v 1.1 2026/10/11 17:31:04 rkujawa Exp $ */ 2 3 /*- 4 * Copyright (c) 2026 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Radoslaw Kujawa. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Individual Computers RapidRoad USB on a clockport. 34 * 35 * 8-bit window to the ISP1763A via CPLD. 36 */ 37 38 #ifndef _AMIGA_CLOCKPORT_ISP1763HC_RRREG_H_ 39 #define _AMIGA_CLOCKPORT_ISP1763HC_RRREG_H_ 40 41 #define RR_NREGS 16 42 43 #define RR_BANKA 0 /* chip address lines 7:3, ctx A */ 44 #define RR_BANKA_ID_MASK 0x1b 45 #define RR_BANKA_ID 0x10 46 #define RR_BANKB 1 /* same, ctx B */ 47 #define RR_STATUS 2 48 #define RR_STATUS_GATE __BIT(0) 49 #define RR_STATUS_INT __BIT(1) 50 #define RR_CTRL 3 51 #define RR_CTRL_GATE __BIT(0) 52 #define RR_CTRL_CTXB __BIT(1) 53 #define RR_MEMLO 4 /* chip 0xc4 */ 54 #define RR_MEMHI 5 /* chip 0xc5 */ 55 #define RR_DATA 6 /* chip 0xc6 */ 56 #define RR_WINDOW 8 /* chip registers bank */ 57 58 #define RR_BANK(reg) ((reg) >> 3) 59 #define RR_SLOT(reg) (RR_WINDOW + ((reg) & 7)) 60 61 /* config flags */ 62 #define RR_FLAGS_FORCE __BIT(0) 63 64 #endif /* !_AMIGA_CLOCKPORT_ISP1763HC_RRREG_H_ */ 65