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flscvar.h revision 1.3.2.1
      1  1.3.2.1  mellon /*	$NetBSD: flscvar.h,v 1.3.2.1 1997/10/24 20:47:47 mellon Exp $	*/
      2      1.2   veego 
      3      1.1  chopps /*
      4      1.3  mhitch  * Copyright (c) 1997 Michael L. Hitch.
      5      1.3  mhitch  * All rights reserved.
      6      1.1  chopps  *
      7      1.1  chopps  * Redistribution and use in source and binary forms, with or without
      8      1.1  chopps  * modification, are permitted provided that the following conditions
      9      1.1  chopps  * are met:
     10      1.1  chopps  * 1. Redistributions of source code must retain the above copyright
     11      1.1  chopps  *    notice, this list of conditions and the following disclaimer.
     12      1.1  chopps  * 2. Redistributions in binary form must reproduce the above copyright
     13      1.1  chopps  *    notice, this list of conditions and the following disclaimer in the
     14      1.1  chopps  *    documentation and/or other materials provided with the distribution.
     15      1.1  chopps  * 3. All advertising materials mentioning features or use of this software
     16      1.1  chopps  *    must display the following acknowledgement:
     17      1.3  mhitch  *	This product includes software developed for the NetBSD Project
     18      1.3  mhitch  *	by Michael L. Hitch.
     19      1.1  chopps  * 4. The name of the author may not be used to endorse or promote products
     20      1.3  mhitch  *    derived from this software without specific prior written permission.
     21      1.1  chopps  *
     22      1.1  chopps  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     23      1.1  chopps  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24      1.1  chopps  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25      1.1  chopps  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     26      1.1  chopps  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     27      1.1  chopps  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     28      1.1  chopps  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     29      1.1  chopps  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     30      1.1  chopps  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     31      1.1  chopps  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32      1.1  chopps  */
     33      1.1  chopps 
     34      1.3  mhitch struct flsc_softc {
     35      1.3  mhitch 	struct ncr53c9x_softc	sc_ncr53c9x;	/* glue to MI code */
     36      1.3  mhitch 
     37      1.3  mhitch 	struct	isr		 sc_isr;	/* Interrupt chain struct */
     38      1.3  mhitch 
     39      1.3  mhitch 	volatile u_char *sc_reg;		/* the registers */
     40      1.3  mhitch 	volatile u_char *sc_dmabase;
     41      1.3  mhitch 
     42      1.3  mhitch 	int		sc_active;		/* Pseudo-DMA state vars */
     43      1.3  mhitch 	int		sc_piomode;
     44      1.3  mhitch 	int		sc_datain;
     45      1.3  mhitch 	int		sc_tc;
     46      1.3  mhitch 	size_t		sc_dmasize;
     47      1.3  mhitch 	size_t		sc_dmatrans;
     48      1.3  mhitch 	char		**sc_dmaaddr;
     49      1.3  mhitch 	size_t		*sc_pdmalen;
     50      1.3  mhitch 	vm_offset_t	sc_pa;
     51      1.3  mhitch 
     52  1.3.2.1  mellon 	char		*sc_alignbuf;
     53  1.3.2.1  mellon 	u_char		sc_pad1[2];		/* XXX */
     54  1.3.2.1  mellon 	u_char		sc_unalignbuf[256];
     55      1.3  mhitch 	u_char		sc_pad2[16];
     56      1.3  mhitch 	u_char		sc_hardbits;
     57      1.3  mhitch 	u_char		sc_portbits;
     58      1.3  mhitch 	u_char		sc_csr;
     59      1.3  mhitch 	u_char		sc_xfr_align;
     60      1.3  mhitch 
     61      1.1  chopps };
     62      1.1  chopps 
     63      1.3  mhitch #define FLSC_HB_DISABLED	0x01
     64      1.3  mhitch #define FLSC_HB_BUSID6		0x02
     65      1.3  mhitch #define FLSC_HB_SEAGATE		0x04
     66      1.3  mhitch #define FLSC_HB_SLOW		0x08
     67      1.3  mhitch #define FLSC_HB_SYNCHRON	0x10
     68      1.3  mhitch #define FLSC_HB_CREQ		0x20
     69      1.3  mhitch #define FLSC_HB_IACT		0x40
     70      1.3  mhitch #define FLSC_HB_MINT		0x80
     71      1.3  mhitch 
     72      1.3  mhitch #define FLSC_PB_ESI		0x01
     73      1.3  mhitch #define FLSC_PB_EDI		0x02
     74      1.3  mhitch #define FLSC_PB_ENABLE_DMA	0x04
     75      1.3  mhitch #define FLSC_PB_DISABLE_DMA	0x00	/* Symmetric reasons */
     76      1.3  mhitch #define FLSC_PB_DMA_WRITE	0x08
     77      1.3  mhitch #define FLSC_PB_DMA_READ	0x00	/* Symmetric reasons */
     78      1.3  mhitch #define FLSC_PB_LED		0x10
     79      1.1  chopps 
     80      1.3  mhitch #define FLSC_PB_INT_BITS (FLSC_PB_ESI | FLSC_PB_EDI)
     81      1.3  mhitch #define FLSC_PB_DMA_BITS (FLSC_PB_ENABLE_DMA | FLSC_PB_DMA_WRITE)
     82