1 /* $NetBSD: wdc_buddha.c,v 1.11 2023/12/20 00:40:42 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Michael L. Hitch and Ignatios Souvatzis. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/types.h> 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/device.h> 36 #include <sys/bus.h> 37 38 #include <machine/cpu.h> 39 #include <machine/intr.h> 40 #include <machine/bswap.h> 41 42 #include <amiga/amiga/cia.h> 43 #include <amiga/amiga/custom.h> 44 #include <amiga/amiga/device.h> 45 #include <amiga/dev/zbusvar.h> 46 47 #include <dev/ata/atavar.h> 48 #include <dev/ic/wdcvar.h> 49 50 #define BUDDHA_MAX_CHANNELS 3 51 52 struct wdc_buddha_softc { 53 struct wdc_softc sc_wdcdev; 54 struct ata_channel *wdc_chanarray[BUDDHA_MAX_CHANNELS]; 55 struct ata_channel channels[BUDDHA_MAX_CHANNELS]; 56 struct bus_space_tag sc_iot; 57 struct isr sc_isr; 58 volatile char *ba; 59 }; 60 61 int wdc_buddha_probe(device_t, cfdata_t, void *); 62 void wdc_buddha_attach(device_t, device_t, void *); 63 int wdc_buddha_intr(void *); 64 65 CFATTACH_DECL_NEW(wdc_buddha, sizeof(struct wdc_buddha_softc), 66 wdc_buddha_probe, wdc_buddha_attach, NULL, NULL); 67 68 int 69 wdc_buddha_probe(device_t parent, cfdata_t cfp, void *aux) 70 { 71 struct zbus_args *zap; 72 73 zap = aux; 74 75 if (zap->manid != 4626) 76 return 0; 77 78 if ((zap->prodid != 0) && /* Buddha */ 79 (zap->prodid != 42)) /* Catweasel */ 80 return 0; 81 82 return 1; 83 } 84 85 void 86 wdc_buddha_attach(device_t parent, device_t self, void *aux) 87 { 88 struct wdc_buddha_softc *sc; 89 struct zbus_args *zap; 90 int nchannels; 91 int ch; 92 93 sc = device_private(self); 94 sc->sc_wdcdev.sc_atac.atac_dev = self; 95 zap = aux; 96 97 sc->ba = zap->va; 98 99 sc->sc_iot.base = (bus_addr_t)sc->ba; 100 sc->sc_iot.absm = &amiga_bus_stride_4swap; 101 102 nchannels = 2; 103 if (zap->prodid == 42) { 104 aprint_normal(": Catweasel Z2\n"); 105 nchannels = 3; 106 } else if (zap->serno == 0) 107 aprint_normal(": Buddha\n"); 108 else 109 aprint_normal(": Buddha Flash\n"); 110 111 /* XXX pio mode setting not implemented yet. */ 112 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16; 113 sc->sc_wdcdev.sc_atac.atac_pio_cap = 0; 114 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; 115 sc->sc_wdcdev.sc_atac.atac_nchannels = nchannels; 116 sc->sc_wdcdev.wdc_maxdrives = 2; 117 118 wdc_allocate_regs(&sc->sc_wdcdev); 119 120 for (ch = 0; ch < nchannels; ch++) { 121 struct ata_channel *cp; 122 struct wdc_regs *wdr; 123 int i; 124 125 cp = &sc->channels[ch]; 126 sc->wdc_chanarray[ch] = cp; 127 128 cp->ch_channel = ch; 129 cp->ch_atac = &sc->sc_wdcdev.sc_atac; 130 131 /* 132 * XXX According to the Buddha docs, we should use a method 133 * array that adds 0x40 to the address for byte accesses, to 134 * get the slow timing for command accesses, and the 0x00 135 * offset for the word (fast) accesses. This will be 136 * reconsidered when implementing setting the timing. 137 * 138 * XXX We also could consider to abuse the 32bit capability, or 139 * 32bit accesses to the words (which will read in two words) 140 * for better performance. 141 * -is 142 */ 143 wdr = CHAN_TO_WDC_REGS(cp); 144 145 wdr->cmd_iot = &sc->sc_iot; 146 if (bus_space_map(wdr->cmd_iot, 0x210+ch*0x80, 8, 0, 147 &wdr->cmd_baseioh)) { 148 aprint_error_dev(self, "couldn't map cmd registers\n"); 149 return; 150 } 151 152 wdr->ctl_iot = &sc->sc_iot; 153 if (bus_space_map(wdr->ctl_iot, 0x250+ch*0x80, 2, 0, 154 &wdr->ctl_ioh)) { 155 bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, 8); 156 aprint_error_dev(self, "couldn't map ctl registers\n"); 157 return; 158 } 159 160 for (i = 0; i < WDC_NREG; i++) { 161 if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, 162 i, i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) { 163 aprint_error_dev(self, 164 "couldn't subregion cmd regs\n"); 165 return; 166 } 167 } 168 169 wdc_init_shadow_regs(wdr); 170 wdcattach(cp); 171 } 172 173 sc->sc_isr.isr_intr = wdc_buddha_intr; 174 sc->sc_isr.isr_arg = sc; 175 sc->sc_isr.isr_ipl = 2; 176 add_isr (&sc->sc_isr); 177 sc->ba[0xfc0] = 0; /* enable interrupts */ 178 } 179 180 int 181 wdc_buddha_intr(void *arg) 182 { 183 struct wdc_buddha_softc *sc = (struct wdc_buddha_softc *)arg; 184 int nchannels, i, ret; 185 volatile char *p; 186 187 ret = 0; 188 nchannels = sc->sc_wdcdev.sc_atac.atac_nchannels; 189 p = sc->ba; 190 191 for (i=0; i<nchannels; i++) { 192 if (p[0xf00 + 0x40*i] & 0x80) { 193 wdcintr(&sc->channels[i]); 194 ret = 1; 195 } 196 } 197 198 return ret; 199 } 200
Indexes created Sat Sep 20 22:09:52 GMT 2025