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wstsc.c revision 1.18
      1  1.18     veego /*	$NetBSD: wstsc.c,v 1.18 1996/12/23 09:10:31 veego Exp $	*/
      2   1.4       cgd 
      3   1.1    chopps /*
      4   1.2    chopps  * Copyright (c) 1994 Michael L. Hitch
      5   1.1    chopps  * Copyright (c) 1982, 1990 The Regents of the University of California.
      6   1.1    chopps  * All rights reserved.
      7   1.1    chopps  *
      8   1.1    chopps  * Redistribution and use in source and binary forms, with or without
      9   1.1    chopps  * modification, are permitted provided that the following conditions
     10   1.1    chopps  * are met:
     11   1.1    chopps  * 1. Redistributions of source code must retain the above copyright
     12   1.1    chopps  *    notice, this list of conditions and the following disclaimer.
     13   1.1    chopps  * 2. Redistributions in binary form must reproduce the above copyright
     14   1.1    chopps  *    notice, this list of conditions and the following disclaimer in the
     15   1.1    chopps  *    documentation and/or other materials provided with the distribution.
     16   1.1    chopps  * 3. All advertising materials mentioning features or use of this software
     17   1.1    chopps  *    must display the following acknowledgement:
     18   1.1    chopps  *	This product includes software developed by the University of
     19   1.1    chopps  *	California, Berkeley and its contributors.
     20   1.1    chopps  * 4. Neither the name of the University nor the names of its contributors
     21   1.1    chopps  *    may be used to endorse or promote products derived from this software
     22   1.1    chopps  *    without specific prior written permission.
     23   1.1    chopps  *
     24   1.1    chopps  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     25   1.1    chopps  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     26   1.1    chopps  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     27   1.1    chopps  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     28   1.1    chopps  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     29   1.1    chopps  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     30   1.1    chopps  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31   1.1    chopps  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32   1.1    chopps  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33   1.1    chopps  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34   1.1    chopps  * SUCH DAMAGE.
     35   1.1    chopps  *
     36   1.1    chopps  *	@(#)supradma.c
     37   1.1    chopps  */
     38   1.2    chopps #include <sys/param.h>
     39   1.2    chopps #include <sys/systm.h>
     40   1.2    chopps #include <sys/kernel.h>
     41   1.2    chopps #include <sys/device.h>
     42   1.2    chopps #include <scsi/scsi_all.h>
     43   1.2    chopps #include <scsi/scsiconf.h>
     44   1.2    chopps #include <amiga/amiga/device.h>
     45   1.8    chopps #include <amiga/amiga/isr.h>
     46   1.2    chopps #include <amiga/dev/scireg.h>
     47   1.2    chopps #include <amiga/dev/scivar.h>
     48   1.6    chopps #include <amiga/dev/zbusvar.h>
     49   1.2    chopps 
     50   1.2    chopps void wstscattach __P((struct device *, struct device *, void *));
     51  1.18     veego int wstscmatch __P((struct device *, struct cfdata *, void *));
     52   1.1    chopps 
     53   1.2    chopps int wstsc_dma_xfer_in __P((struct sci_softc *dev, int len,
     54   1.2    chopps     register u_char *buf, int phase));
     55   1.2    chopps int wstsc_dma_xfer_out __P((struct sci_softc *dev, int len,
     56   1.2    chopps     register u_char *buf, int phase));
     57   1.2    chopps int wstsc_dma_xfer_in2 __P((struct sci_softc *dev, int len,
     58   1.2    chopps     register u_short *buf, int phase));
     59   1.2    chopps int wstsc_dma_xfer_out2 __P((struct sci_softc *dev, int len,
     60   1.2    chopps     register u_short *buf, int phase));
     61  1.11     veego int wstsc_intr __P((void *));
     62   1.1    chopps 
     63   1.2    chopps struct scsi_adapter wstsc_scsiswitch = {
     64   1.2    chopps 	sci_scsicmd,
     65   1.2    chopps 	sci_minphys,
     66   1.2    chopps 	0,			/* no lun support */
     67   1.2    chopps 	0,			/* no lun support */
     68   1.2    chopps };
     69   1.2    chopps 
     70   1.2    chopps struct scsi_device wstsc_scsidev = {
     71   1.2    chopps 	NULL,		/* use default error handler */
     72   1.2    chopps 	NULL,		/* do not have a start functio */
     73   1.2    chopps 	NULL,		/* have no async handler */
     74   1.2    chopps 	NULL,		/* Use default done routine */
     75   1.2    chopps };
     76   1.1    chopps 
     77   1.2    chopps #ifdef DEBUG
     78   1.2    chopps extern int sci_debug;
     79  1.16  christos #define QPRINTF(a) if (sci_debug > 1) printf a
     80  1.11     veego #else
     81  1.11     veego #define QPRINTF(a)
     82   1.2    chopps #endif
     83   1.1    chopps 
     84   1.2    chopps extern int sci_data_wait;
     85   1.1    chopps 
     86   1.1    chopps int supradma_pseudo = 0;	/* 0=none, 1=byte, 2=word */
     87   1.1    chopps 
     88  1.10   thorpej struct cfattach wstsc_ca = {
     89  1.10   thorpej 	sizeof(struct sci_softc), wstscmatch, wstscattach
     90  1.10   thorpej };
     91  1.10   thorpej 
     92  1.10   thorpej struct cfdriver wstsc_cd = {
     93  1.10   thorpej 	NULL, "wstsc", DV_DULL, NULL, 0
     94  1.10   thorpej };
     95   1.1    chopps 
     96   1.2    chopps /*
     97   1.2    chopps  * if this a Supra WordSync board
     98   1.2    chopps  */
     99   1.2    chopps int
    100  1.18     veego wstscmatch(pdp, cfp, auxp)
    101   1.2    chopps 	struct device *pdp;
    102  1.18     veego 	struct cfdata *cfp;
    103  1.18     veego 	void *auxp;
    104   1.2    chopps {
    105   1.6    chopps 	struct zbus_args *zap;
    106   1.1    chopps 
    107   1.2    chopps 	zap = auxp;
    108   1.1    chopps 
    109   1.2    chopps 	/*
    110   1.2    chopps 	 * Check manufacturer and product id.
    111   1.2    chopps 	 */
    112   1.9    chopps 	if (zap->manid == 1056 && (
    113   1.9    chopps 	    zap->prodid == 12 ||	/* WordSync */
    114   1.9    chopps 	    zap->prodid == 13))		/* ByteSync */
    115   1.2    chopps 		return(1);
    116   1.2    chopps 	else
    117   1.2    chopps 		return(0);
    118   1.2    chopps }
    119   1.1    chopps 
    120   1.1    chopps void
    121   1.2    chopps wstscattach(pdp, dp, auxp)
    122   1.2    chopps 	struct device *pdp, *dp;
    123   1.2    chopps 	void *auxp;
    124   1.1    chopps {
    125   1.2    chopps 	volatile u_char *rp;
    126   1.2    chopps 	struct sci_softc *sc;
    127   1.6    chopps 	struct zbus_args *zap;
    128   1.2    chopps 
    129  1.16  christos 	printf("\n");
    130   1.3    chopps 
    131   1.2    chopps 	zap = auxp;
    132   1.2    chopps 
    133   1.2    chopps 	sc = (struct sci_softc *)dp;
    134   1.2    chopps 	rp = zap->va;
    135   1.2    chopps 	/*
    136   1.2    chopps 	 * set up 5380 register pointers
    137   1.2    chopps 	 * (Needs check on which Supra board this is - for now,
    138   1.2    chopps 	 *  just do the WordSync)
    139   1.2    chopps 	 */
    140   1.2    chopps 	sc->sci_data = rp + 0;
    141   1.2    chopps 	sc->sci_odata = rp + 0;
    142   1.2    chopps 	sc->sci_icmd = rp + 2;
    143   1.2    chopps 	sc->sci_mode = rp + 4;
    144   1.2    chopps 	sc->sci_tcmd = rp + 6;
    145   1.2    chopps 	sc->sci_bus_csr = rp + 8;
    146   1.2    chopps 	sc->sci_sel_enb = rp + 8;
    147   1.2    chopps 	sc->sci_csr = rp + 10;
    148   1.2    chopps 	sc->sci_dma_send = rp + 10;
    149   1.2    chopps 	sc->sci_idata = rp + 12;
    150   1.2    chopps 	sc->sci_trecv = rp + 12;
    151   1.2    chopps 	sc->sci_iack = rp + 14;
    152   1.2    chopps 	sc->sci_irecv = rp + 14;
    153   1.2    chopps 
    154   1.1    chopps 	if (supradma_pseudo == 2) {
    155  1.12    mhitch 		sc->dma_xfer_in = (int(*)(struct sci_softc *, int, u_char *, int))wstsc_dma_xfer_in2;
    156  1.12    mhitch 		sc->dma_xfer_out = (int(*)(struct sci_softc *, int, u_char *, int))wstsc_dma_xfer_out2;
    157   1.2    chopps 	}
    158   1.2    chopps 	else if (supradma_pseudo == 1) {
    159   1.2    chopps 		sc->dma_xfer_in = wstsc_dma_xfer_in;
    160   1.2    chopps 		sc->dma_xfer_out = wstsc_dma_xfer_out;
    161   1.1    chopps 	}
    162   1.2    chopps 
    163   1.8    chopps 	sc->sc_isr.isr_intr = wstsc_intr;
    164   1.8    chopps 	sc->sc_isr.isr_arg = sc;
    165   1.8    chopps 	sc->sc_isr.isr_ipl = 2;
    166   1.8    chopps 	add_isr(&sc->sc_isr);
    167   1.8    chopps 
    168   1.2    chopps 	scireset(sc);
    169   1.2    chopps 
    170  1.14       cgd 	sc->sc_link.channel = SCSI_CHANNEL_ONLY_ONE;
    171   1.2    chopps 	sc->sc_link.adapter_softc = sc;
    172   1.7    chopps 	sc->sc_link.adapter_target = 7;
    173   1.2    chopps 	sc->sc_link.adapter = &wstsc_scsiswitch;
    174   1.2    chopps 	sc->sc_link.device = &wstsc_scsidev;
    175   1.7    chopps 	sc->sc_link.openings = 1;
    176  1.17   thorpej 	sc->sc_link.max_target = 7;
    177   1.2    chopps 	TAILQ_INIT(&sc->sc_xslist);
    178   1.2    chopps 
    179   1.2    chopps 	/*
    180   1.2    chopps 	 * attach all scsi units on us
    181   1.2    chopps 	 */
    182  1.14       cgd 	config_found(dp, &sc->sc_link, scsiprint);
    183   1.1    chopps }
    184   1.1    chopps 
    185   1.2    chopps int
    186   1.2    chopps wstsc_dma_xfer_in (dev, len, buf, phase)
    187   1.1    chopps 	struct sci_softc *dev;
    188   1.1    chopps 	int len;
    189   1.1    chopps 	register u_char *buf;
    190   1.1    chopps 	int phase;
    191   1.1    chopps {
    192   1.1    chopps 	int wait = sci_data_wait;
    193   1.1    chopps 	volatile register u_char *sci_dma = dev->sci_idata;
    194   1.1    chopps 	volatile register u_char *sci_csr = dev->sci_csr;
    195  1.11     veego #ifdef DEBUG
    196  1.11     veego 	u_char *obp = (u_char *) buf;
    197  1.11     veego #endif
    198   1.1    chopps 
    199   1.1    chopps 	QPRINTF(("supradma_in %d, csr=%02x\n", len, *dev->sci_bus_csr));
    200   1.1    chopps 
    201   1.1    chopps 	*dev->sci_tcmd = phase;
    202   1.1    chopps 	*dev->sci_icmd = 0;
    203   1.1    chopps 	*dev->sci_mode = SCI_MODE_DMA;
    204   1.1    chopps 	*dev->sci_irecv = 0;
    205   1.1    chopps 
    206   1.1    chopps 	while (len >= 128) {
    207   1.1    chopps 		wait = sci_data_wait;
    208   1.1    chopps 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    209   1.1    chopps 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    210   1.1    chopps 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    211   1.1    chopps 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    212   1.1    chopps 			  || --wait < 0) {
    213   1.1    chopps #ifdef DEBUG
    214   1.1    chopps 				if (sci_debug | 1)
    215  1.16  christos 					printf("supradma2_in fail: l%d i%x w%d\n",
    216   1.1    chopps 					len, *dev->sci_bus_csr, wait);
    217   1.1    chopps #endif
    218   1.1    chopps 				*dev->sci_mode = 0;
    219   1.1    chopps 				return 0;
    220   1.1    chopps 			}
    221   1.1    chopps 		}
    222   1.1    chopps 
    223   1.3    chopps #define R1	(*buf++ = *sci_dma)
    224   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    225   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    226   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    227   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    228   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    229   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    230   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    231   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    232   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    233   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    234   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    235   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    236   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    237   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    238   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    239   1.3    chopps 		R1; R1; R1; R1; R1; R1; R1; R1;
    240   1.1    chopps 		len -= 128;
    241   1.1    chopps 	}
    242   1.1    chopps 
    243   1.1    chopps 	while (len > 0) {
    244   1.1    chopps 		wait = sci_data_wait;
    245   1.1    chopps 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    246   1.1    chopps 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    247   1.1    chopps 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    248   1.1    chopps 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    249   1.1    chopps 			  || --wait < 0) {
    250   1.1    chopps #ifdef DEBUG
    251   1.1    chopps 				if (sci_debug | 1)
    252  1.16  christos 					printf("supradma1_in fail: l%d i%x w%d\n",
    253   1.1    chopps 					len, *dev->sci_bus_csr, wait);
    254   1.1    chopps #endif
    255   1.1    chopps 				*dev->sci_mode = 0;
    256   1.1    chopps 				return 0;
    257   1.1    chopps 			}
    258   1.1    chopps 		}
    259   1.1    chopps 
    260   1.1    chopps 		*buf++ = *sci_dma;
    261   1.1    chopps 		len--;
    262   1.1    chopps 	}
    263   1.1    chopps 
    264   1.1    chopps 	QPRINTF(("supradma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    265   1.1    chopps 	  len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
    266   1.1    chopps 	  obp[6], obp[7], obp[8], obp[9]));
    267   1.1    chopps 
    268   1.1    chopps 	*dev->sci_mode = 0;
    269   1.1    chopps 	return 0;
    270   1.1    chopps }
    271   1.1    chopps 
    272   1.2    chopps int
    273   1.2    chopps wstsc_dma_xfer_out (dev, len, buf, phase)
    274   1.1    chopps 	struct sci_softc *dev;
    275   1.1    chopps 	int len;
    276   1.1    chopps 	register u_char *buf;
    277   1.1    chopps 	int phase;
    278   1.1    chopps {
    279   1.1    chopps 	int wait = sci_data_wait;
    280   1.1    chopps 	volatile register u_char *sci_dma = dev->sci_data;
    281   1.1    chopps 	volatile register u_char *sci_csr = dev->sci_csr;
    282   1.1    chopps 
    283   1.1    chopps 	QPRINTF(("supradma_out %d, csr=%02x\n", len, *dev->sci_bus_csr));
    284   1.1    chopps 
    285   1.1    chopps 	QPRINTF(("supradma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    286   1.1    chopps   	 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
    287   1.1    chopps 	 buf[6], buf[7], buf[8], buf[9]));
    288   1.1    chopps 
    289   1.1    chopps 	*dev->sci_tcmd = phase;
    290   1.1    chopps 	*dev->sci_mode = SCI_MODE_DMA;
    291   1.1    chopps 	*dev->sci_icmd = SCI_ICMD_DATA;
    292   1.1    chopps 	*dev->sci_dma_send = 0;
    293   1.1    chopps 	while (len > 0) {
    294   1.1    chopps 		wait = sci_data_wait;
    295   1.1    chopps 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    296   1.1    chopps 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    297   1.1    chopps 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    298   1.1    chopps 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    299   1.1    chopps 			  || --wait < 0) {
    300   1.1    chopps #ifdef DEBUG
    301   1.1    chopps 				if (sci_debug)
    302  1.16  christos 					printf("supradma_out fail: l%d i%x w%d\n",
    303  1.11     veego 					len, *dev->sci_bus_csr, wait);
    304   1.1    chopps #endif
    305   1.1    chopps 				*dev->sci_mode = 0;
    306   1.1    chopps 				return 0;
    307   1.1    chopps 			}
    308   1.1    chopps 		}
    309   1.1    chopps 
    310   1.1    chopps 		*sci_dma = *buf++;
    311   1.1    chopps 		len--;
    312   1.1    chopps 	}
    313   1.1    chopps 
    314   1.1    chopps 	wait = sci_data_wait;
    315   1.1    chopps 	while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
    316   1.1    chopps 	  SCI_CSR_PHASE_MATCH && --wait);
    317   1.1    chopps 
    318   1.1    chopps 
    319   1.1    chopps 	*dev->sci_mode = 0;
    320   1.1    chopps 	*dev->sci_icmd = 0;
    321   1.1    chopps 	return 0;
    322   1.1    chopps }
    323   1.1    chopps 
    324   1.1    chopps 
    325   1.2    chopps int
    326   1.2    chopps wstsc_dma_xfer_in2 (dev, len, buf, phase)
    327   1.1    chopps 	struct sci_softc *dev;
    328   1.1    chopps 	int len;
    329   1.1    chopps 	register u_short *buf;
    330   1.1    chopps 	int phase;
    331   1.1    chopps {
    332   1.1    chopps 	volatile register u_short *sci_dma = (u_short *)(dev->sci_idata + 0x10);
    333   1.1    chopps 	volatile register u_char *sci_csr = dev->sci_csr + 0x10;
    334  1.11     veego #ifdef DEBUG
    335  1.11     veego 	u_char *obp = (u_char *) buf;
    336  1.11     veego #endif
    337  1.11     veego #if 0
    338  1.11     veego 	int wait = sci_data_wait;
    339  1.11     veego #endif
    340   1.1    chopps 
    341   1.1    chopps 	QPRINTF(("supradma_in2 %d, csr=%02x\n", len, *dev->sci_bus_csr));
    342   1.1    chopps 
    343   1.1    chopps 	*dev->sci_tcmd = phase;
    344   1.1    chopps 	*dev->sci_mode = SCI_MODE_DMA;
    345   1.1    chopps 	*dev->sci_icmd = 0;
    346   1.1    chopps 	*(dev->sci_irecv + 16) = 0;
    347   1.1    chopps 	while (len >= 128) {
    348   1.1    chopps #if 0
    349   1.1    chopps 		wait = sci_data_wait;
    350   1.1    chopps 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    351   1.1    chopps 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    352   1.1    chopps 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    353   1.1    chopps 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    354   1.1    chopps 			  || --wait < 0) {
    355   1.1    chopps #ifdef DEBUG
    356   1.1    chopps 				if (sci_debug | 1)
    357  1.16  christos 					printf("supradma2_in2 fail: l%d i%x w%d\n",
    358   1.1    chopps 					len, *dev->sci_bus_csr, wait);
    359   1.1    chopps #endif
    360   1.1    chopps 				*dev->sci_mode &= ~SCI_MODE_DMA;
    361   1.1    chopps 				return 0;
    362   1.1    chopps 			}
    363   1.1    chopps 		}
    364   1.1    chopps #else
    365   1.1    chopps 		while (!(*sci_csr & SCI_CSR_DREQ))
    366   1.1    chopps 			;
    367   1.1    chopps #endif
    368   1.1    chopps 
    369   1.3    chopps #define R2	(*buf++ = *sci_dma)
    370   1.3    chopps 		R2; R2; R2; R2; R2; R2; R2; R2;
    371   1.3    chopps 		R2; R2; R2; R2; R2; R2; R2; R2;
    372   1.3    chopps 		R2; R2; R2; R2; R2; R2; R2; R2;
    373   1.3    chopps 		R2; R2; R2; R2; R2; R2; R2; R2;
    374   1.3    chopps 		R2; R2; R2; R2; R2; R2; R2; R2;
    375   1.3    chopps 		R2; R2; R2; R2; R2; R2; R2; R2;
    376   1.3    chopps 		R2; R2; R2; R2; R2; R2; R2; R2;
    377   1.3    chopps 		R2; R2; R2; R2; R2; R2; R2; R2;
    378   1.1    chopps 		len -= 128;
    379   1.1    chopps 	}
    380   1.1    chopps 	while (len > 0) {
    381   1.1    chopps #if 0
    382   1.1    chopps 		wait = sci_data_wait;
    383   1.1    chopps 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    384   1.1    chopps 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    385   1.1    chopps 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    386   1.1    chopps 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    387   1.1    chopps 			  || --wait < 0) {
    388   1.1    chopps #ifdef DEBUG
    389   1.1    chopps 				if (sci_debug | 1)
    390  1.16  christos 					printf("supradma1_in2 fail: l%d i%x w%d\n",
    391   1.1    chopps 					len, *dev->sci_bus_csr, wait);
    392   1.1    chopps #endif
    393   1.1    chopps 				*dev->sci_mode &= ~SCI_MODE_DMA;
    394   1.1    chopps 				return 0;
    395   1.1    chopps 			}
    396   1.1    chopps 		}
    397   1.1    chopps #else
    398   1.1    chopps 		while (!(*sci_csr * SCI_CSR_DREQ))
    399   1.1    chopps 			;
    400   1.1    chopps #endif
    401   1.1    chopps 
    402   1.1    chopps 		*buf++ = *sci_dma;
    403   1.1    chopps 		len -= 2;
    404   1.1    chopps 	}
    405   1.1    chopps 
    406   1.1    chopps 	QPRINTF(("supradma_in2 {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    407   1.1    chopps 	  len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
    408   1.1    chopps 	  obp[6], obp[7], obp[8], obp[9]));
    409   1.1    chopps 
    410   1.1    chopps 	*dev->sci_irecv = 0;
    411   1.1    chopps 	*dev->sci_mode = 0;
    412   1.1    chopps 	return 0;
    413   1.1    chopps }
    414   1.1    chopps 
    415   1.2    chopps int
    416   1.2    chopps wstsc_dma_xfer_out2 (dev, len, buf, phase)
    417   1.1    chopps 	struct sci_softc *dev;
    418   1.1    chopps 	int len;
    419   1.1    chopps 	register u_short *buf;
    420   1.1    chopps 	int phase;
    421   1.1    chopps {
    422   1.1    chopps 	volatile register u_short *sci_dma = (ushort *)(dev->sci_data + 0x10);
    423   1.1    chopps 	volatile register u_char *sci_bus_csr = dev->sci_bus_csr;
    424  1.11     veego #ifdef DEBUG
    425  1.11     veego 	u_char *obp = (u_char *) buf;
    426  1.11     veego #endif
    427  1.11     veego #if 0
    428  1.11     veego 	int wait = sci_data_wait;
    429  1.11     veego #endif
    430   1.1    chopps 
    431   1.1    chopps 	QPRINTF(("supradma_out2 %d, csr=%02x\n", len, *dev->sci_bus_csr));
    432   1.1    chopps 
    433   1.1    chopps 	QPRINTF(("supradma_out2 {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
    434   1.1    chopps   	 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
    435   1.1    chopps 	 obp[6], obp[7], obp[8], obp[9]));
    436   1.1    chopps 
    437   1.1    chopps 	*dev->sci_tcmd = phase;
    438   1.1    chopps 	*dev->sci_mode = SCI_MODE_DMA;
    439   1.1    chopps 	*dev->sci_icmd = SCI_ICMD_DATA;
    440   1.1    chopps 	*dev->sci_dma_send = 0;
    441   1.3    chopps 	while (len > 64) {
    442   1.3    chopps #if 0
    443   1.3    chopps 		wait = sci_data_wait;
    444   1.3    chopps 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    445   1.3    chopps 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    446   1.3    chopps 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    447   1.3    chopps 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    448   1.3    chopps 			  || --wait < 0) {
    449   1.3    chopps #ifdef DEBUG
    450   1.3    chopps 				if (sci_debug)
    451  1.16  christos 					printf("supradma_out2 fail: l%d i%x w%d\n",
    452   1.3    chopps 					len, csr, wait);
    453   1.3    chopps #endif
    454   1.3    chopps 				*dev->sci_mode = 0;
    455   1.3    chopps 				return 0;
    456   1.3    chopps 			}
    457   1.3    chopps 		}
    458   1.3    chopps #else
    459   1.3    chopps 		*dev->sci_mode = 0;
    460   1.3    chopps 		*dev->sci_icmd &= ~SCI_ICMD_ACK;
    461   1.3    chopps 		while (!(*sci_bus_csr & SCI_BUS_REQ))
    462   1.3    chopps 			;
    463   1.3    chopps 		*dev->sci_mode = SCI_MODE_DMA;
    464   1.3    chopps 		*dev->sci_dma_send = 0;
    465   1.3    chopps #endif
    466   1.3    chopps 
    467   1.3    chopps #define W2	(*sci_dma = *buf++)
    468   1.3    chopps 		W2; W2; W2; W2; W2; W2; W2; W2;
    469   1.3    chopps 		W2; W2; W2; W2; W2; W2; W2; W2;
    470   1.3    chopps 		if (*(sci_bus_csr + 0x10) & SCI_BUS_REQ)
    471   1.3    chopps 			;
    472   1.3    chopps 		len -= 64;
    473   1.3    chopps 	}
    474   1.3    chopps 
    475   1.1    chopps 	while (len > 0) {
    476   1.1    chopps #if 0
    477   1.1    chopps 		wait = sci_data_wait;
    478   1.1    chopps 		while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
    479   1.1    chopps 		  (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
    480   1.1    chopps 			if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
    481   1.1    chopps 			  || !(*dev->sci_bus_csr & SCI_BUS_BSY)
    482   1.1    chopps 			  || --wait < 0) {
    483   1.1    chopps #ifdef DEBUG
    484   1.1    chopps 				if (sci_debug)
    485  1.16  christos 					printf("supradma_out2 fail: l%d i%x w%d\n",
    486   1.1    chopps 					len, csr, wait);
    487   1.1    chopps #endif
    488   1.1    chopps 				*dev->sci_mode = 0;
    489   1.1    chopps 				return 0;
    490   1.1    chopps 			}
    491   1.1    chopps 		}
    492   1.1    chopps #else
    493   1.1    chopps 		*dev->sci_mode = 0;
    494   1.1    chopps 		*dev->sci_icmd &= ~SCI_ICMD_ACK;
    495   1.1    chopps 		while (!(*sci_bus_csr & SCI_BUS_REQ))
    496   1.1    chopps 			;
    497   1.1    chopps 		*dev->sci_mode = SCI_MODE_DMA;
    498   1.1    chopps 		*dev->sci_dma_send = 0;
    499   1.1    chopps #endif
    500   1.1    chopps 
    501   1.3    chopps 		*sci_dma = *buf++;
    502   1.1    chopps 		if (*(sci_bus_csr + 0x10) & SCI_BUS_REQ)
    503   1.1    chopps 			;
    504   1.3    chopps 		len -= 2;
    505   1.1    chopps 	}
    506   1.1    chopps 
    507   1.1    chopps #if 0
    508   1.1    chopps 	wait = sci_data_wait;
    509   1.1    chopps 	while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
    510   1.1    chopps 	  SCI_CSR_PHASE_MATCH && --wait);
    511   1.1    chopps #endif
    512   1.1    chopps 
    513   1.1    chopps 
    514   1.1    chopps 	*dev->sci_irecv = 0;
    515   1.1    chopps 	*dev->sci_icmd &= ~SCI_ICMD_ACK;
    516   1.1    chopps 	*dev->sci_mode = 0;
    517   1.1    chopps 	*dev->sci_icmd = 0;
    518   1.1    chopps 	return 0;
    519   1.1    chopps }
    520   1.1    chopps 
    521   1.2    chopps int
    522  1.11     veego wstsc_intr(arg)
    523  1.11     veego 	void *arg;
    524   1.2    chopps {
    525  1.11     veego 	struct sci_softc *dev = arg;
    526   1.2    chopps 	u_char stat;
    527   1.2    chopps 
    528   1.8    chopps 	if ((*(dev->sci_csr + 0x10) & SCI_CSR_INT) == 0)
    529   1.8    chopps 		return (0);
    530   1.8    chopps 	stat = *(dev->sci_iack + 0x10);
    531   1.8    chopps 	return (1);
    532   1.1    chopps }
    533