wstsc.c revision 1.7 1 1.7 chopps /* $NetBSD: wstsc.c,v 1.7 1995/01/05 07:22:53 chopps Exp $ */
2 1.4 cgd
3 1.1 chopps /*
4 1.2 chopps * Copyright (c) 1994 Michael L. Hitch
5 1.1 chopps * Copyright (c) 1982, 1990 The Regents of the University of California.
6 1.1 chopps * All rights reserved.
7 1.1 chopps *
8 1.1 chopps * Redistribution and use in source and binary forms, with or without
9 1.1 chopps * modification, are permitted provided that the following conditions
10 1.1 chopps * are met:
11 1.1 chopps * 1. Redistributions of source code must retain the above copyright
12 1.1 chopps * notice, this list of conditions and the following disclaimer.
13 1.1 chopps * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 chopps * notice, this list of conditions and the following disclaimer in the
15 1.1 chopps * documentation and/or other materials provided with the distribution.
16 1.1 chopps * 3. All advertising materials mentioning features or use of this software
17 1.1 chopps * must display the following acknowledgement:
18 1.1 chopps * This product includes software developed by the University of
19 1.1 chopps * California, Berkeley and its contributors.
20 1.1 chopps * 4. Neither the name of the University nor the names of its contributors
21 1.1 chopps * may be used to endorse or promote products derived from this software
22 1.1 chopps * without specific prior written permission.
23 1.1 chopps *
24 1.1 chopps * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 1.1 chopps * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 1.1 chopps * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 1.1 chopps * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 1.1 chopps * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 1.1 chopps * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 1.1 chopps * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 1.1 chopps * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 1.1 chopps * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 1.1 chopps * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 1.1 chopps * SUCH DAMAGE.
35 1.1 chopps *
36 1.1 chopps * @(#)supradma.c
37 1.1 chopps */
38 1.2 chopps #include <sys/param.h>
39 1.2 chopps #include <sys/systm.h>
40 1.2 chopps #include <sys/kernel.h>
41 1.2 chopps #include <sys/device.h>
42 1.2 chopps #include <scsi/scsi_all.h>
43 1.2 chopps #include <scsi/scsiconf.h>
44 1.2 chopps #include <amiga/amiga/device.h>
45 1.2 chopps #include <amiga/dev/scireg.h>
46 1.2 chopps #include <amiga/dev/scivar.h>
47 1.6 chopps #include <amiga/dev/zbusvar.h>
48 1.2 chopps
49 1.2 chopps int wstscprint __P((void *auxp, char *));
50 1.2 chopps void wstscattach __P((struct device *, struct device *, void *));
51 1.2 chopps int wstscmatch __P((struct device *, struct cfdata *, void *));
52 1.1 chopps
53 1.2 chopps int wstsc_dma_xfer_in __P((struct sci_softc *dev, int len,
54 1.2 chopps register u_char *buf, int phase));
55 1.2 chopps int wstsc_dma_xfer_out __P((struct sci_softc *dev, int len,
56 1.2 chopps register u_char *buf, int phase));
57 1.2 chopps int wstsc_dma_xfer_in2 __P((struct sci_softc *dev, int len,
58 1.2 chopps register u_short *buf, int phase));
59 1.2 chopps int wstsc_dma_xfer_out2 __P((struct sci_softc *dev, int len,
60 1.2 chopps register u_short *buf, int phase));
61 1.1 chopps
62 1.2 chopps struct scsi_adapter wstsc_scsiswitch = {
63 1.2 chopps sci_scsicmd,
64 1.2 chopps sci_minphys,
65 1.2 chopps 0, /* no lun support */
66 1.2 chopps 0, /* no lun support */
67 1.2 chopps };
68 1.2 chopps
69 1.2 chopps struct scsi_device wstsc_scsidev = {
70 1.2 chopps NULL, /* use default error handler */
71 1.2 chopps NULL, /* do not have a start functio */
72 1.2 chopps NULL, /* have no async handler */
73 1.2 chopps NULL, /* Use default done routine */
74 1.2 chopps };
75 1.1 chopps
76 1.2 chopps #define QPRINTF
77 1.1 chopps
78 1.2 chopps #ifdef DEBUG
79 1.2 chopps extern int sci_debug;
80 1.2 chopps #endif
81 1.1 chopps
82 1.2 chopps extern int sci_data_wait;
83 1.1 chopps
84 1.1 chopps int supradma_pseudo = 0; /* 0=none, 1=byte, 2=word */
85 1.1 chopps
86 1.2 chopps struct cfdriver wstsccd = {
87 1.5 chopps NULL, "wstsc", (cfmatch_t)wstscmatch, wstscattach,
88 1.2 chopps DV_DULL, sizeof(struct sci_softc), NULL, 0 };
89 1.1 chopps
90 1.2 chopps /*
91 1.2 chopps * if this a Supra WordSync board
92 1.2 chopps */
93 1.2 chopps int
94 1.2 chopps wstscmatch(pdp, cdp, auxp)
95 1.2 chopps struct device *pdp;
96 1.2 chopps struct cfdata *cdp;
97 1.2 chopps void *auxp;
98 1.2 chopps {
99 1.6 chopps struct zbus_args *zap;
100 1.1 chopps
101 1.2 chopps zap = auxp;
102 1.1 chopps
103 1.2 chopps /*
104 1.2 chopps * Check manufacturer and product id.
105 1.2 chopps */
106 1.2 chopps if (zap->manid == 1056 && zap->prodid == 12) /* add other boards? */
107 1.2 chopps return(1);
108 1.2 chopps else
109 1.2 chopps return(0);
110 1.2 chopps }
111 1.1 chopps
112 1.1 chopps void
113 1.2 chopps wstscattach(pdp, dp, auxp)
114 1.2 chopps struct device *pdp, *dp;
115 1.2 chopps void *auxp;
116 1.1 chopps {
117 1.2 chopps volatile u_char *rp;
118 1.2 chopps struct sci_softc *sc;
119 1.6 chopps struct zbus_args *zap;
120 1.2 chopps
121 1.3 chopps printf("\n");
122 1.3 chopps
123 1.2 chopps zap = auxp;
124 1.2 chopps
125 1.2 chopps sc = (struct sci_softc *)dp;
126 1.2 chopps rp = zap->va;
127 1.2 chopps /*
128 1.2 chopps * set up 5380 register pointers
129 1.2 chopps * (Needs check on which Supra board this is - for now,
130 1.2 chopps * just do the WordSync)
131 1.2 chopps */
132 1.2 chopps sc->sci_data = rp + 0;
133 1.2 chopps sc->sci_odata = rp + 0;
134 1.2 chopps sc->sci_icmd = rp + 2;
135 1.2 chopps sc->sci_mode = rp + 4;
136 1.2 chopps sc->sci_tcmd = rp + 6;
137 1.2 chopps sc->sci_bus_csr = rp + 8;
138 1.2 chopps sc->sci_sel_enb = rp + 8;
139 1.2 chopps sc->sci_csr = rp + 10;
140 1.2 chopps sc->sci_dma_send = rp + 10;
141 1.2 chopps sc->sci_idata = rp + 12;
142 1.2 chopps sc->sci_trecv = rp + 12;
143 1.2 chopps sc->sci_iack = rp + 14;
144 1.2 chopps sc->sci_irecv = rp + 14;
145 1.2 chopps
146 1.1 chopps if (supradma_pseudo == 2) {
147 1.2 chopps sc->dma_xfer_in = wstsc_dma_xfer_in2;
148 1.2 chopps sc->dma_xfer_out = wstsc_dma_xfer_out2;
149 1.2 chopps }
150 1.2 chopps else if (supradma_pseudo == 1) {
151 1.2 chopps sc->dma_xfer_in = wstsc_dma_xfer_in;
152 1.2 chopps sc->dma_xfer_out = wstsc_dma_xfer_out;
153 1.1 chopps }
154 1.2 chopps
155 1.2 chopps scireset(sc);
156 1.2 chopps
157 1.2 chopps sc->sc_link.adapter_softc = sc;
158 1.7 chopps sc->sc_link.adapter_target = 7;
159 1.2 chopps sc->sc_link.adapter = &wstsc_scsiswitch;
160 1.2 chopps sc->sc_link.device = &wstsc_scsidev;
161 1.7 chopps sc->sc_link.openings = 1;
162 1.2 chopps TAILQ_INIT(&sc->sc_xslist);
163 1.2 chopps
164 1.2 chopps /*
165 1.2 chopps * attach all scsi units on us
166 1.2 chopps */
167 1.2 chopps config_found(dp, &sc->sc_link, wstscprint);
168 1.2 chopps }
169 1.2 chopps
170 1.2 chopps /*
171 1.2 chopps * print diag if pnp is NULL else just extra
172 1.2 chopps */
173 1.2 chopps int
174 1.2 chopps wstscprint(auxp, pnp)
175 1.2 chopps void *auxp;
176 1.2 chopps char *pnp;
177 1.2 chopps {
178 1.2 chopps if (pnp == NULL)
179 1.2 chopps return(UNCONF);
180 1.2 chopps return(QUIET);
181 1.1 chopps }
182 1.1 chopps
183 1.2 chopps int
184 1.2 chopps wstsc_dma_xfer_in (dev, len, buf, phase)
185 1.1 chopps struct sci_softc *dev;
186 1.1 chopps int len;
187 1.1 chopps register u_char *buf;
188 1.1 chopps int phase;
189 1.1 chopps {
190 1.1 chopps int wait = sci_data_wait;
191 1.1 chopps u_char csr;
192 1.1 chopps u_char *obp = (u_char *) buf;
193 1.1 chopps volatile register u_char *sci_dma = dev->sci_idata;
194 1.1 chopps volatile register u_char *sci_csr = dev->sci_csr;
195 1.1 chopps
196 1.1 chopps QPRINTF(("supradma_in %d, csr=%02x\n", len, *dev->sci_bus_csr));
197 1.1 chopps
198 1.1 chopps *dev->sci_tcmd = phase;
199 1.1 chopps *dev->sci_icmd = 0;
200 1.1 chopps *dev->sci_mode = SCI_MODE_DMA;
201 1.1 chopps *dev->sci_irecv = 0;
202 1.1 chopps
203 1.1 chopps while (len >= 128) {
204 1.1 chopps wait = sci_data_wait;
205 1.1 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
206 1.1 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
207 1.1 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
208 1.1 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
209 1.1 chopps || --wait < 0) {
210 1.1 chopps #ifdef DEBUG
211 1.1 chopps if (sci_debug | 1)
212 1.1 chopps printf("supradma2_in fail: l%d i%x w%d\n",
213 1.1 chopps len, *dev->sci_bus_csr, wait);
214 1.1 chopps #endif
215 1.1 chopps *dev->sci_mode = 0;
216 1.1 chopps return 0;
217 1.1 chopps }
218 1.1 chopps }
219 1.1 chopps
220 1.3 chopps #define R1 (*buf++ = *sci_dma)
221 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
222 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
223 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
224 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
225 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
226 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
227 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
228 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
229 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
230 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
231 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
232 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
233 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
234 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
235 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
236 1.3 chopps R1; R1; R1; R1; R1; R1; R1; R1;
237 1.1 chopps len -= 128;
238 1.1 chopps }
239 1.1 chopps
240 1.1 chopps while (len > 0) {
241 1.1 chopps wait = sci_data_wait;
242 1.1 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
243 1.1 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
244 1.1 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
245 1.1 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
246 1.1 chopps || --wait < 0) {
247 1.1 chopps #ifdef DEBUG
248 1.1 chopps if (sci_debug | 1)
249 1.1 chopps printf("supradma1_in fail: l%d i%x w%d\n",
250 1.1 chopps len, *dev->sci_bus_csr, wait);
251 1.1 chopps #endif
252 1.1 chopps *dev->sci_mode = 0;
253 1.1 chopps return 0;
254 1.1 chopps }
255 1.1 chopps }
256 1.1 chopps
257 1.1 chopps *buf++ = *sci_dma;
258 1.1 chopps len--;
259 1.1 chopps }
260 1.1 chopps
261 1.1 chopps QPRINTF(("supradma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
262 1.1 chopps len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
263 1.1 chopps obp[6], obp[7], obp[8], obp[9]));
264 1.1 chopps
265 1.1 chopps *dev->sci_mode = 0;
266 1.1 chopps return 0;
267 1.1 chopps }
268 1.1 chopps
269 1.2 chopps int
270 1.2 chopps wstsc_dma_xfer_out (dev, len, buf, phase)
271 1.1 chopps struct sci_softc *dev;
272 1.1 chopps int len;
273 1.1 chopps register u_char *buf;
274 1.1 chopps int phase;
275 1.1 chopps {
276 1.1 chopps int wait = sci_data_wait;
277 1.1 chopps u_char csr;
278 1.1 chopps u_char *obp = buf;
279 1.1 chopps volatile register u_char *sci_dma = dev->sci_data;
280 1.1 chopps volatile register u_char *sci_csr = dev->sci_csr;
281 1.1 chopps
282 1.1 chopps QPRINTF(("supradma_out %d, csr=%02x\n", len, *dev->sci_bus_csr));
283 1.1 chopps
284 1.1 chopps QPRINTF(("supradma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
285 1.1 chopps len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5],
286 1.1 chopps buf[6], buf[7], buf[8], buf[9]));
287 1.1 chopps
288 1.1 chopps *dev->sci_tcmd = phase;
289 1.1 chopps *dev->sci_mode = SCI_MODE_DMA;
290 1.1 chopps *dev->sci_icmd = SCI_ICMD_DATA;
291 1.1 chopps *dev->sci_dma_send = 0;
292 1.1 chopps while (len > 0) {
293 1.1 chopps wait = sci_data_wait;
294 1.1 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
295 1.1 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
296 1.1 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
297 1.1 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
298 1.1 chopps || --wait < 0) {
299 1.1 chopps #ifdef DEBUG
300 1.1 chopps if (sci_debug)
301 1.1 chopps printf("supradma_out fail: l%d i%x w%d\n",
302 1.1 chopps len, csr, wait);
303 1.1 chopps #endif
304 1.1 chopps *dev->sci_mode = 0;
305 1.1 chopps return 0;
306 1.1 chopps }
307 1.1 chopps }
308 1.1 chopps
309 1.1 chopps *sci_dma = *buf++;
310 1.1 chopps len--;
311 1.1 chopps }
312 1.1 chopps
313 1.1 chopps wait = sci_data_wait;
314 1.1 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
315 1.1 chopps SCI_CSR_PHASE_MATCH && --wait);
316 1.1 chopps
317 1.1 chopps
318 1.1 chopps *dev->sci_mode = 0;
319 1.1 chopps *dev->sci_icmd = 0;
320 1.1 chopps return 0;
321 1.1 chopps }
322 1.1 chopps
323 1.1 chopps
324 1.2 chopps int
325 1.2 chopps wstsc_dma_xfer_in2 (dev, len, buf, phase)
326 1.1 chopps struct sci_softc *dev;
327 1.1 chopps int len;
328 1.1 chopps register u_short *buf;
329 1.1 chopps int phase;
330 1.1 chopps {
331 1.1 chopps int wait = sci_data_wait;
332 1.1 chopps u_char csr;
333 1.1 chopps u_char *obp = (u_char *) buf;
334 1.1 chopps volatile register u_short *sci_dma = (u_short *)(dev->sci_idata + 0x10);
335 1.1 chopps volatile register u_char *sci_csr = dev->sci_csr + 0x10;
336 1.1 chopps
337 1.1 chopps QPRINTF(("supradma_in2 %d, csr=%02x\n", len, *dev->sci_bus_csr));
338 1.1 chopps
339 1.1 chopps *dev->sci_tcmd = phase;
340 1.1 chopps *dev->sci_mode = SCI_MODE_DMA;
341 1.1 chopps *dev->sci_icmd = 0;
342 1.1 chopps *(dev->sci_irecv + 16) = 0;
343 1.1 chopps while (len >= 128) {
344 1.1 chopps #if 0
345 1.1 chopps wait = sci_data_wait;
346 1.1 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
347 1.1 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
348 1.1 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
349 1.1 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
350 1.1 chopps || --wait < 0) {
351 1.1 chopps #ifdef DEBUG
352 1.1 chopps if (sci_debug | 1)
353 1.1 chopps printf("supradma2_in2 fail: l%d i%x w%d\n",
354 1.1 chopps len, *dev->sci_bus_csr, wait);
355 1.1 chopps #endif
356 1.1 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
357 1.1 chopps return 0;
358 1.1 chopps }
359 1.1 chopps }
360 1.1 chopps #else
361 1.1 chopps while (!(*sci_csr & SCI_CSR_DREQ))
362 1.1 chopps ;
363 1.1 chopps #endif
364 1.1 chopps
365 1.3 chopps #define R2 (*buf++ = *sci_dma)
366 1.3 chopps R2; R2; R2; R2; R2; R2; R2; R2;
367 1.3 chopps R2; R2; R2; R2; R2; R2; R2; R2;
368 1.3 chopps R2; R2; R2; R2; R2; R2; R2; R2;
369 1.3 chopps R2; R2; R2; R2; R2; R2; R2; R2;
370 1.3 chopps R2; R2; R2; R2; R2; R2; R2; R2;
371 1.3 chopps R2; R2; R2; R2; R2; R2; R2; R2;
372 1.3 chopps R2; R2; R2; R2; R2; R2; R2; R2;
373 1.3 chopps R2; R2; R2; R2; R2; R2; R2; R2;
374 1.1 chopps len -= 128;
375 1.1 chopps }
376 1.1 chopps while (len > 0) {
377 1.1 chopps #if 0
378 1.1 chopps wait = sci_data_wait;
379 1.1 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
380 1.1 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
381 1.1 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
382 1.1 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
383 1.1 chopps || --wait < 0) {
384 1.1 chopps #ifdef DEBUG
385 1.1 chopps if (sci_debug | 1)
386 1.1 chopps printf("supradma1_in2 fail: l%d i%x w%d\n",
387 1.1 chopps len, *dev->sci_bus_csr, wait);
388 1.1 chopps #endif
389 1.1 chopps *dev->sci_mode &= ~SCI_MODE_DMA;
390 1.1 chopps return 0;
391 1.1 chopps }
392 1.1 chopps }
393 1.1 chopps #else
394 1.1 chopps while (!(*sci_csr * SCI_CSR_DREQ))
395 1.1 chopps ;
396 1.1 chopps #endif
397 1.1 chopps
398 1.1 chopps *buf++ = *sci_dma;
399 1.1 chopps len -= 2;
400 1.1 chopps }
401 1.1 chopps
402 1.1 chopps QPRINTF(("supradma_in2 {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
403 1.1 chopps len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
404 1.1 chopps obp[6], obp[7], obp[8], obp[9]));
405 1.1 chopps
406 1.1 chopps *dev->sci_irecv = 0;
407 1.1 chopps *dev->sci_mode = 0;
408 1.1 chopps return 0;
409 1.1 chopps }
410 1.1 chopps
411 1.2 chopps int
412 1.2 chopps wstsc_dma_xfer_out2 (dev, len, buf, phase)
413 1.1 chopps struct sci_softc *dev;
414 1.1 chopps int len;
415 1.1 chopps register u_short *buf;
416 1.1 chopps int phase;
417 1.1 chopps {
418 1.1 chopps int wait = sci_data_wait;
419 1.1 chopps u_char csr;
420 1.1 chopps u_char *obp = (u_char *) buf;
421 1.1 chopps volatile register u_short *sci_dma = (ushort *)(dev->sci_data + 0x10);
422 1.1 chopps volatile register u_char *sci_bus_csr = dev->sci_bus_csr;
423 1.1 chopps
424 1.1 chopps QPRINTF(("supradma_out2 %d, csr=%02x\n", len, *dev->sci_bus_csr));
425 1.1 chopps
426 1.1 chopps QPRINTF(("supradma_out2 {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
427 1.1 chopps len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5],
428 1.1 chopps obp[6], obp[7], obp[8], obp[9]));
429 1.1 chopps
430 1.1 chopps *dev->sci_tcmd = phase;
431 1.1 chopps *dev->sci_mode = SCI_MODE_DMA;
432 1.1 chopps *dev->sci_icmd = SCI_ICMD_DATA;
433 1.1 chopps *dev->sci_dma_send = 0;
434 1.3 chopps while (len > 64) {
435 1.3 chopps #if 0
436 1.3 chopps wait = sci_data_wait;
437 1.3 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
438 1.3 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
439 1.3 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
440 1.3 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
441 1.3 chopps || --wait < 0) {
442 1.3 chopps #ifdef DEBUG
443 1.3 chopps if (sci_debug)
444 1.3 chopps printf("supradma_out2 fail: l%d i%x w%d\n",
445 1.3 chopps len, csr, wait);
446 1.3 chopps #endif
447 1.3 chopps *dev->sci_mode = 0;
448 1.3 chopps return 0;
449 1.3 chopps }
450 1.3 chopps }
451 1.3 chopps #else
452 1.3 chopps *dev->sci_mode = 0;
453 1.3 chopps *dev->sci_icmd &= ~SCI_ICMD_ACK;
454 1.3 chopps while (!(*sci_bus_csr & SCI_BUS_REQ))
455 1.3 chopps ;
456 1.3 chopps *dev->sci_mode = SCI_MODE_DMA;
457 1.3 chopps *dev->sci_dma_send = 0;
458 1.3 chopps #endif
459 1.3 chopps
460 1.3 chopps #define W2 (*sci_dma = *buf++)
461 1.3 chopps W2; W2; W2; W2; W2; W2; W2; W2;
462 1.3 chopps W2; W2; W2; W2; W2; W2; W2; W2;
463 1.3 chopps if (*(sci_bus_csr + 0x10) & SCI_BUS_REQ)
464 1.3 chopps ;
465 1.3 chopps len -= 64;
466 1.3 chopps }
467 1.3 chopps
468 1.1 chopps while (len > 0) {
469 1.1 chopps #if 0
470 1.1 chopps wait = sci_data_wait;
471 1.1 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) !=
472 1.1 chopps (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) {
473 1.1 chopps if (!(*sci_csr & SCI_CSR_PHASE_MATCH)
474 1.1 chopps || !(*dev->sci_bus_csr & SCI_BUS_BSY)
475 1.1 chopps || --wait < 0) {
476 1.1 chopps #ifdef DEBUG
477 1.1 chopps if (sci_debug)
478 1.1 chopps printf("supradma_out2 fail: l%d i%x w%d\n",
479 1.1 chopps len, csr, wait);
480 1.1 chopps #endif
481 1.1 chopps *dev->sci_mode = 0;
482 1.1 chopps return 0;
483 1.1 chopps }
484 1.1 chopps }
485 1.1 chopps #else
486 1.1 chopps *dev->sci_mode = 0;
487 1.1 chopps *dev->sci_icmd &= ~SCI_ICMD_ACK;
488 1.1 chopps while (!(*sci_bus_csr & SCI_BUS_REQ))
489 1.1 chopps ;
490 1.1 chopps *dev->sci_mode = SCI_MODE_DMA;
491 1.1 chopps *dev->sci_dma_send = 0;
492 1.1 chopps #endif
493 1.1 chopps
494 1.3 chopps *sci_dma = *buf++;
495 1.1 chopps if (*(sci_bus_csr + 0x10) & SCI_BUS_REQ)
496 1.1 chopps ;
497 1.3 chopps len -= 2;
498 1.1 chopps }
499 1.1 chopps
500 1.1 chopps #if 0
501 1.1 chopps wait = sci_data_wait;
502 1.1 chopps while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) ==
503 1.1 chopps SCI_CSR_PHASE_MATCH && --wait);
504 1.1 chopps #endif
505 1.1 chopps
506 1.1 chopps
507 1.1 chopps *dev->sci_irecv = 0;
508 1.1 chopps *dev->sci_icmd &= ~SCI_ICMD_ACK;
509 1.1 chopps *dev->sci_mode = 0;
510 1.1 chopps *dev->sci_icmd = 0;
511 1.1 chopps return 0;
512 1.1 chopps }
513 1.1 chopps
514 1.2 chopps int
515 1.2 chopps wstsc_intr()
516 1.2 chopps {
517 1.1 chopps struct sci_softc *dev;
518 1.2 chopps int i, found;
519 1.2 chopps u_char stat;
520 1.2 chopps
521 1.2 chopps found = 0;
522 1.2 chopps for (i = 0; i < wstsccd.cd_ndevs; i++) {
523 1.2 chopps dev = wstsccd.cd_devs[i];
524 1.2 chopps if (dev == NULL)
525 1.2 chopps continue;
526 1.2 chopps if ((*(dev->sci_csr + 0x10) & SCI_CSR_INT) == 0)
527 1.2 chopps continue;
528 1.2 chopps ++found;
529 1.2 chopps stat = *(dev->sci_iack + 0x10);
530 1.1 chopps }
531 1.2 chopps return (found);
532 1.1 chopps }
533