wstsc.c revision 1.10
1 /* $NetBSD: wstsc.c,v 1.10 1996/03/17 01:17:56 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)supradma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <scsi/scsi_all.h> 43 #include <scsi/scsiconf.h> 44 #include <amiga/amiga/device.h> 45 #include <amiga/amiga/isr.h> 46 #include <amiga/dev/scireg.h> 47 #include <amiga/dev/scivar.h> 48 #include <amiga/dev/zbusvar.h> 49 50 int wstscprint __P((void *auxp, char *)); 51 void wstscattach __P((struct device *, struct device *, void *)); 52 int wstscmatch __P((struct device *, void *, void *)); 53 54 int wstsc_dma_xfer_in __P((struct sci_softc *dev, int len, 55 register u_char *buf, int phase)); 56 int wstsc_dma_xfer_out __P((struct sci_softc *dev, int len, 57 register u_char *buf, int phase)); 58 int wstsc_dma_xfer_in2 __P((struct sci_softc *dev, int len, 59 register u_short *buf, int phase)); 60 int wstsc_dma_xfer_out2 __P((struct sci_softc *dev, int len, 61 register u_short *buf, int phase)); 62 int wstsc_intr __P((struct sci_softc *)); 63 64 struct scsi_adapter wstsc_scsiswitch = { 65 sci_scsicmd, 66 sci_minphys, 67 0, /* no lun support */ 68 0, /* no lun support */ 69 }; 70 71 struct scsi_device wstsc_scsidev = { 72 NULL, /* use default error handler */ 73 NULL, /* do not have a start functio */ 74 NULL, /* have no async handler */ 75 NULL, /* Use default done routine */ 76 }; 77 78 #define QPRINTF 79 80 #ifdef DEBUG 81 extern int sci_debug; 82 #endif 83 84 extern int sci_data_wait; 85 86 int supradma_pseudo = 0; /* 0=none, 1=byte, 2=word */ 87 88 struct cfattach wstsc_ca = { 89 sizeof(struct sci_softc), wstscmatch, wstscattach 90 }; 91 92 struct cfdriver wstsc_cd = { 93 NULL, "wstsc", DV_DULL, NULL, 0 94 }; 95 96 /* 97 * if this a Supra WordSync board 98 */ 99 int 100 wstscmatch(pdp, match, auxp) 101 struct device *pdp; 102 void *match, *auxp; 103 { 104 struct cfdata *cdp = match; 105 struct zbus_args *zap; 106 107 zap = auxp; 108 109 /* 110 * Check manufacturer and product id. 111 */ 112 if (zap->manid == 1056 && ( 113 zap->prodid == 12 || /* WordSync */ 114 zap->prodid == 13)) /* ByteSync */ 115 return(1); 116 else 117 return(0); 118 } 119 120 void 121 wstscattach(pdp, dp, auxp) 122 struct device *pdp, *dp; 123 void *auxp; 124 { 125 volatile u_char *rp; 126 struct sci_softc *sc; 127 struct zbus_args *zap; 128 129 printf("\n"); 130 131 zap = auxp; 132 133 sc = (struct sci_softc *)dp; 134 rp = zap->va; 135 /* 136 * set up 5380 register pointers 137 * (Needs check on which Supra board this is - for now, 138 * just do the WordSync) 139 */ 140 sc->sci_data = rp + 0; 141 sc->sci_odata = rp + 0; 142 sc->sci_icmd = rp + 2; 143 sc->sci_mode = rp + 4; 144 sc->sci_tcmd = rp + 6; 145 sc->sci_bus_csr = rp + 8; 146 sc->sci_sel_enb = rp + 8; 147 sc->sci_csr = rp + 10; 148 sc->sci_dma_send = rp + 10; 149 sc->sci_idata = rp + 12; 150 sc->sci_trecv = rp + 12; 151 sc->sci_iack = rp + 14; 152 sc->sci_irecv = rp + 14; 153 154 if (supradma_pseudo == 2) { 155 sc->dma_xfer_in = wstsc_dma_xfer_in2; 156 sc->dma_xfer_out = wstsc_dma_xfer_out2; 157 } 158 else if (supradma_pseudo == 1) { 159 sc->dma_xfer_in = wstsc_dma_xfer_in; 160 sc->dma_xfer_out = wstsc_dma_xfer_out; 161 } 162 163 sc->sc_isr.isr_intr = wstsc_intr; 164 sc->sc_isr.isr_arg = sc; 165 sc->sc_isr.isr_ipl = 2; 166 add_isr(&sc->sc_isr); 167 168 scireset(sc); 169 170 sc->sc_link.adapter_softc = sc; 171 sc->sc_link.adapter_target = 7; 172 sc->sc_link.adapter = &wstsc_scsiswitch; 173 sc->sc_link.device = &wstsc_scsidev; 174 sc->sc_link.openings = 1; 175 TAILQ_INIT(&sc->sc_xslist); 176 177 /* 178 * attach all scsi units on us 179 */ 180 config_found(dp, &sc->sc_link, wstscprint); 181 } 182 183 /* 184 * print diag if pnp is NULL else just extra 185 */ 186 int 187 wstscprint(auxp, pnp) 188 void *auxp; 189 char *pnp; 190 { 191 if (pnp == NULL) 192 return(UNCONF); 193 return(QUIET); 194 } 195 196 int 197 wstsc_dma_xfer_in (dev, len, buf, phase) 198 struct sci_softc *dev; 199 int len; 200 register u_char *buf; 201 int phase; 202 { 203 int wait = sci_data_wait; 204 u_char csr; 205 u_char *obp = (u_char *) buf; 206 volatile register u_char *sci_dma = dev->sci_idata; 207 volatile register u_char *sci_csr = dev->sci_csr; 208 209 QPRINTF(("supradma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 210 211 *dev->sci_tcmd = phase; 212 *dev->sci_icmd = 0; 213 *dev->sci_mode = SCI_MODE_DMA; 214 *dev->sci_irecv = 0; 215 216 while (len >= 128) { 217 wait = sci_data_wait; 218 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 219 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 220 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 221 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 222 || --wait < 0) { 223 #ifdef DEBUG 224 if (sci_debug | 1) 225 printf("supradma2_in fail: l%d i%x w%d\n", 226 len, *dev->sci_bus_csr, wait); 227 #endif 228 *dev->sci_mode = 0; 229 return 0; 230 } 231 } 232 233 #define R1 (*buf++ = *sci_dma) 234 R1; R1; R1; R1; R1; R1; R1; R1; 235 R1; R1; R1; R1; R1; R1; R1; R1; 236 R1; R1; R1; R1; R1; R1; R1; R1; 237 R1; R1; R1; R1; R1; R1; R1; R1; 238 R1; R1; R1; R1; R1; R1; R1; R1; 239 R1; R1; R1; R1; R1; R1; R1; R1; 240 R1; R1; R1; R1; R1; R1; R1; R1; 241 R1; R1; R1; R1; R1; R1; R1; R1; 242 R1; R1; R1; R1; R1; R1; R1; R1; 243 R1; R1; R1; R1; R1; R1; R1; R1; 244 R1; R1; R1; R1; R1; R1; R1; R1; 245 R1; R1; R1; R1; R1; R1; R1; R1; 246 R1; R1; R1; R1; R1; R1; R1; R1; 247 R1; R1; R1; R1; R1; R1; R1; R1; 248 R1; R1; R1; R1; R1; R1; R1; R1; 249 R1; R1; R1; R1; R1; R1; R1; R1; 250 len -= 128; 251 } 252 253 while (len > 0) { 254 wait = sci_data_wait; 255 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 256 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 257 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 258 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 259 || --wait < 0) { 260 #ifdef DEBUG 261 if (sci_debug | 1) 262 printf("supradma1_in fail: l%d i%x w%d\n", 263 len, *dev->sci_bus_csr, wait); 264 #endif 265 *dev->sci_mode = 0; 266 return 0; 267 } 268 } 269 270 *buf++ = *sci_dma; 271 len--; 272 } 273 274 QPRINTF(("supradma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 275 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 276 obp[6], obp[7], obp[8], obp[9])); 277 278 *dev->sci_mode = 0; 279 return 0; 280 } 281 282 int 283 wstsc_dma_xfer_out (dev, len, buf, phase) 284 struct sci_softc *dev; 285 int len; 286 register u_char *buf; 287 int phase; 288 { 289 int wait = sci_data_wait; 290 u_char csr; 291 u_char *obp = buf; 292 volatile register u_char *sci_dma = dev->sci_data; 293 volatile register u_char *sci_csr = dev->sci_csr; 294 295 QPRINTF(("supradma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 296 297 QPRINTF(("supradma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 298 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 299 buf[6], buf[7], buf[8], buf[9])); 300 301 *dev->sci_tcmd = phase; 302 *dev->sci_mode = SCI_MODE_DMA; 303 *dev->sci_icmd = SCI_ICMD_DATA; 304 *dev->sci_dma_send = 0; 305 while (len > 0) { 306 wait = sci_data_wait; 307 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 308 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 309 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 310 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 311 || --wait < 0) { 312 #ifdef DEBUG 313 if (sci_debug) 314 printf("supradma_out fail: l%d i%x w%d\n", 315 len, csr, wait); 316 #endif 317 *dev->sci_mode = 0; 318 return 0; 319 } 320 } 321 322 *sci_dma = *buf++; 323 len--; 324 } 325 326 wait = sci_data_wait; 327 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 328 SCI_CSR_PHASE_MATCH && --wait); 329 330 331 *dev->sci_mode = 0; 332 *dev->sci_icmd = 0; 333 return 0; 334 } 335 336 337 int 338 wstsc_dma_xfer_in2 (dev, len, buf, phase) 339 struct sci_softc *dev; 340 int len; 341 register u_short *buf; 342 int phase; 343 { 344 int wait = sci_data_wait; 345 u_char csr; 346 u_char *obp = (u_char *) buf; 347 volatile register u_short *sci_dma = (u_short *)(dev->sci_idata + 0x10); 348 volatile register u_char *sci_csr = dev->sci_csr + 0x10; 349 350 QPRINTF(("supradma_in2 %d, csr=%02x\n", len, *dev->sci_bus_csr)); 351 352 *dev->sci_tcmd = phase; 353 *dev->sci_mode = SCI_MODE_DMA; 354 *dev->sci_icmd = 0; 355 *(dev->sci_irecv + 16) = 0; 356 while (len >= 128) { 357 #if 0 358 wait = sci_data_wait; 359 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 360 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 361 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 362 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 363 || --wait < 0) { 364 #ifdef DEBUG 365 if (sci_debug | 1) 366 printf("supradma2_in2 fail: l%d i%x w%d\n", 367 len, *dev->sci_bus_csr, wait); 368 #endif 369 *dev->sci_mode &= ~SCI_MODE_DMA; 370 return 0; 371 } 372 } 373 #else 374 while (!(*sci_csr & SCI_CSR_DREQ)) 375 ; 376 #endif 377 378 #define R2 (*buf++ = *sci_dma) 379 R2; R2; R2; R2; R2; R2; R2; R2; 380 R2; R2; R2; R2; R2; R2; R2; R2; 381 R2; R2; R2; R2; R2; R2; R2; R2; 382 R2; R2; R2; R2; R2; R2; R2; R2; 383 R2; R2; R2; R2; R2; R2; R2; R2; 384 R2; R2; R2; R2; R2; R2; R2; R2; 385 R2; R2; R2; R2; R2; R2; R2; R2; 386 R2; R2; R2; R2; R2; R2; R2; R2; 387 len -= 128; 388 } 389 while (len > 0) { 390 #if 0 391 wait = sci_data_wait; 392 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 393 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 394 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 395 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 396 || --wait < 0) { 397 #ifdef DEBUG 398 if (sci_debug | 1) 399 printf("supradma1_in2 fail: l%d i%x w%d\n", 400 len, *dev->sci_bus_csr, wait); 401 #endif 402 *dev->sci_mode &= ~SCI_MODE_DMA; 403 return 0; 404 } 405 } 406 #else 407 while (!(*sci_csr * SCI_CSR_DREQ)) 408 ; 409 #endif 410 411 *buf++ = *sci_dma; 412 len -= 2; 413 } 414 415 QPRINTF(("supradma_in2 {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 416 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 417 obp[6], obp[7], obp[8], obp[9])); 418 419 *dev->sci_irecv = 0; 420 *dev->sci_mode = 0; 421 return 0; 422 } 423 424 int 425 wstsc_dma_xfer_out2 (dev, len, buf, phase) 426 struct sci_softc *dev; 427 int len; 428 register u_short *buf; 429 int phase; 430 { 431 int wait = sci_data_wait; 432 u_char csr; 433 u_char *obp = (u_char *) buf; 434 volatile register u_short *sci_dma = (ushort *)(dev->sci_data + 0x10); 435 volatile register u_char *sci_bus_csr = dev->sci_bus_csr; 436 437 QPRINTF(("supradma_out2 %d, csr=%02x\n", len, *dev->sci_bus_csr)); 438 439 QPRINTF(("supradma_out2 {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 440 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 441 obp[6], obp[7], obp[8], obp[9])); 442 443 *dev->sci_tcmd = phase; 444 *dev->sci_mode = SCI_MODE_DMA; 445 *dev->sci_icmd = SCI_ICMD_DATA; 446 *dev->sci_dma_send = 0; 447 while (len > 64) { 448 #if 0 449 wait = sci_data_wait; 450 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 451 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 452 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 453 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 454 || --wait < 0) { 455 #ifdef DEBUG 456 if (sci_debug) 457 printf("supradma_out2 fail: l%d i%x w%d\n", 458 len, csr, wait); 459 #endif 460 *dev->sci_mode = 0; 461 return 0; 462 } 463 } 464 #else 465 *dev->sci_mode = 0; 466 *dev->sci_icmd &= ~SCI_ICMD_ACK; 467 while (!(*sci_bus_csr & SCI_BUS_REQ)) 468 ; 469 *dev->sci_mode = SCI_MODE_DMA; 470 *dev->sci_dma_send = 0; 471 #endif 472 473 #define W2 (*sci_dma = *buf++) 474 W2; W2; W2; W2; W2; W2; W2; W2; 475 W2; W2; W2; W2; W2; W2; W2; W2; 476 if (*(sci_bus_csr + 0x10) & SCI_BUS_REQ) 477 ; 478 len -= 64; 479 } 480 481 while (len > 0) { 482 #if 0 483 wait = sci_data_wait; 484 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 485 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 486 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 487 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 488 || --wait < 0) { 489 #ifdef DEBUG 490 if (sci_debug) 491 printf("supradma_out2 fail: l%d i%x w%d\n", 492 len, csr, wait); 493 #endif 494 *dev->sci_mode = 0; 495 return 0; 496 } 497 } 498 #else 499 *dev->sci_mode = 0; 500 *dev->sci_icmd &= ~SCI_ICMD_ACK; 501 while (!(*sci_bus_csr & SCI_BUS_REQ)) 502 ; 503 *dev->sci_mode = SCI_MODE_DMA; 504 *dev->sci_dma_send = 0; 505 #endif 506 507 *sci_dma = *buf++; 508 if (*(sci_bus_csr + 0x10) & SCI_BUS_REQ) 509 ; 510 len -= 2; 511 } 512 513 #if 0 514 wait = sci_data_wait; 515 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 516 SCI_CSR_PHASE_MATCH && --wait); 517 #endif 518 519 520 *dev->sci_irecv = 0; 521 *dev->sci_icmd &= ~SCI_ICMD_ACK; 522 *dev->sci_mode = 0; 523 *dev->sci_icmd = 0; 524 return 0; 525 } 526 527 int 528 wstsc_intr(dev) 529 struct sci_softc *dev; 530 { 531 int i, found; 532 u_char stat; 533 534 if ((*(dev->sci_csr + 0x10) & SCI_CSR_INT) == 0) 535 return (0); 536 stat = *(dev->sci_iack + 0x10); 537 return (1); 538 } 539
Indexes created Tue Sep 23 07:09:52 GMT 2025