wstsc.c revision 1.29
1 /* $NetBSD: wstsc.c,v 1.29 2003/08/07 16:26:45 agc Exp $ */ 2 3 /* 4 * Copyright (c) 1982, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of the University nor the names of its contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * @(#)supradma.c 32 */ 33 34 /* 35 * Copyright (c) 1994 Michael L. Hitch 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by the University of 48 * California, Berkeley and its contributors. 49 * 4. Neither the name of the University nor the names of its contributors 50 * may be used to endorse or promote products derived from this software 51 * without specific prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 * @(#)supradma.c 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: wstsc.c,v 1.29 2003/08/07 16:26:45 agc Exp $"); 70 71 #include <sys/param.h> 72 #include <sys/systm.h> 73 #include <sys/kernel.h> 74 #include <sys/device.h> 75 #include <dev/scsipi/scsi_all.h> 76 #include <dev/scsipi/scsipi_all.h> 77 #include <dev/scsipi/scsiconf.h> 78 #include <amiga/amiga/device.h> 79 #include <amiga/amiga/isr.h> 80 #include <amiga/dev/scireg.h> 81 #include <amiga/dev/scivar.h> 82 #include <amiga/dev/zbusvar.h> 83 84 void wstscattach(struct device *, struct device *, void *); 85 int wstscmatch(struct device *, struct cfdata *, void *); 86 87 int wstsc_dma_xfer_in(struct sci_softc *dev, int len, 88 register u_char *buf, int phase); 89 int wstsc_dma_xfer_out(struct sci_softc *dev, int len, 90 register u_char *buf, int phase); 91 int wstsc_dma_xfer_in2(struct sci_softc *dev, int len, 92 register u_short *buf, int phase); 93 int wstsc_dma_xfer_out2(struct sci_softc *dev, int len, 94 register u_short *buf, int phase); 95 int wstsc_intr(void *); 96 97 #ifdef DEBUG 98 extern int sci_debug; 99 #define QPRINTF(a) if (sci_debug > 1) printf a 100 #else 101 #define QPRINTF(a) 102 #endif 103 104 extern int sci_data_wait; 105 106 int supradma_pseudo = 0; /* 0=none, 1=byte, 2=word */ 107 108 CFATTACH_DECL(wstsc, sizeof(struct sci_softc), 109 wstscmatch, wstscattach, NULL, NULL); 110 111 /* 112 * if this a Supra WordSync board 113 */ 114 int 115 wstscmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 116 { 117 struct zbus_args *zap; 118 119 zap = auxp; 120 121 /* 122 * Check manufacturer and product id. 123 */ 124 if (zap->manid == 1056 && ( 125 zap->prodid == 12 || /* WordSync */ 126 zap->prodid == 13)) /* ByteSync */ 127 return(1); 128 else 129 return(0); 130 } 131 132 void 133 wstscattach(struct device *pdp, struct device *dp, void *auxp) 134 { 135 volatile u_char *rp; 136 struct sci_softc *sc = (struct sci_softc *)dp; 137 struct zbus_args *zap; 138 struct scsipi_adapter *adapt = &sc->sc_adapter; 139 struct scsipi_channel *chan = &sc->sc_channel; 140 141 printf("\n"); 142 143 zap = auxp; 144 145 rp = zap->va; 146 /* 147 * set up 5380 register pointers 148 * (Needs check on which Supra board this is - for now, 149 * just do the WordSync) 150 */ 151 sc->sci_data = rp + 0; 152 sc->sci_odata = rp + 0; 153 sc->sci_icmd = rp + 2; 154 sc->sci_mode = rp + 4; 155 sc->sci_tcmd = rp + 6; 156 sc->sci_bus_csr = rp + 8; 157 sc->sci_sel_enb = rp + 8; 158 sc->sci_csr = rp + 10; 159 sc->sci_dma_send = rp + 10; 160 sc->sci_idata = rp + 12; 161 sc->sci_trecv = rp + 12; 162 sc->sci_iack = rp + 14; 163 sc->sci_irecv = rp + 14; 164 165 if (supradma_pseudo == 2) { 166 sc->dma_xfer_in = (int(*)(struct sci_softc *, int, u_char *, int))wstsc_dma_xfer_in2; 167 sc->dma_xfer_out = (int(*)(struct sci_softc *, int, u_char *, int))wstsc_dma_xfer_out2; 168 } 169 else if (supradma_pseudo == 1) { 170 sc->dma_xfer_in = wstsc_dma_xfer_in; 171 sc->dma_xfer_out = wstsc_dma_xfer_out; 172 } 173 174 sc->sc_isr.isr_intr = wstsc_intr; 175 sc->sc_isr.isr_arg = sc; 176 sc->sc_isr.isr_ipl = 2; 177 add_isr(&sc->sc_isr); 178 179 scireset(sc); 180 181 /* 182 * Fill in the scsipi_adapter. 183 */ 184 memset(adapt, 0, sizeof(*adapt)); 185 adapt->adapt_dev = &sc->sc_dev; 186 adapt->adapt_nchannels = 1; 187 adapt->adapt_openings = 7; 188 adapt->adapt_max_periph = 1; 189 adapt->adapt_request = sci_scsipi_request; 190 adapt->adapt_minphys = sci_minphys; 191 192 /* 193 * Fill in the scsipi_channel. 194 */ 195 memset(chan, 0, sizeof(*chan)); 196 chan->chan_adapter = adapt; 197 chan->chan_bustype = &scsi_bustype; 198 chan->chan_channel = 0; 199 chan->chan_ntargets = 8; 200 chan->chan_nluns = 8; 201 chan->chan_id = 7; 202 203 /* 204 * attach all scsi units on us 205 */ 206 config_found(dp, chan, scsiprint); 207 } 208 209 int 210 wstsc_dma_xfer_in(struct sci_softc *dev, int len, register u_char *buf, 211 int phase) 212 { 213 int wait = sci_data_wait; 214 volatile register u_char *sci_dma = dev->sci_idata; 215 volatile register u_char *sci_csr = dev->sci_csr; 216 #ifdef DEBUG 217 u_char *obp = (u_char *) buf; 218 #endif 219 220 QPRINTF(("supradma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 221 222 *dev->sci_tcmd = phase; 223 *dev->sci_icmd = 0; 224 *dev->sci_mode = SCI_MODE_DMA; 225 *dev->sci_irecv = 0; 226 227 while (len >= 128) { 228 wait = sci_data_wait; 229 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 230 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 231 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 232 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 233 || --wait < 0) { 234 #ifdef DEBUG 235 if (sci_debug | 1) 236 printf("supradma2_in fail: l%d i%x w%d\n", 237 len, *dev->sci_bus_csr, wait); 238 #endif 239 *dev->sci_mode = 0; 240 return 0; 241 } 242 } 243 244 #define R1 (*buf++ = *sci_dma) 245 R1; R1; R1; R1; R1; R1; R1; R1; 246 R1; R1; R1; R1; R1; R1; R1; R1; 247 R1; R1; R1; R1; R1; R1; R1; R1; 248 R1; R1; R1; R1; R1; R1; R1; R1; 249 R1; R1; R1; R1; R1; R1; R1; R1; 250 R1; R1; R1; R1; R1; R1; R1; R1; 251 R1; R1; R1; R1; R1; R1; R1; R1; 252 R1; R1; R1; R1; R1; R1; R1; R1; 253 R1; R1; R1; R1; R1; R1; R1; R1; 254 R1; R1; R1; R1; R1; R1; R1; R1; 255 R1; R1; R1; R1; R1; R1; R1; R1; 256 R1; R1; R1; R1; R1; R1; R1; R1; 257 R1; R1; R1; R1; R1; R1; R1; R1; 258 R1; R1; R1; R1; R1; R1; R1; R1; 259 R1; R1; R1; R1; R1; R1; R1; R1; 260 R1; R1; R1; R1; R1; R1; R1; R1; 261 len -= 128; 262 } 263 264 while (len > 0) { 265 wait = sci_data_wait; 266 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 267 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 268 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 269 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 270 || --wait < 0) { 271 #ifdef DEBUG 272 if (sci_debug | 1) 273 printf("supradma1_in fail: l%d i%x w%d\n", 274 len, *dev->sci_bus_csr, wait); 275 #endif 276 *dev->sci_mode = 0; 277 return 0; 278 } 279 } 280 281 *buf++ = *sci_dma; 282 len--; 283 } 284 285 QPRINTF(("supradma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 286 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 287 obp[6], obp[7], obp[8], obp[9])); 288 289 *dev->sci_mode = 0; 290 return 0; 291 } 292 293 int 294 wstsc_dma_xfer_out(struct sci_softc *dev, int len, register u_char *buf, 295 int phase) 296 { 297 int wait = sci_data_wait; 298 volatile register u_char *sci_dma = dev->sci_data; 299 volatile register u_char *sci_csr = dev->sci_csr; 300 301 QPRINTF(("supradma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 302 303 QPRINTF(("supradma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 304 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 305 buf[6], buf[7], buf[8], buf[9])); 306 307 *dev->sci_tcmd = phase; 308 *dev->sci_mode = SCI_MODE_DMA; 309 *dev->sci_icmd = SCI_ICMD_DATA; 310 *dev->sci_dma_send = 0; 311 while (len > 0) { 312 wait = sci_data_wait; 313 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 314 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 315 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 316 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 317 || --wait < 0) { 318 #ifdef DEBUG 319 if (sci_debug) 320 printf("supradma_out fail: l%d i%x w%d\n", 321 len, *dev->sci_bus_csr, wait); 322 #endif 323 *dev->sci_mode = 0; 324 return 0; 325 } 326 } 327 328 *sci_dma = *buf++; 329 len--; 330 } 331 332 wait = sci_data_wait; 333 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 334 SCI_CSR_PHASE_MATCH && --wait); 335 336 337 *dev->sci_mode = 0; 338 *dev->sci_icmd = 0; 339 return 0; 340 } 341 342 343 int 344 wstsc_dma_xfer_in2(struct sci_softc *dev, int len, register u_short *buf, 345 int phase) 346 { 347 volatile register u_short *sci_dma = (u_short *)(dev->sci_idata + 0x10); 348 volatile register u_char *sci_csr = dev->sci_csr + 0x10; 349 #ifdef DEBUG 350 u_char *obp = (u_char *) buf; 351 #endif 352 #if 0 353 int wait = sci_data_wait; 354 #endif 355 356 QPRINTF(("supradma_in2 %d, csr=%02x\n", len, *dev->sci_bus_csr)); 357 358 *dev->sci_tcmd = phase; 359 *dev->sci_mode = SCI_MODE_DMA; 360 *dev->sci_icmd = 0; 361 *(dev->sci_irecv + 16) = 0; 362 while (len >= 128) { 363 #if 0 364 wait = sci_data_wait; 365 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 366 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 367 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 368 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 369 || --wait < 0) { 370 #ifdef DEBUG 371 if (sci_debug | 1) 372 printf("supradma2_in2 fail: l%d i%x w%d\n", 373 len, *dev->sci_bus_csr, wait); 374 #endif 375 *dev->sci_mode &= ~SCI_MODE_DMA; 376 return 0; 377 } 378 } 379 #else 380 while (!(*sci_csr & SCI_CSR_DREQ)) 381 ; 382 #endif 383 384 #define R2 (*buf++ = *sci_dma) 385 R2; R2; R2; R2; R2; R2; R2; R2; 386 R2; R2; R2; R2; R2; R2; R2; R2; 387 R2; R2; R2; R2; R2; R2; R2; R2; 388 R2; R2; R2; R2; R2; R2; R2; R2; 389 R2; R2; R2; R2; R2; R2; R2; R2; 390 R2; R2; R2; R2; R2; R2; R2; R2; 391 R2; R2; R2; R2; R2; R2; R2; R2; 392 R2; R2; R2; R2; R2; R2; R2; R2; 393 len -= 128; 394 } 395 while (len > 0) { 396 #if 0 397 wait = sci_data_wait; 398 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 399 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 400 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 401 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 402 || --wait < 0) { 403 #ifdef DEBUG 404 if (sci_debug | 1) 405 printf("supradma1_in2 fail: l%d i%x w%d\n", 406 len, *dev->sci_bus_csr, wait); 407 #endif 408 *dev->sci_mode &= ~SCI_MODE_DMA; 409 return 0; 410 } 411 } 412 #else 413 while (!(*sci_csr * SCI_CSR_DREQ)) 414 ; 415 #endif 416 417 *buf++ = *sci_dma; 418 len -= 2; 419 } 420 421 QPRINTF(("supradma_in2 {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 422 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 423 obp[6], obp[7], obp[8], obp[9])); 424 425 *dev->sci_irecv = 0; 426 *dev->sci_mode = 0; 427 return 0; 428 } 429 430 int 431 wstsc_dma_xfer_out2(struct sci_softc *dev, int len, register u_short *buf, 432 int phase) 433 { 434 volatile register u_short *sci_dma = (ushort *)(dev->sci_data + 0x10); 435 volatile register u_char *sci_bus_csr = dev->sci_bus_csr; 436 #ifdef DEBUG 437 u_char *obp = (u_char *) buf; 438 #endif 439 #if 0 440 int wait = sci_data_wait; 441 #endif 442 443 QPRINTF(("supradma_out2 %d, csr=%02x\n", len, *dev->sci_bus_csr)); 444 445 QPRINTF(("supradma_out2 {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 446 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 447 obp[6], obp[7], obp[8], obp[9])); 448 449 *dev->sci_tcmd = phase; 450 *dev->sci_mode = SCI_MODE_DMA; 451 *dev->sci_icmd = SCI_ICMD_DATA; 452 *dev->sci_dma_send = 0; 453 while (len > 64) { 454 #if 0 455 wait = sci_data_wait; 456 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 457 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 458 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 459 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 460 || --wait < 0) { 461 #ifdef DEBUG 462 if (sci_debug) 463 printf("supradma_out2 fail: l%d i%x w%d\n", 464 len, csr, wait); 465 #endif 466 *dev->sci_mode = 0; 467 return 0; 468 } 469 } 470 #else 471 *dev->sci_mode = 0; 472 *dev->sci_icmd &= ~SCI_ICMD_ACK; 473 while (!(*sci_bus_csr & SCI_BUS_REQ)) 474 ; 475 *dev->sci_mode = SCI_MODE_DMA; 476 *dev->sci_dma_send = 0; 477 #endif 478 479 #define W2 (*sci_dma = *buf++) 480 W2; W2; W2; W2; W2; W2; W2; W2; 481 W2; W2; W2; W2; W2; W2; W2; W2; 482 if (*(sci_bus_csr + 0x10) & SCI_BUS_REQ) 483 ; 484 len -= 64; 485 } 486 487 while (len > 0) { 488 #if 0 489 wait = sci_data_wait; 490 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 491 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 492 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 493 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 494 || --wait < 0) { 495 #ifdef DEBUG 496 if (sci_debug) 497 printf("supradma_out2 fail: l%d i%x w%d\n", 498 len, csr, wait); 499 #endif 500 *dev->sci_mode = 0; 501 return 0; 502 } 503 } 504 #else 505 *dev->sci_mode = 0; 506 *dev->sci_icmd &= ~SCI_ICMD_ACK; 507 while (!(*sci_bus_csr & SCI_BUS_REQ)) 508 ; 509 *dev->sci_mode = SCI_MODE_DMA; 510 *dev->sci_dma_send = 0; 511 #endif 512 513 *sci_dma = *buf++; 514 if (*(sci_bus_csr + 0x10) & SCI_BUS_REQ) 515 ; 516 len -= 2; 517 } 518 519 #if 0 520 wait = sci_data_wait; 521 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 522 SCI_CSR_PHASE_MATCH && --wait); 523 #endif 524 525 526 *dev->sci_irecv = 0; 527 *dev->sci_icmd &= ~SCI_ICMD_ACK; 528 *dev->sci_mode = 0; 529 *dev->sci_icmd = 0; 530 return 0; 531 } 532 533 int 534 wstsc_intr(void *arg) 535 { 536 struct sci_softc *dev = arg; 537 u_char stat; 538 539 if ((*(dev->sci_csr + 0x10) & SCI_CSR_INT) == 0) 540 return (0); 541 stat = *(dev->sci_iack + 0x10); 542 return (1); 543 } 544
Indexes created Tue Sep 23 14:10:03 GMT 2025