wstsc.c revision 1.7
1 /* $NetBSD: wstsc.c,v 1.7 1995/01/05 07:22:53 chopps Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)supradma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <scsi/scsi_all.h> 43 #include <scsi/scsiconf.h> 44 #include <amiga/amiga/device.h> 45 #include <amiga/dev/scireg.h> 46 #include <amiga/dev/scivar.h> 47 #include <amiga/dev/zbusvar.h> 48 49 int wstscprint __P((void *auxp, char *)); 50 void wstscattach __P((struct device *, struct device *, void *)); 51 int wstscmatch __P((struct device *, struct cfdata *, void *)); 52 53 int wstsc_dma_xfer_in __P((struct sci_softc *dev, int len, 54 register u_char *buf, int phase)); 55 int wstsc_dma_xfer_out __P((struct sci_softc *dev, int len, 56 register u_char *buf, int phase)); 57 int wstsc_dma_xfer_in2 __P((struct sci_softc *dev, int len, 58 register u_short *buf, int phase)); 59 int wstsc_dma_xfer_out2 __P((struct sci_softc *dev, int len, 60 register u_short *buf, int phase)); 61 62 struct scsi_adapter wstsc_scsiswitch = { 63 sci_scsicmd, 64 sci_minphys, 65 0, /* no lun support */ 66 0, /* no lun support */ 67 }; 68 69 struct scsi_device wstsc_scsidev = { 70 NULL, /* use default error handler */ 71 NULL, /* do not have a start functio */ 72 NULL, /* have no async handler */ 73 NULL, /* Use default done routine */ 74 }; 75 76 #define QPRINTF 77 78 #ifdef DEBUG 79 extern int sci_debug; 80 #endif 81 82 extern int sci_data_wait; 83 84 int supradma_pseudo = 0; /* 0=none, 1=byte, 2=word */ 85 86 struct cfdriver wstsccd = { 87 NULL, "wstsc", (cfmatch_t)wstscmatch, wstscattach, 88 DV_DULL, sizeof(struct sci_softc), NULL, 0 }; 89 90 /* 91 * if this a Supra WordSync board 92 */ 93 int 94 wstscmatch(pdp, cdp, auxp) 95 struct device *pdp; 96 struct cfdata *cdp; 97 void *auxp; 98 { 99 struct zbus_args *zap; 100 101 zap = auxp; 102 103 /* 104 * Check manufacturer and product id. 105 */ 106 if (zap->manid == 1056 && zap->prodid == 12) /* add other boards? */ 107 return(1); 108 else 109 return(0); 110 } 111 112 void 113 wstscattach(pdp, dp, auxp) 114 struct device *pdp, *dp; 115 void *auxp; 116 { 117 volatile u_char *rp; 118 struct sci_softc *sc; 119 struct zbus_args *zap; 120 121 printf("\n"); 122 123 zap = auxp; 124 125 sc = (struct sci_softc *)dp; 126 rp = zap->va; 127 /* 128 * set up 5380 register pointers 129 * (Needs check on which Supra board this is - for now, 130 * just do the WordSync) 131 */ 132 sc->sci_data = rp + 0; 133 sc->sci_odata = rp + 0; 134 sc->sci_icmd = rp + 2; 135 sc->sci_mode = rp + 4; 136 sc->sci_tcmd = rp + 6; 137 sc->sci_bus_csr = rp + 8; 138 sc->sci_sel_enb = rp + 8; 139 sc->sci_csr = rp + 10; 140 sc->sci_dma_send = rp + 10; 141 sc->sci_idata = rp + 12; 142 sc->sci_trecv = rp + 12; 143 sc->sci_iack = rp + 14; 144 sc->sci_irecv = rp + 14; 145 146 if (supradma_pseudo == 2) { 147 sc->dma_xfer_in = wstsc_dma_xfer_in2; 148 sc->dma_xfer_out = wstsc_dma_xfer_out2; 149 } 150 else if (supradma_pseudo == 1) { 151 sc->dma_xfer_in = wstsc_dma_xfer_in; 152 sc->dma_xfer_out = wstsc_dma_xfer_out; 153 } 154 155 scireset(sc); 156 157 sc->sc_link.adapter_softc = sc; 158 sc->sc_link.adapter_target = 7; 159 sc->sc_link.adapter = &wstsc_scsiswitch; 160 sc->sc_link.device = &wstsc_scsidev; 161 sc->sc_link.openings = 1; 162 TAILQ_INIT(&sc->sc_xslist); 163 164 /* 165 * attach all scsi units on us 166 */ 167 config_found(dp, &sc->sc_link, wstscprint); 168 } 169 170 /* 171 * print diag if pnp is NULL else just extra 172 */ 173 int 174 wstscprint(auxp, pnp) 175 void *auxp; 176 char *pnp; 177 { 178 if (pnp == NULL) 179 return(UNCONF); 180 return(QUIET); 181 } 182 183 int 184 wstsc_dma_xfer_in (dev, len, buf, phase) 185 struct sci_softc *dev; 186 int len; 187 register u_char *buf; 188 int phase; 189 { 190 int wait = sci_data_wait; 191 u_char csr; 192 u_char *obp = (u_char *) buf; 193 volatile register u_char *sci_dma = dev->sci_idata; 194 volatile register u_char *sci_csr = dev->sci_csr; 195 196 QPRINTF(("supradma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 197 198 *dev->sci_tcmd = phase; 199 *dev->sci_icmd = 0; 200 *dev->sci_mode = SCI_MODE_DMA; 201 *dev->sci_irecv = 0; 202 203 while (len >= 128) { 204 wait = sci_data_wait; 205 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 206 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 207 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 208 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 209 || --wait < 0) { 210 #ifdef DEBUG 211 if (sci_debug | 1) 212 printf("supradma2_in fail: l%d i%x w%d\n", 213 len, *dev->sci_bus_csr, wait); 214 #endif 215 *dev->sci_mode = 0; 216 return 0; 217 } 218 } 219 220 #define R1 (*buf++ = *sci_dma) 221 R1; R1; R1; R1; R1; R1; R1; R1; 222 R1; R1; R1; R1; R1; R1; R1; R1; 223 R1; R1; R1; R1; R1; R1; R1; R1; 224 R1; R1; R1; R1; R1; R1; R1; R1; 225 R1; R1; R1; R1; R1; R1; R1; R1; 226 R1; R1; R1; R1; R1; R1; R1; R1; 227 R1; R1; R1; R1; R1; R1; R1; R1; 228 R1; R1; R1; R1; R1; R1; R1; R1; 229 R1; R1; R1; R1; R1; R1; R1; R1; 230 R1; R1; R1; R1; R1; R1; R1; R1; 231 R1; R1; R1; R1; R1; R1; R1; R1; 232 R1; R1; R1; R1; R1; R1; R1; R1; 233 R1; R1; R1; R1; R1; R1; R1; R1; 234 R1; R1; R1; R1; R1; R1; R1; R1; 235 R1; R1; R1; R1; R1; R1; R1; R1; 236 R1; R1; R1; R1; R1; R1; R1; R1; 237 len -= 128; 238 } 239 240 while (len > 0) { 241 wait = sci_data_wait; 242 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 243 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 244 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 245 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 246 || --wait < 0) { 247 #ifdef DEBUG 248 if (sci_debug | 1) 249 printf("supradma1_in fail: l%d i%x w%d\n", 250 len, *dev->sci_bus_csr, wait); 251 #endif 252 *dev->sci_mode = 0; 253 return 0; 254 } 255 } 256 257 *buf++ = *sci_dma; 258 len--; 259 } 260 261 QPRINTF(("supradma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 262 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 263 obp[6], obp[7], obp[8], obp[9])); 264 265 *dev->sci_mode = 0; 266 return 0; 267 } 268 269 int 270 wstsc_dma_xfer_out (dev, len, buf, phase) 271 struct sci_softc *dev; 272 int len; 273 register u_char *buf; 274 int phase; 275 { 276 int wait = sci_data_wait; 277 u_char csr; 278 u_char *obp = buf; 279 volatile register u_char *sci_dma = dev->sci_data; 280 volatile register u_char *sci_csr = dev->sci_csr; 281 282 QPRINTF(("supradma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 283 284 QPRINTF(("supradma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 285 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 286 buf[6], buf[7], buf[8], buf[9])); 287 288 *dev->sci_tcmd = phase; 289 *dev->sci_mode = SCI_MODE_DMA; 290 *dev->sci_icmd = SCI_ICMD_DATA; 291 *dev->sci_dma_send = 0; 292 while (len > 0) { 293 wait = sci_data_wait; 294 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 295 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 296 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 297 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 298 || --wait < 0) { 299 #ifdef DEBUG 300 if (sci_debug) 301 printf("supradma_out fail: l%d i%x w%d\n", 302 len, csr, wait); 303 #endif 304 *dev->sci_mode = 0; 305 return 0; 306 } 307 } 308 309 *sci_dma = *buf++; 310 len--; 311 } 312 313 wait = sci_data_wait; 314 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 315 SCI_CSR_PHASE_MATCH && --wait); 316 317 318 *dev->sci_mode = 0; 319 *dev->sci_icmd = 0; 320 return 0; 321 } 322 323 324 int 325 wstsc_dma_xfer_in2 (dev, len, buf, phase) 326 struct sci_softc *dev; 327 int len; 328 register u_short *buf; 329 int phase; 330 { 331 int wait = sci_data_wait; 332 u_char csr; 333 u_char *obp = (u_char *) buf; 334 volatile register u_short *sci_dma = (u_short *)(dev->sci_idata + 0x10); 335 volatile register u_char *sci_csr = dev->sci_csr + 0x10; 336 337 QPRINTF(("supradma_in2 %d, csr=%02x\n", len, *dev->sci_bus_csr)); 338 339 *dev->sci_tcmd = phase; 340 *dev->sci_mode = SCI_MODE_DMA; 341 *dev->sci_icmd = 0; 342 *(dev->sci_irecv + 16) = 0; 343 while (len >= 128) { 344 #if 0 345 wait = sci_data_wait; 346 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 347 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 348 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 349 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 350 || --wait < 0) { 351 #ifdef DEBUG 352 if (sci_debug | 1) 353 printf("supradma2_in2 fail: l%d i%x w%d\n", 354 len, *dev->sci_bus_csr, wait); 355 #endif 356 *dev->sci_mode &= ~SCI_MODE_DMA; 357 return 0; 358 } 359 } 360 #else 361 while (!(*sci_csr & SCI_CSR_DREQ)) 362 ; 363 #endif 364 365 #define R2 (*buf++ = *sci_dma) 366 R2; R2; R2; R2; R2; R2; R2; R2; 367 R2; R2; R2; R2; R2; R2; R2; R2; 368 R2; R2; R2; R2; R2; R2; R2; R2; 369 R2; R2; R2; R2; R2; R2; R2; R2; 370 R2; R2; R2; R2; R2; R2; R2; R2; 371 R2; R2; R2; R2; R2; R2; R2; R2; 372 R2; R2; R2; R2; R2; R2; R2; R2; 373 R2; R2; R2; R2; R2; R2; R2; R2; 374 len -= 128; 375 } 376 while (len > 0) { 377 #if 0 378 wait = sci_data_wait; 379 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 380 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 381 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 382 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 383 || --wait < 0) { 384 #ifdef DEBUG 385 if (sci_debug | 1) 386 printf("supradma1_in2 fail: l%d i%x w%d\n", 387 len, *dev->sci_bus_csr, wait); 388 #endif 389 *dev->sci_mode &= ~SCI_MODE_DMA; 390 return 0; 391 } 392 } 393 #else 394 while (!(*sci_csr * SCI_CSR_DREQ)) 395 ; 396 #endif 397 398 *buf++ = *sci_dma; 399 len -= 2; 400 } 401 402 QPRINTF(("supradma_in2 {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 403 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 404 obp[6], obp[7], obp[8], obp[9])); 405 406 *dev->sci_irecv = 0; 407 *dev->sci_mode = 0; 408 return 0; 409 } 410 411 int 412 wstsc_dma_xfer_out2 (dev, len, buf, phase) 413 struct sci_softc *dev; 414 int len; 415 register u_short *buf; 416 int phase; 417 { 418 int wait = sci_data_wait; 419 u_char csr; 420 u_char *obp = (u_char *) buf; 421 volatile register u_short *sci_dma = (ushort *)(dev->sci_data + 0x10); 422 volatile register u_char *sci_bus_csr = dev->sci_bus_csr; 423 424 QPRINTF(("supradma_out2 %d, csr=%02x\n", len, *dev->sci_bus_csr)); 425 426 QPRINTF(("supradma_out2 {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 427 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 428 obp[6], obp[7], obp[8], obp[9])); 429 430 *dev->sci_tcmd = phase; 431 *dev->sci_mode = SCI_MODE_DMA; 432 *dev->sci_icmd = SCI_ICMD_DATA; 433 *dev->sci_dma_send = 0; 434 while (len > 64) { 435 #if 0 436 wait = sci_data_wait; 437 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 438 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 439 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 440 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 441 || --wait < 0) { 442 #ifdef DEBUG 443 if (sci_debug) 444 printf("supradma_out2 fail: l%d i%x w%d\n", 445 len, csr, wait); 446 #endif 447 *dev->sci_mode = 0; 448 return 0; 449 } 450 } 451 #else 452 *dev->sci_mode = 0; 453 *dev->sci_icmd &= ~SCI_ICMD_ACK; 454 while (!(*sci_bus_csr & SCI_BUS_REQ)) 455 ; 456 *dev->sci_mode = SCI_MODE_DMA; 457 *dev->sci_dma_send = 0; 458 #endif 459 460 #define W2 (*sci_dma = *buf++) 461 W2; W2; W2; W2; W2; W2; W2; W2; 462 W2; W2; W2; W2; W2; W2; W2; W2; 463 if (*(sci_bus_csr + 0x10) & SCI_BUS_REQ) 464 ; 465 len -= 64; 466 } 467 468 while (len > 0) { 469 #if 0 470 wait = sci_data_wait; 471 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 472 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 473 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 474 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 475 || --wait < 0) { 476 #ifdef DEBUG 477 if (sci_debug) 478 printf("supradma_out2 fail: l%d i%x w%d\n", 479 len, csr, wait); 480 #endif 481 *dev->sci_mode = 0; 482 return 0; 483 } 484 } 485 #else 486 *dev->sci_mode = 0; 487 *dev->sci_icmd &= ~SCI_ICMD_ACK; 488 while (!(*sci_bus_csr & SCI_BUS_REQ)) 489 ; 490 *dev->sci_mode = SCI_MODE_DMA; 491 *dev->sci_dma_send = 0; 492 #endif 493 494 *sci_dma = *buf++; 495 if (*(sci_bus_csr + 0x10) & SCI_BUS_REQ) 496 ; 497 len -= 2; 498 } 499 500 #if 0 501 wait = sci_data_wait; 502 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 503 SCI_CSR_PHASE_MATCH && --wait); 504 #endif 505 506 507 *dev->sci_irecv = 0; 508 *dev->sci_icmd &= ~SCI_ICMD_ACK; 509 *dev->sci_mode = 0; 510 *dev->sci_icmd = 0; 511 return 0; 512 } 513 514 int 515 wstsc_intr() 516 { 517 struct sci_softc *dev; 518 int i, found; 519 u_char stat; 520 521 found = 0; 522 for (i = 0; i < wstsccd.cd_ndevs; i++) { 523 dev = wstsccd.cd_devs[i]; 524 if (dev == NULL) 525 continue; 526 if ((*(dev->sci_csr + 0x10) & SCI_CSR_INT) == 0) 527 continue; 528 ++found; 529 stat = *(dev->sci_iack + 0x10); 530 } 531 return (found); 532 } 533
Indexes created Fri Sep 26 08:10:20 GMT 2025