acpi_pci_machdep.c revision 1.1 1 1.1 jmcneill /* $NetBSD: acpi_pci_machdep.c,v 1.1 2018/10/15 11:35:03 jmcneill Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * This code is derived from software contributed to The NetBSD Foundation
8 1.1 jmcneill * by Jared McNeill <jmcneill (at) invisible.ca>.
9 1.1 jmcneill *
10 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
11 1.1 jmcneill * modification, are permitted provided that the following conditions
12 1.1 jmcneill * are met:
13 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
14 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
15 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
17 1.1 jmcneill * documentation and/or other materials provided with the distribution.
18 1.1 jmcneill *
19 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE.
30 1.1 jmcneill */
31 1.1 jmcneill
32 1.1 jmcneill #include <sys/cdefs.h>
33 1.1 jmcneill __KERNEL_RCSID(0, "$NetBSD: acpi_pci_machdep.c,v 1.1 2018/10/15 11:35:03 jmcneill Exp $");
34 1.1 jmcneill
35 1.1 jmcneill #include <sys/param.h>
36 1.1 jmcneill #include <sys/bus.h>
37 1.1 jmcneill #include <sys/device.h>
38 1.1 jmcneill #include <sys/intr.h>
39 1.1 jmcneill #include <sys/systm.h>
40 1.1 jmcneill #include <sys/kernel.h>
41 1.1 jmcneill #include <sys/extent.h>
42 1.1 jmcneill #include <sys/queue.h>
43 1.1 jmcneill #include <sys/mutex.h>
44 1.1 jmcneill #include <sys/kmem.h>
45 1.1 jmcneill
46 1.1 jmcneill #include <machine/cpu.h>
47 1.1 jmcneill
48 1.1 jmcneill #include <arm/cpufunc.h>
49 1.1 jmcneill
50 1.1 jmcneill #include <dev/pci/pcireg.h>
51 1.1 jmcneill #include <dev/pci/pcivar.h>
52 1.1 jmcneill #include <dev/pci/pciconf.h>
53 1.1 jmcneill
54 1.1 jmcneill #include <dev/acpi/acpivar.h>
55 1.1 jmcneill #include <dev/acpi/acpi_mcfg.h>
56 1.1 jmcneill #include <dev/acpi/acpi_pci.h>
57 1.1 jmcneill
58 1.1 jmcneill #define IH_INDEX_MASK 0x0000ffff
59 1.1 jmcneill #define IH_MPSAFE 0x80000000
60 1.1 jmcneill
61 1.1 jmcneill struct acpi_pci_prt {
62 1.1 jmcneill u_int prt_bus;
63 1.1 jmcneill ACPI_HANDLE prt_handle;
64 1.1 jmcneill TAILQ_ENTRY(acpi_pci_prt) prt_list;
65 1.1 jmcneill };
66 1.1 jmcneill
67 1.1 jmcneill static TAILQ_HEAD(, acpi_pci_prt) acpi_pci_irq_routes =
68 1.1 jmcneill TAILQ_HEAD_INITIALIZER(acpi_pci_irq_routes);
69 1.1 jmcneill
70 1.1 jmcneill static void acpi_pci_md_attach_hook(device_t, device_t,
71 1.1 jmcneill struct pcibus_attach_args *);
72 1.1 jmcneill static int acpi_pci_md_bus_maxdevs(void *, int);
73 1.1 jmcneill static pcitag_t acpi_pci_md_make_tag(void *, int, int, int);
74 1.1 jmcneill static void acpi_pci_md_decompose_tag(void *, pcitag_t, int *, int *, int *);
75 1.1 jmcneill static pcireg_t acpi_pci_md_conf_read(void *, pcitag_t, int);
76 1.1 jmcneill static void acpi_pci_md_conf_write(void *, pcitag_t, int, pcireg_t);
77 1.1 jmcneill static int acpi_pci_md_conf_hook(void *, int, int, int, pcireg_t);
78 1.1 jmcneill static void acpi_pci_md_conf_interrupt(void *, int, int, int, int, int *);
79 1.1 jmcneill
80 1.1 jmcneill static int acpi_pci_md_intr_map(const struct pci_attach_args *,
81 1.1 jmcneill pci_intr_handle_t *);
82 1.1 jmcneill static const char *acpi_pci_md_intr_string(void *, pci_intr_handle_t,
83 1.1 jmcneill char *, size_t);
84 1.1 jmcneill static const struct evcnt *acpi_pci_md_intr_evcnt(void *, pci_intr_handle_t);
85 1.1 jmcneill static int acpi_pci_md_intr_setattr(void *, pci_intr_handle_t *, int,
86 1.1 jmcneill uint64_t);
87 1.1 jmcneill static void * acpi_pci_md_intr_establish(void *, pci_intr_handle_t,
88 1.1 jmcneill int, int (*)(void *), void *);
89 1.1 jmcneill static void acpi_pci_md_intr_disestablish(void *, void *);
90 1.1 jmcneill
91 1.1 jmcneill struct arm32_pci_chipset arm_acpi_pci_chipset = {
92 1.1 jmcneill .pc_attach_hook = acpi_pci_md_attach_hook,
93 1.1 jmcneill .pc_bus_maxdevs = acpi_pci_md_bus_maxdevs,
94 1.1 jmcneill .pc_make_tag = acpi_pci_md_make_tag,
95 1.1 jmcneill .pc_decompose_tag = acpi_pci_md_decompose_tag,
96 1.1 jmcneill .pc_conf_read = acpi_pci_md_conf_read,
97 1.1 jmcneill .pc_conf_write = acpi_pci_md_conf_write,
98 1.1 jmcneill .pc_conf_hook = acpi_pci_md_conf_hook,
99 1.1 jmcneill .pc_conf_interrupt = acpi_pci_md_conf_interrupt,
100 1.1 jmcneill
101 1.1 jmcneill .pc_intr_map = acpi_pci_md_intr_map,
102 1.1 jmcneill .pc_intr_string = acpi_pci_md_intr_string,
103 1.1 jmcneill .pc_intr_evcnt = acpi_pci_md_intr_evcnt,
104 1.1 jmcneill .pc_intr_setattr = acpi_pci_md_intr_setattr,
105 1.1 jmcneill .pc_intr_establish = acpi_pci_md_intr_establish,
106 1.1 jmcneill .pc_intr_disestablish = acpi_pci_md_intr_disestablish,
107 1.1 jmcneill };
108 1.1 jmcneill
109 1.1 jmcneill static ACPI_STATUS
110 1.1 jmcneill acpi_pci_md_pci_link(ACPI_HANDLE handle, int bus)
111 1.1 jmcneill {
112 1.1 jmcneill ACPI_PCI_ROUTING_TABLE *prt;
113 1.1 jmcneill ACPI_HANDLE linksrc;
114 1.1 jmcneill ACPI_BUFFER buf;
115 1.1 jmcneill ACPI_STATUS rv;
116 1.1 jmcneill void *linkdev;
117 1.1 jmcneill
118 1.1 jmcneill rv = acpi_get(handle, &buf, AcpiGetIrqRoutingTable);
119 1.1 jmcneill if (ACPI_FAILURE(rv))
120 1.1 jmcneill return rv;
121 1.1 jmcneill
122 1.1 jmcneill for (char *p = buf.Pointer; ; p += prt->Length) {
123 1.1 jmcneill prt = (ACPI_PCI_ROUTING_TABLE *)p;
124 1.1 jmcneill if (prt->Length == 0)
125 1.1 jmcneill break;
126 1.1 jmcneill
127 1.1 jmcneill const u_int dev = ACPI_HIWORD(prt->Address);
128 1.1 jmcneill if (prt->Source[0] != 0) {
129 1.1 jmcneill aprint_debug("ACPI: %s dev %u INT%c on lnkdev %s\n",
130 1.1 jmcneill acpi_name(handle), dev, 'A' + (prt->Pin & 3), prt->Source);
131 1.1 jmcneill rv = AcpiGetHandle(ACPI_ROOT_OBJECT, prt->Source, &linksrc);
132 1.1 jmcneill if (ACPI_FAILURE(rv)) {
133 1.1 jmcneill aprint_debug("ACPI: AcpiGetHandle failed for '%s': %s\n",
134 1.1 jmcneill prt->Source, AcpiFormatException(rv));
135 1.1 jmcneill continue;
136 1.1 jmcneill }
137 1.1 jmcneill
138 1.1 jmcneill linkdev = acpi_pci_link_devbyhandle(linksrc);
139 1.1 jmcneill acpi_pci_link_add_reference(linkdev, 0, bus, dev, prt->Pin & 3);
140 1.1 jmcneill } else {
141 1.1 jmcneill aprint_debug("ACPI: %s dev %u INT%c on globint %d\n",
142 1.1 jmcneill acpi_name(handle), dev, 'A' + (prt->Pin & 3), prt->SourceIndex);
143 1.1 jmcneill }
144 1.1 jmcneill }
145 1.1 jmcneill
146 1.1 jmcneill return AE_OK;
147 1.1 jmcneill }
148 1.1 jmcneill
149 1.1 jmcneill static void
150 1.1 jmcneill acpi_pci_md_attach_hook(device_t parent, device_t self,
151 1.1 jmcneill struct pcibus_attach_args *pba)
152 1.1 jmcneill {
153 1.1 jmcneill struct acpi_pci_prt *prt, *prtp;
154 1.1 jmcneill struct acpi_devnode *ad;
155 1.1 jmcneill ACPI_HANDLE handle;
156 1.1 jmcneill int seg, bus, dev, func;
157 1.1 jmcneill
158 1.1 jmcneill seg = 0; /* XXX segment */
159 1.1 jmcneill handle = NULL;
160 1.1 jmcneill
161 1.1 jmcneill if (pba->pba_bridgetag) {
162 1.1 jmcneill /*
163 1.1 jmcneill * Find the PCI address of our parent bridge and look for the
164 1.1 jmcneill * corresponding ACPI device node. If there is no node for this
165 1.1 jmcneill * bus, use the parent bridge routing information.
166 1.1 jmcneill */
167 1.1 jmcneill acpi_pci_md_decompose_tag(NULL, *pba->pba_bridgetag, &bus, &dev, &func);
168 1.1 jmcneill ad = acpi_pcidev_find(seg, bus, dev, func);
169 1.1 jmcneill if (ad != NULL) {
170 1.1 jmcneill handle = ad->ad_handle;
171 1.1 jmcneill } else {
172 1.1 jmcneill /* No routes defined for this bus, copy from parent */
173 1.1 jmcneill TAILQ_FOREACH(prtp, &acpi_pci_irq_routes, prt_list)
174 1.1 jmcneill if (prtp->prt_bus == bus) {
175 1.1 jmcneill handle = prtp->prt_handle;
176 1.1 jmcneill break;
177 1.1 jmcneill }
178 1.1 jmcneill }
179 1.1 jmcneill } else {
180 1.1 jmcneill /*
181 1.1 jmcneill * Lookup the ACPI device node for the root bus.
182 1.1 jmcneill */
183 1.1 jmcneill ad = acpi_pciroot_find(seg, 0);
184 1.1 jmcneill if (ad != NULL)
185 1.1 jmcneill handle = ad->ad_handle;
186 1.1 jmcneill }
187 1.1 jmcneill
188 1.1 jmcneill if (ad != NULL) {
189 1.1 jmcneill /*
190 1.1 jmcneill * This is a new ACPI managed bus. Add PCI link references.
191 1.1 jmcneill */
192 1.1 jmcneill acpi_pci_md_pci_link(ad->ad_handle, pba->pba_bus);
193 1.1 jmcneill }
194 1.1 jmcneill
195 1.1 jmcneill if (handle != NULL) {
196 1.1 jmcneill prt = kmem_alloc(sizeof(*prt), KM_SLEEP);
197 1.1 jmcneill prt->prt_bus = pba->pba_bus;
198 1.1 jmcneill prt->prt_handle = handle;
199 1.1 jmcneill TAILQ_INSERT_TAIL(&acpi_pci_irq_routes, prt, prt_list);
200 1.1 jmcneill }
201 1.1 jmcneill
202 1.1 jmcneill acpimcfg_map_bus(self, pba->pba_pc, pba->pba_bus);
203 1.1 jmcneill }
204 1.1 jmcneill
205 1.1 jmcneill static int
206 1.1 jmcneill acpi_pci_md_bus_maxdevs(void *v, int busno)
207 1.1 jmcneill {
208 1.1 jmcneill return 32;
209 1.1 jmcneill }
210 1.1 jmcneill
211 1.1 jmcneill static pcitag_t
212 1.1 jmcneill acpi_pci_md_make_tag(void *v, int b, int d, int f)
213 1.1 jmcneill {
214 1.1 jmcneill return (b << 16) | (d << 11) | (f << 8);
215 1.1 jmcneill }
216 1.1 jmcneill
217 1.1 jmcneill static void
218 1.1 jmcneill acpi_pci_md_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp)
219 1.1 jmcneill {
220 1.1 jmcneill if (bp)
221 1.1 jmcneill *bp = (tag >> 16) & 0xff;
222 1.1 jmcneill if (dp)
223 1.1 jmcneill *dp = (tag >> 11) & 0x1f;
224 1.1 jmcneill if (fp)
225 1.1 jmcneill *fp = (tag >> 8) & 0x7;
226 1.1 jmcneill }
227 1.1 jmcneill
228 1.1 jmcneill static pcireg_t
229 1.1 jmcneill acpi_pci_md_conf_read(void *v, pcitag_t tag, int offset)
230 1.1 jmcneill {
231 1.1 jmcneill pcireg_t val;
232 1.1 jmcneill
233 1.1 jmcneill if (offset < 0 || offset >= PCI_EXTCONF_SIZE)
234 1.1 jmcneill return (pcireg_t) -1;
235 1.1 jmcneill
236 1.1 jmcneill acpimcfg_conf_read(&arm_acpi_pci_chipset, tag, offset, &val);
237 1.1 jmcneill
238 1.1 jmcneill return val;
239 1.1 jmcneill }
240 1.1 jmcneill
241 1.1 jmcneill static void
242 1.1 jmcneill acpi_pci_md_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)
243 1.1 jmcneill {
244 1.1 jmcneill if (offset < 0 || offset >= PCI_EXTCONF_SIZE)
245 1.1 jmcneill return;
246 1.1 jmcneill
247 1.1 jmcneill acpimcfg_conf_write(&arm_acpi_pci_chipset, tag, offset, val);
248 1.1 jmcneill }
249 1.1 jmcneill
250 1.1 jmcneill static int
251 1.1 jmcneill acpi_pci_md_conf_hook(void *v, int b, int d, int f, pcireg_t id)
252 1.1 jmcneill {
253 1.1 jmcneill return PCI_CONF_DEFAULT;
254 1.1 jmcneill }
255 1.1 jmcneill
256 1.1 jmcneill static void
257 1.1 jmcneill acpi_pci_md_conf_interrupt(void *v, int bus, int dev, int ipin, int sqiz, int *ilinep)
258 1.1 jmcneill {
259 1.1 jmcneill }
260 1.1 jmcneill
261 1.1 jmcneill static struct acpi_pci_prt *
262 1.1 jmcneill acpi_pci_md_intr_find_prt(u_int bus)
263 1.1 jmcneill {
264 1.1 jmcneill struct acpi_pci_prt *prt, *prtp;
265 1.1 jmcneill
266 1.1 jmcneill prt = NULL;
267 1.1 jmcneill TAILQ_FOREACH(prtp, &acpi_pci_irq_routes, prt_list)
268 1.1 jmcneill if (prtp->prt_bus == bus) {
269 1.1 jmcneill prt = prtp;
270 1.1 jmcneill break;
271 1.1 jmcneill }
272 1.1 jmcneill
273 1.1 jmcneill return prt;
274 1.1 jmcneill }
275 1.1 jmcneill
276 1.1 jmcneill static int
277 1.1 jmcneill acpi_pci_md_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ih)
278 1.1 jmcneill {
279 1.1 jmcneill struct acpi_pci_prt *prt;
280 1.1 jmcneill ACPI_PCI_ROUTING_TABLE *tab;
281 1.1 jmcneill int line, pol, trig, error;
282 1.1 jmcneill ACPI_HANDLE linksrc;
283 1.1 jmcneill ACPI_BUFFER buf;
284 1.1 jmcneill void *linkdev;
285 1.1 jmcneill
286 1.1 jmcneill if (pa->pa_intrpin == PCI_INTERRUPT_PIN_NONE)
287 1.1 jmcneill return EINVAL;
288 1.1 jmcneill
289 1.1 jmcneill prt = acpi_pci_md_intr_find_prt(pa->pa_bus);
290 1.1 jmcneill if (prt == NULL)
291 1.1 jmcneill return ENXIO;
292 1.1 jmcneill
293 1.1 jmcneill if (ACPI_FAILURE(acpi_get(prt->prt_handle, &buf, AcpiGetIrqRoutingTable)))
294 1.1 jmcneill return EIO;
295 1.1 jmcneill
296 1.1 jmcneill error = ENOENT;
297 1.1 jmcneill for (char *p = buf.Pointer; ; p += tab->Length) {
298 1.1 jmcneill tab = (ACPI_PCI_ROUTING_TABLE *)p;
299 1.1 jmcneill if (tab->Length == 0)
300 1.1 jmcneill break;
301 1.1 jmcneill
302 1.1 jmcneill if (pa->pa_device == ACPI_HIWORD(tab->Address) &&
303 1.1 jmcneill (pa->pa_intrpin - 1) == (tab->Pin & 3)) {
304 1.1 jmcneill if (tab->Source[0] != 0) {
305 1.1 jmcneill if (ACPI_FAILURE(AcpiGetHandle(ACPI_ROOT_OBJECT, tab->Source, &linksrc)))
306 1.1 jmcneill goto done;
307 1.1 jmcneill linkdev = acpi_pci_link_devbyhandle(linksrc);
308 1.1 jmcneill *ih = acpi_pci_link_route_interrupt(linkdev, tab->SourceIndex,
309 1.1 jmcneill &line, &pol, &trig);
310 1.1 jmcneill error = 0;
311 1.1 jmcneill goto done;
312 1.1 jmcneill } else {
313 1.1 jmcneill *ih = tab->SourceIndex;
314 1.1 jmcneill error = 0;
315 1.1 jmcneill goto done;
316 1.1 jmcneill }
317 1.1 jmcneill }
318 1.1 jmcneill }
319 1.1 jmcneill
320 1.1 jmcneill done:
321 1.1 jmcneill ACPI_FREE(buf.Pointer);
322 1.1 jmcneill return error;
323 1.1 jmcneill }
324 1.1 jmcneill
325 1.1 jmcneill static const char *
326 1.1 jmcneill acpi_pci_md_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len)
327 1.1 jmcneill {
328 1.1 jmcneill snprintf(buf, len, "irq %d", (int)(ih & IH_INDEX_MASK));
329 1.1 jmcneill return buf;
330 1.1 jmcneill }
331 1.1 jmcneill
332 1.1 jmcneill static const struct evcnt *
333 1.1 jmcneill acpi_pci_md_intr_evcnt(void *v, pci_intr_handle_t ih)
334 1.1 jmcneill {
335 1.1 jmcneill return NULL;
336 1.1 jmcneill }
337 1.1 jmcneill
338 1.1 jmcneill static int
339 1.1 jmcneill acpi_pci_md_intr_setattr(void *v, pci_intr_handle_t *ih, int attr, uint64_t data)
340 1.1 jmcneill {
341 1.1 jmcneill switch (attr) {
342 1.1 jmcneill case PCI_INTR_MPSAFE:
343 1.1 jmcneill if (data)
344 1.1 jmcneill *ih |= IH_MPSAFE;
345 1.1 jmcneill else
346 1.1 jmcneill *ih &= ~IH_MPSAFE;
347 1.1 jmcneill return 0;
348 1.1 jmcneill default:
349 1.1 jmcneill return ENODEV;
350 1.1 jmcneill }
351 1.1 jmcneill }
352 1.1 jmcneill
353 1.1 jmcneill static void *
354 1.1 jmcneill acpi_pci_md_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
355 1.1 jmcneill int (*callback)(void *), void *arg)
356 1.1 jmcneill {
357 1.1 jmcneill const int irq = ih & IH_INDEX_MASK;
358 1.1 jmcneill const int mpsafe = (ih & IH_MPSAFE) ? IST_MPSAFE : 0;
359 1.1 jmcneill
360 1.1 jmcneill return intr_establish(irq, ipl, IST_LEVEL | mpsafe, callback, arg);
361 1.1 jmcneill }
362 1.1 jmcneill
363 1.1 jmcneill static void
364 1.1 jmcneill acpi_pci_md_intr_disestablish(void *v, void *vih)
365 1.1 jmcneill {
366 1.1 jmcneill intr_disestablish(vih);
367 1.1 jmcneill }
368