acpi_pci_machdep.c revision 1.10 1 1.10 jmcneill /* $NetBSD: acpi_pci_machdep.c,v 1.10 2019/10/14 00:16:29 jmcneill Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * This code is derived from software contributed to The NetBSD Foundation
8 1.1 jmcneill * by Jared McNeill <jmcneill (at) invisible.ca>.
9 1.1 jmcneill *
10 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
11 1.1 jmcneill * modification, are permitted provided that the following conditions
12 1.1 jmcneill * are met:
13 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
14 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
15 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
17 1.1 jmcneill * documentation and/or other materials provided with the distribution.
18 1.1 jmcneill *
19 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE.
30 1.1 jmcneill */
31 1.1 jmcneill
32 1.1 jmcneill #include <sys/cdefs.h>
33 1.10 jmcneill __KERNEL_RCSID(0, "$NetBSD: acpi_pci_machdep.c,v 1.10 2019/10/14 00:16:29 jmcneill Exp $");
34 1.1 jmcneill
35 1.1 jmcneill #include <sys/param.h>
36 1.1 jmcneill #include <sys/bus.h>
37 1.1 jmcneill #include <sys/device.h>
38 1.1 jmcneill #include <sys/intr.h>
39 1.1 jmcneill #include <sys/systm.h>
40 1.1 jmcneill #include <sys/kernel.h>
41 1.1 jmcneill #include <sys/extent.h>
42 1.1 jmcneill #include <sys/queue.h>
43 1.1 jmcneill #include <sys/mutex.h>
44 1.1 jmcneill #include <sys/kmem.h>
45 1.1 jmcneill
46 1.1 jmcneill #include <machine/cpu.h>
47 1.1 jmcneill
48 1.1 jmcneill #include <arm/cpufunc.h>
49 1.1 jmcneill
50 1.1 jmcneill #include <dev/pci/pcireg.h>
51 1.1 jmcneill #include <dev/pci/pcivar.h>
52 1.1 jmcneill #include <dev/pci/pciconf.h>
53 1.1 jmcneill
54 1.1 jmcneill #include <dev/acpi/acpivar.h>
55 1.1 jmcneill #include <dev/acpi/acpi_mcfg.h>
56 1.1 jmcneill #include <dev/acpi/acpi_pci.h>
57 1.1 jmcneill
58 1.9 jmcneill #include <arm/acpi/acpi_iort.h>
59 1.2 jmcneill #include <arm/acpi/acpi_pci_machdep.h>
60 1.2 jmcneill
61 1.3 jmcneill #include <arm/pci/pci_msi_machdep.h>
62 1.1 jmcneill
63 1.10 jmcneill static int
64 1.10 jmcneill acpi_pci_amazon_graviton_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t *data)
65 1.10 jmcneill {
66 1.10 jmcneill struct acpi_pci_context *ap = pc->pc_conf_v;
67 1.10 jmcneill bus_size_t off;
68 1.10 jmcneill int b, d, f;
69 1.10 jmcneill
70 1.10 jmcneill pci_decompose_tag(pc, tag, &b, &d, &f);
71 1.10 jmcneill
72 1.10 jmcneill if (ap->ap_bus == b) {
73 1.10 jmcneill if (d > 0) {
74 1.10 jmcneill *data = -1;
75 1.10 jmcneill return EINVAL;
76 1.10 jmcneill }
77 1.10 jmcneill off = f * PCI_EXTCONF_SIZE + reg;
78 1.10 jmcneill *data = bus_space_read_4(ap->ap_bst, ap->ap_conf_bsh, off);
79 1.10 jmcneill return 0;
80 1.10 jmcneill }
81 1.10 jmcneill
82 1.10 jmcneill return acpimcfg_conf_read(pc, tag, reg, data);
83 1.10 jmcneill }
84 1.10 jmcneill
85 1.10 jmcneill static int
86 1.10 jmcneill acpi_pci_amazon_graviton_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data)
87 1.10 jmcneill {
88 1.10 jmcneill struct acpi_pci_context *ap = pc->pc_conf_v;
89 1.10 jmcneill bus_size_t off;
90 1.10 jmcneill int b, d, f;
91 1.10 jmcneill
92 1.10 jmcneill pci_decompose_tag(pc, tag, &b, &d, &f);
93 1.10 jmcneill
94 1.10 jmcneill if (ap->ap_bus == b) {
95 1.10 jmcneill if (d > 0) {
96 1.10 jmcneill return EINVAL;
97 1.10 jmcneill }
98 1.10 jmcneill off = f * PCI_EXTCONF_SIZE + reg;
99 1.10 jmcneill bus_space_write_4(ap->ap_bst, ap->ap_conf_bsh, off, data);
100 1.10 jmcneill return 0;
101 1.10 jmcneill }
102 1.10 jmcneill
103 1.10 jmcneill return acpimcfg_conf_write(pc, tag, reg, data);
104 1.10 jmcneill }
105 1.10 jmcneill
106 1.10 jmcneill static ACPI_STATUS
107 1.10 jmcneill acpi_pci_amazon_graviton_map(ACPI_HANDLE handle, UINT32 level, void *ctx, void **retval)
108 1.10 jmcneill {
109 1.10 jmcneill struct acpi_pci_context *ap = ctx;
110 1.10 jmcneill struct acpi_resources res;
111 1.10 jmcneill struct acpi_mem *mem;
112 1.10 jmcneill ACPI_STATUS rv;
113 1.10 jmcneill int error;
114 1.10 jmcneill
115 1.10 jmcneill rv = acpi_resource_parse(ap->ap_dev, handle, "_CRS", &res, &acpi_resource_parse_ops_quiet);
116 1.10 jmcneill if (ACPI_FAILURE(rv))
117 1.10 jmcneill return rv;
118 1.10 jmcneill
119 1.10 jmcneill mem = acpi_res_mem(&res, 0);
120 1.10 jmcneill if (mem == NULL) {
121 1.10 jmcneill acpi_resource_cleanup(&res);
122 1.10 jmcneill return AE_NOT_FOUND;
123 1.10 jmcneill }
124 1.10 jmcneill
125 1.10 jmcneill error = bus_space_map(ap->ap_bst, mem->ar_base, mem->ar_length, 0, &ap->ap_conf_bsh);
126 1.10 jmcneill if (error != 0)
127 1.10 jmcneill return AE_NO_MEMORY;
128 1.10 jmcneill
129 1.10 jmcneill return AE_CTRL_TERMINATE;
130 1.10 jmcneill }
131 1.10 jmcneill
132 1.10 jmcneill static void
133 1.10 jmcneill acpi_pci_amazon_graviton_init(struct pcibus_attach_args *pba)
134 1.10 jmcneill {
135 1.10 jmcneill struct acpi_pci_context *ap = pba->pba_pc->pc_conf_v;
136 1.10 jmcneill ACPI_STATUS rv;
137 1.10 jmcneill
138 1.10 jmcneill rv = AcpiGetDevices(__UNCONST("AMZN0001"), acpi_pci_amazon_graviton_map, ap, NULL);
139 1.10 jmcneill if (ACPI_FAILURE(rv))
140 1.10 jmcneill return;
141 1.10 jmcneill
142 1.10 jmcneill ap->ap_conf_read = acpi_pci_amazon_graviton_conf_read;
143 1.10 jmcneill ap->ap_conf_write = acpi_pci_amazon_graviton_conf_write;
144 1.10 jmcneill }
145 1.10 jmcneill
146 1.10 jmcneill static const struct acpi_pci_quirk {
147 1.10 jmcneill const char q_oemid[ACPI_OEM_ID_SIZE+1];
148 1.10 jmcneill const char q_oemtableid[ACPI_OEM_TABLE_ID_SIZE+1];
149 1.10 jmcneill uint32_t q_oemrevision;
150 1.10 jmcneill void (*q_init)(struct pcibus_attach_args *);
151 1.10 jmcneill } acpi_pci_quirks[] = {
152 1.10 jmcneill { "AMAZON", "GRAVITON", 0, acpi_pci_amazon_graviton_init },
153 1.10 jmcneill };
154 1.10 jmcneill
155 1.10 jmcneill static const struct acpi_pci_quirk *
156 1.10 jmcneill acpi_pci_find_quirk(void)
157 1.10 jmcneill {
158 1.10 jmcneill ACPI_STATUS rv;
159 1.10 jmcneill ACPI_TABLE_MCFG *mcfg;
160 1.10 jmcneill u_int n;
161 1.10 jmcneill
162 1.10 jmcneill rv = AcpiGetTable(ACPI_SIG_MCFG, 0, (ACPI_TABLE_HEADER **)&mcfg);
163 1.10 jmcneill if (ACPI_FAILURE(rv))
164 1.10 jmcneill return NULL;
165 1.10 jmcneill
166 1.10 jmcneill for (n = 0; n < __arraycount(acpi_pci_quirks); n++) {
167 1.10 jmcneill const struct acpi_pci_quirk *q = &acpi_pci_quirks[n];
168 1.10 jmcneill if (memcmp(q->q_oemid, mcfg->Header.OemId, ACPI_OEM_ID_SIZE) == 0 &&
169 1.10 jmcneill memcmp(q->q_oemtableid, mcfg->Header.OemTableId, ACPI_OEM_TABLE_ID_SIZE) == 0 &&
170 1.10 jmcneill q->q_oemrevision == mcfg->Header.OemRevision)
171 1.10 jmcneill return q;
172 1.10 jmcneill }
173 1.10 jmcneill
174 1.10 jmcneill return NULL;
175 1.10 jmcneill }
176 1.10 jmcneill
177 1.1 jmcneill struct acpi_pci_prt {
178 1.7 jmcneill u_int prt_segment;
179 1.1 jmcneill u_int prt_bus;
180 1.1 jmcneill ACPI_HANDLE prt_handle;
181 1.1 jmcneill TAILQ_ENTRY(acpi_pci_prt) prt_list;
182 1.1 jmcneill };
183 1.1 jmcneill
184 1.1 jmcneill static TAILQ_HEAD(, acpi_pci_prt) acpi_pci_irq_routes =
185 1.1 jmcneill TAILQ_HEAD_INITIALIZER(acpi_pci_irq_routes);
186 1.1 jmcneill
187 1.1 jmcneill static void acpi_pci_md_attach_hook(device_t, device_t,
188 1.1 jmcneill struct pcibus_attach_args *);
189 1.1 jmcneill static int acpi_pci_md_bus_maxdevs(void *, int);
190 1.1 jmcneill static pcitag_t acpi_pci_md_make_tag(void *, int, int, int);
191 1.1 jmcneill static void acpi_pci_md_decompose_tag(void *, pcitag_t, int *, int *, int *);
192 1.6 jmcneill static u_int acpi_pci_md_get_segment(void *);
193 1.9 jmcneill static uint32_t acpi_pci_md_get_devid(void *, uint32_t);
194 1.1 jmcneill static pcireg_t acpi_pci_md_conf_read(void *, pcitag_t, int);
195 1.1 jmcneill static void acpi_pci_md_conf_write(void *, pcitag_t, int, pcireg_t);
196 1.1 jmcneill static int acpi_pci_md_conf_hook(void *, int, int, int, pcireg_t);
197 1.1 jmcneill static void acpi_pci_md_conf_interrupt(void *, int, int, int, int, int *);
198 1.1 jmcneill
199 1.1 jmcneill static int acpi_pci_md_intr_map(const struct pci_attach_args *,
200 1.1 jmcneill pci_intr_handle_t *);
201 1.1 jmcneill static const char *acpi_pci_md_intr_string(void *, pci_intr_handle_t,
202 1.1 jmcneill char *, size_t);
203 1.1 jmcneill static const struct evcnt *acpi_pci_md_intr_evcnt(void *, pci_intr_handle_t);
204 1.1 jmcneill static int acpi_pci_md_intr_setattr(void *, pci_intr_handle_t *, int,
205 1.1 jmcneill uint64_t);
206 1.1 jmcneill static void * acpi_pci_md_intr_establish(void *, pci_intr_handle_t,
207 1.8 jmcneill int, int (*)(void *), void *,
208 1.8 jmcneill const char *);
209 1.1 jmcneill static void acpi_pci_md_intr_disestablish(void *, void *);
210 1.1 jmcneill
211 1.1 jmcneill struct arm32_pci_chipset arm_acpi_pci_chipset = {
212 1.1 jmcneill .pc_attach_hook = acpi_pci_md_attach_hook,
213 1.1 jmcneill .pc_bus_maxdevs = acpi_pci_md_bus_maxdevs,
214 1.1 jmcneill .pc_make_tag = acpi_pci_md_make_tag,
215 1.1 jmcneill .pc_decompose_tag = acpi_pci_md_decompose_tag,
216 1.6 jmcneill .pc_get_segment = acpi_pci_md_get_segment,
217 1.9 jmcneill .pc_get_devid = acpi_pci_md_get_devid,
218 1.1 jmcneill .pc_conf_read = acpi_pci_md_conf_read,
219 1.1 jmcneill .pc_conf_write = acpi_pci_md_conf_write,
220 1.1 jmcneill .pc_conf_hook = acpi_pci_md_conf_hook,
221 1.1 jmcneill .pc_conf_interrupt = acpi_pci_md_conf_interrupt,
222 1.1 jmcneill
223 1.1 jmcneill .pc_intr_map = acpi_pci_md_intr_map,
224 1.1 jmcneill .pc_intr_string = acpi_pci_md_intr_string,
225 1.1 jmcneill .pc_intr_evcnt = acpi_pci_md_intr_evcnt,
226 1.1 jmcneill .pc_intr_setattr = acpi_pci_md_intr_setattr,
227 1.1 jmcneill .pc_intr_establish = acpi_pci_md_intr_establish,
228 1.1 jmcneill .pc_intr_disestablish = acpi_pci_md_intr_disestablish,
229 1.1 jmcneill };
230 1.1 jmcneill
231 1.1 jmcneill static ACPI_STATUS
232 1.1 jmcneill acpi_pci_md_pci_link(ACPI_HANDLE handle, int bus)
233 1.1 jmcneill {
234 1.1 jmcneill ACPI_PCI_ROUTING_TABLE *prt;
235 1.1 jmcneill ACPI_HANDLE linksrc;
236 1.1 jmcneill ACPI_BUFFER buf;
237 1.1 jmcneill ACPI_STATUS rv;
238 1.1 jmcneill void *linkdev;
239 1.1 jmcneill
240 1.1 jmcneill rv = acpi_get(handle, &buf, AcpiGetIrqRoutingTable);
241 1.1 jmcneill if (ACPI_FAILURE(rv))
242 1.1 jmcneill return rv;
243 1.1 jmcneill
244 1.1 jmcneill for (char *p = buf.Pointer; ; p += prt->Length) {
245 1.1 jmcneill prt = (ACPI_PCI_ROUTING_TABLE *)p;
246 1.1 jmcneill if (prt->Length == 0)
247 1.1 jmcneill break;
248 1.1 jmcneill
249 1.1 jmcneill const u_int dev = ACPI_HIWORD(prt->Address);
250 1.1 jmcneill if (prt->Source[0] != 0) {
251 1.1 jmcneill aprint_debug("ACPI: %s dev %u INT%c on lnkdev %s\n",
252 1.1 jmcneill acpi_name(handle), dev, 'A' + (prt->Pin & 3), prt->Source);
253 1.1 jmcneill rv = AcpiGetHandle(ACPI_ROOT_OBJECT, prt->Source, &linksrc);
254 1.1 jmcneill if (ACPI_FAILURE(rv)) {
255 1.1 jmcneill aprint_debug("ACPI: AcpiGetHandle failed for '%s': %s\n",
256 1.1 jmcneill prt->Source, AcpiFormatException(rv));
257 1.1 jmcneill continue;
258 1.1 jmcneill }
259 1.1 jmcneill
260 1.1 jmcneill linkdev = acpi_pci_link_devbyhandle(linksrc);
261 1.1 jmcneill acpi_pci_link_add_reference(linkdev, 0, bus, dev, prt->Pin & 3);
262 1.1 jmcneill } else {
263 1.1 jmcneill aprint_debug("ACPI: %s dev %u INT%c on globint %d\n",
264 1.1 jmcneill acpi_name(handle), dev, 'A' + (prt->Pin & 3), prt->SourceIndex);
265 1.1 jmcneill }
266 1.1 jmcneill }
267 1.1 jmcneill
268 1.1 jmcneill return AE_OK;
269 1.1 jmcneill }
270 1.1 jmcneill
271 1.1 jmcneill static void
272 1.1 jmcneill acpi_pci_md_attach_hook(device_t parent, device_t self,
273 1.1 jmcneill struct pcibus_attach_args *pba)
274 1.1 jmcneill {
275 1.2 jmcneill struct acpi_pci_context *ap = pba->pba_pc->pc_conf_v;
276 1.1 jmcneill struct acpi_pci_prt *prt, *prtp;
277 1.10 jmcneill const struct acpi_pci_quirk *q;
278 1.1 jmcneill struct acpi_devnode *ad;
279 1.1 jmcneill ACPI_HANDLE handle;
280 1.1 jmcneill int seg, bus, dev, func;
281 1.1 jmcneill
282 1.2 jmcneill seg = ap->ap_seg;
283 1.1 jmcneill handle = NULL;
284 1.1 jmcneill
285 1.1 jmcneill if (pba->pba_bridgetag) {
286 1.1 jmcneill /*
287 1.1 jmcneill * Find the PCI address of our parent bridge and look for the
288 1.1 jmcneill * corresponding ACPI device node. If there is no node for this
289 1.1 jmcneill * bus, use the parent bridge routing information.
290 1.1 jmcneill */
291 1.1 jmcneill acpi_pci_md_decompose_tag(NULL, *pba->pba_bridgetag, &bus, &dev, &func);
292 1.1 jmcneill ad = acpi_pcidev_find(seg, bus, dev, func);
293 1.1 jmcneill if (ad != NULL) {
294 1.1 jmcneill handle = ad->ad_handle;
295 1.1 jmcneill } else {
296 1.1 jmcneill /* No routes defined for this bus, copy from parent */
297 1.1 jmcneill TAILQ_FOREACH(prtp, &acpi_pci_irq_routes, prt_list)
298 1.1 jmcneill if (prtp->prt_bus == bus) {
299 1.1 jmcneill handle = prtp->prt_handle;
300 1.1 jmcneill break;
301 1.1 jmcneill }
302 1.1 jmcneill }
303 1.1 jmcneill } else {
304 1.1 jmcneill /*
305 1.1 jmcneill * Lookup the ACPI device node for the root bus.
306 1.1 jmcneill */
307 1.1 jmcneill ad = acpi_pciroot_find(seg, 0);
308 1.1 jmcneill if (ad != NULL)
309 1.1 jmcneill handle = ad->ad_handle;
310 1.1 jmcneill }
311 1.1 jmcneill
312 1.1 jmcneill if (handle != NULL) {
313 1.1 jmcneill prt = kmem_alloc(sizeof(*prt), KM_SLEEP);
314 1.1 jmcneill prt->prt_bus = pba->pba_bus;
315 1.7 jmcneill prt->prt_segment = ap->ap_seg;
316 1.1 jmcneill prt->prt_handle = handle;
317 1.1 jmcneill TAILQ_INSERT_TAIL(&acpi_pci_irq_routes, prt, prt_list);
318 1.1 jmcneill }
319 1.1 jmcneill
320 1.10 jmcneill q = acpi_pci_find_quirk();
321 1.10 jmcneill if (q != NULL)
322 1.10 jmcneill q->q_init(pba);
323 1.10 jmcneill
324 1.1 jmcneill acpimcfg_map_bus(self, pba->pba_pc, pba->pba_bus);
325 1.4 jmcneill
326 1.4 jmcneill if (ad != NULL) {
327 1.4 jmcneill /*
328 1.4 jmcneill * This is a new ACPI managed bus. Add PCI link references.
329 1.4 jmcneill */
330 1.4 jmcneill acpi_pci_md_pci_link(ad->ad_handle, pba->pba_bus);
331 1.4 jmcneill }
332 1.1 jmcneill }
333 1.1 jmcneill
334 1.1 jmcneill static int
335 1.1 jmcneill acpi_pci_md_bus_maxdevs(void *v, int busno)
336 1.1 jmcneill {
337 1.1 jmcneill return 32;
338 1.1 jmcneill }
339 1.1 jmcneill
340 1.1 jmcneill static pcitag_t
341 1.1 jmcneill acpi_pci_md_make_tag(void *v, int b, int d, int f)
342 1.1 jmcneill {
343 1.1 jmcneill return (b << 16) | (d << 11) | (f << 8);
344 1.1 jmcneill }
345 1.1 jmcneill
346 1.1 jmcneill static void
347 1.1 jmcneill acpi_pci_md_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp)
348 1.1 jmcneill {
349 1.1 jmcneill if (bp)
350 1.1 jmcneill *bp = (tag >> 16) & 0xff;
351 1.1 jmcneill if (dp)
352 1.1 jmcneill *dp = (tag >> 11) & 0x1f;
353 1.1 jmcneill if (fp)
354 1.1 jmcneill *fp = (tag >> 8) & 0x7;
355 1.1 jmcneill }
356 1.1 jmcneill
357 1.6 jmcneill static u_int
358 1.6 jmcneill acpi_pci_md_get_segment(void *v)
359 1.6 jmcneill {
360 1.6 jmcneill struct acpi_pci_context * const ap = v;
361 1.6 jmcneill
362 1.6 jmcneill return ap->ap_seg;
363 1.6 jmcneill }
364 1.6 jmcneill
365 1.9 jmcneill static uint32_t
366 1.9 jmcneill acpi_pci_md_get_devid(void *v, uint32_t devid)
367 1.9 jmcneill {
368 1.9 jmcneill struct acpi_pci_context * const ap = v;
369 1.9 jmcneill
370 1.9 jmcneill return acpi_iort_pci_root_map(ap->ap_seg, devid);
371 1.9 jmcneill }
372 1.9 jmcneill
373 1.1 jmcneill static pcireg_t
374 1.1 jmcneill acpi_pci_md_conf_read(void *v, pcitag_t tag, int offset)
375 1.1 jmcneill {
376 1.2 jmcneill struct acpi_pci_context * const ap = v;
377 1.1 jmcneill pcireg_t val;
378 1.1 jmcneill
379 1.1 jmcneill if (offset < 0 || offset >= PCI_EXTCONF_SIZE)
380 1.1 jmcneill return (pcireg_t) -1;
381 1.1 jmcneill
382 1.10 jmcneill if (ap->ap_conf_read != NULL)
383 1.10 jmcneill ap->ap_conf_read(&ap->ap_pc, tag, offset, &val);
384 1.10 jmcneill else
385 1.10 jmcneill acpimcfg_conf_read(&ap->ap_pc, tag, offset, &val);
386 1.1 jmcneill
387 1.1 jmcneill return val;
388 1.1 jmcneill }
389 1.1 jmcneill
390 1.1 jmcneill static void
391 1.1 jmcneill acpi_pci_md_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)
392 1.1 jmcneill {
393 1.2 jmcneill struct acpi_pci_context * const ap = v;
394 1.2 jmcneill
395 1.1 jmcneill if (offset < 0 || offset >= PCI_EXTCONF_SIZE)
396 1.1 jmcneill return;
397 1.1 jmcneill
398 1.10 jmcneill if (ap->ap_conf_write != NULL)
399 1.10 jmcneill ap->ap_conf_write(&ap->ap_pc, tag, offset, val);
400 1.10 jmcneill else
401 1.10 jmcneill acpimcfg_conf_write(&ap->ap_pc, tag, offset, val);
402 1.1 jmcneill }
403 1.1 jmcneill
404 1.1 jmcneill static int
405 1.1 jmcneill acpi_pci_md_conf_hook(void *v, int b, int d, int f, pcireg_t id)
406 1.1 jmcneill {
407 1.1 jmcneill return PCI_CONF_DEFAULT;
408 1.1 jmcneill }
409 1.1 jmcneill
410 1.1 jmcneill static void
411 1.1 jmcneill acpi_pci_md_conf_interrupt(void *v, int bus, int dev, int ipin, int sqiz, int *ilinep)
412 1.1 jmcneill {
413 1.1 jmcneill }
414 1.1 jmcneill
415 1.1 jmcneill static struct acpi_pci_prt *
416 1.7 jmcneill acpi_pci_md_intr_find_prt(pci_chipset_tag_t pc, u_int bus)
417 1.1 jmcneill {
418 1.1 jmcneill struct acpi_pci_prt *prt, *prtp;
419 1.7 jmcneill u_int segment;
420 1.7 jmcneill
421 1.7 jmcneill segment = pci_get_segment(pc);
422 1.1 jmcneill
423 1.1 jmcneill prt = NULL;
424 1.1 jmcneill TAILQ_FOREACH(prtp, &acpi_pci_irq_routes, prt_list)
425 1.7 jmcneill if (prtp->prt_segment == segment && prtp->prt_bus == bus) {
426 1.1 jmcneill prt = prtp;
427 1.1 jmcneill break;
428 1.1 jmcneill }
429 1.1 jmcneill
430 1.1 jmcneill return prt;
431 1.1 jmcneill }
432 1.1 jmcneill
433 1.1 jmcneill static int
434 1.1 jmcneill acpi_pci_md_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ih)
435 1.1 jmcneill {
436 1.1 jmcneill struct acpi_pci_prt *prt;
437 1.1 jmcneill ACPI_PCI_ROUTING_TABLE *tab;
438 1.1 jmcneill int line, pol, trig, error;
439 1.1 jmcneill ACPI_HANDLE linksrc;
440 1.1 jmcneill ACPI_BUFFER buf;
441 1.1 jmcneill void *linkdev;
442 1.1 jmcneill
443 1.1 jmcneill if (pa->pa_intrpin == PCI_INTERRUPT_PIN_NONE)
444 1.1 jmcneill return EINVAL;
445 1.1 jmcneill
446 1.7 jmcneill prt = acpi_pci_md_intr_find_prt(pa->pa_pc, pa->pa_bus);
447 1.1 jmcneill if (prt == NULL)
448 1.1 jmcneill return ENXIO;
449 1.1 jmcneill
450 1.1 jmcneill if (ACPI_FAILURE(acpi_get(prt->prt_handle, &buf, AcpiGetIrqRoutingTable)))
451 1.1 jmcneill return EIO;
452 1.1 jmcneill
453 1.1 jmcneill error = ENOENT;
454 1.1 jmcneill for (char *p = buf.Pointer; ; p += tab->Length) {
455 1.1 jmcneill tab = (ACPI_PCI_ROUTING_TABLE *)p;
456 1.1 jmcneill if (tab->Length == 0)
457 1.1 jmcneill break;
458 1.1 jmcneill
459 1.1 jmcneill if (pa->pa_device == ACPI_HIWORD(tab->Address) &&
460 1.1 jmcneill (pa->pa_intrpin - 1) == (tab->Pin & 3)) {
461 1.1 jmcneill if (tab->Source[0] != 0) {
462 1.1 jmcneill if (ACPI_FAILURE(AcpiGetHandle(ACPI_ROOT_OBJECT, tab->Source, &linksrc)))
463 1.1 jmcneill goto done;
464 1.1 jmcneill linkdev = acpi_pci_link_devbyhandle(linksrc);
465 1.1 jmcneill *ih = acpi_pci_link_route_interrupt(linkdev, tab->SourceIndex,
466 1.1 jmcneill &line, &pol, &trig);
467 1.1 jmcneill error = 0;
468 1.1 jmcneill goto done;
469 1.1 jmcneill } else {
470 1.1 jmcneill *ih = tab->SourceIndex;
471 1.1 jmcneill error = 0;
472 1.1 jmcneill goto done;
473 1.1 jmcneill }
474 1.1 jmcneill }
475 1.1 jmcneill }
476 1.1 jmcneill
477 1.1 jmcneill done:
478 1.1 jmcneill ACPI_FREE(buf.Pointer);
479 1.1 jmcneill return error;
480 1.1 jmcneill }
481 1.1 jmcneill
482 1.1 jmcneill static const char *
483 1.1 jmcneill acpi_pci_md_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len)
484 1.1 jmcneill {
485 1.3 jmcneill const int irq = __SHIFTOUT(ih, ARM_PCI_INTR_IRQ);
486 1.5 jmcneill const int vec = __SHIFTOUT(ih, ARM_PCI_INTR_MSI_VEC);
487 1.3 jmcneill
488 1.5 jmcneill if (ih & ARM_PCI_INTR_MSIX)
489 1.5 jmcneill snprintf(buf, len, "irq %d (MSI-X vec %d)", irq, vec);
490 1.5 jmcneill else if (ih & ARM_PCI_INTR_MSI)
491 1.5 jmcneill snprintf(buf, len, "irq %d (MSI vec %d)", irq, vec);
492 1.3 jmcneill else
493 1.3 jmcneill snprintf(buf, len, "irq %d", irq);
494 1.3 jmcneill
495 1.1 jmcneill return buf;
496 1.1 jmcneill }
497 1.1 jmcneill
498 1.1 jmcneill static const struct evcnt *
499 1.1 jmcneill acpi_pci_md_intr_evcnt(void *v, pci_intr_handle_t ih)
500 1.1 jmcneill {
501 1.1 jmcneill return NULL;
502 1.1 jmcneill }
503 1.1 jmcneill
504 1.1 jmcneill static int
505 1.1 jmcneill acpi_pci_md_intr_setattr(void *v, pci_intr_handle_t *ih, int attr, uint64_t data)
506 1.1 jmcneill {
507 1.1 jmcneill switch (attr) {
508 1.1 jmcneill case PCI_INTR_MPSAFE:
509 1.1 jmcneill if (data)
510 1.3 jmcneill *ih |= ARM_PCI_INTR_MPSAFE;
511 1.1 jmcneill else
512 1.3 jmcneill *ih &= ~ARM_PCI_INTR_MPSAFE;
513 1.1 jmcneill return 0;
514 1.1 jmcneill default:
515 1.1 jmcneill return ENODEV;
516 1.1 jmcneill }
517 1.1 jmcneill }
518 1.1 jmcneill
519 1.1 jmcneill static void *
520 1.1 jmcneill acpi_pci_md_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
521 1.8 jmcneill int (*callback)(void *), void *arg, const char *xname)
522 1.1 jmcneill {
523 1.3 jmcneill struct acpi_pci_context * const ap = v;
524 1.3 jmcneill
525 1.5 jmcneill if ((ih & (ARM_PCI_INTR_MSI | ARM_PCI_INTR_MSIX)) != 0)
526 1.8 jmcneill return arm_pci_msi_intr_establish(&ap->ap_pc, ih, ipl, callback, arg, xname);
527 1.3 jmcneill
528 1.3 jmcneill const int irq = (int)__SHIFTOUT(ih, ARM_PCI_INTR_IRQ);
529 1.3 jmcneill const int mpsafe = (ih & ARM_PCI_INTR_MPSAFE) ? IST_MPSAFE : 0;
530 1.1 jmcneill
531 1.8 jmcneill return intr_establish_xname(irq, ipl, IST_LEVEL | mpsafe, callback, arg, xname);
532 1.1 jmcneill }
533 1.1 jmcneill
534 1.1 jmcneill static void
535 1.1 jmcneill acpi_pci_md_intr_disestablish(void *v, void *vih)
536 1.1 jmcneill {
537 1.1 jmcneill intr_disestablish(vih);
538 1.1 jmcneill }
539