acpi_pci_machdep.c revision 1.21
1 /* $NetBSD: acpi_pci_machdep.c,v 1.21 2021/12/21 11:02:38 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2018, 2020 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jared McNeill <jmcneill (at) invisible.ca>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "opt_pci.h" 33 34 #define _INTR_PRIVATE 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: acpi_pci_machdep.c,v 1.21 2021/12/21 11:02:38 skrll Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/bus.h> 41 #include <sys/device.h> 42 #include <sys/intr.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/queue.h> 46 #include <sys/mutex.h> 47 #include <sys/kmem.h> 48 #include <sys/cpu.h> 49 50 #include <arm/cpufunc.h> 51 52 #include <arm/pic/picvar.h> 53 54 #include <dev/pci/pcireg.h> 55 #include <dev/pci/pcivar.h> 56 #include <dev/pci/pciconf.h> 57 58 #include <dev/acpi/acpivar.h> 59 #include <dev/acpi/acpi_mcfg.h> 60 #include <dev/acpi/acpi_pci.h> 61 62 #include <arm/acpi/acpi_iort.h> 63 #include <arm/acpi/acpi_pci_machdep.h> 64 65 #ifdef PCI_SMCCC 66 #include <arm/pci/pci_smccc.h> 67 #endif 68 69 #include <arm/pci/pci_msi_machdep.h> 70 71 struct acpi_pci_prt { 72 u_int prt_segment; 73 u_int prt_bus; 74 ACPI_HANDLE prt_handle; 75 TAILQ_ENTRY(acpi_pci_prt) prt_list; 76 }; 77 78 static TAILQ_HEAD(, acpi_pci_prt) acpi_pci_irq_routes = 79 TAILQ_HEAD_INITIALIZER(acpi_pci_irq_routes); 80 81 struct acpi_pci_pct { 82 struct acpi_pci_context pct_ap; 83 TAILQ_ENTRY(acpi_pci_pct) pct_list; 84 }; 85 86 static TAILQ_HEAD(, acpi_pci_pct) acpi_pci_chipset_tags = 87 TAILQ_HEAD_INITIALIZER(acpi_pci_chipset_tags); 88 89 struct acpi_pci_intr { 90 struct pic_softc pi_pic; 91 int pi_irqbase; 92 int pi_irq; 93 uint32_t pi_unblocked; 94 void *pi_ih; 95 TAILQ_ENTRY(acpi_pci_intr) pi_list; 96 }; 97 98 static TAILQ_HEAD(, acpi_pci_intr) acpi_pci_intrs = 99 TAILQ_HEAD_INITIALIZER(acpi_pci_intrs); 100 101 static const struct acpi_pci_quirk acpi_pci_mcfg_quirks[] = { 102 /* OEM ID OEM Table ID Revision Seg Func */ 103 { "AMAZON", "GRAVITON", 0, -1, acpi_pci_graviton_init }, 104 { "ARMLTD", "ARMN1SDP", 0x20181101, 0, acpi_pci_n1sdp_init }, 105 { "ARMLTD", "ARMN1SDP", 0x20181101, 1, acpi_pci_n1sdp_init }, 106 { "NXP ", "LX2160 ", 0, -1, acpi_pci_layerscape_gen4_init }, 107 }; 108 109 #ifdef PCI_SMCCC 110 static const struct acpi_pci_quirk acpi_pci_smccc_quirk = { 111 .q_segment = -1, 112 .q_init = acpi_pci_smccc_init, 113 }; 114 #endif 115 116 pci_chipset_tag_t acpi_pci_md_get_chipset_tag(struct acpi_softc *, int, int); 117 118 static void acpi_pci_md_attach_hook(device_t, device_t, 119 struct pcibus_attach_args *); 120 static int acpi_pci_md_bus_maxdevs(void *, int); 121 static pcitag_t acpi_pci_md_make_tag(void *, int, int, int); 122 static void acpi_pci_md_decompose_tag(void *, pcitag_t, int *, int *, int *); 123 static u_int acpi_pci_md_get_segment(void *); 124 static uint32_t acpi_pci_md_get_devid(void *, uint32_t); 125 static uint32_t acpi_pci_md_get_frameid(void *, uint32_t); 126 static pcireg_t acpi_pci_md_conf_read(void *, pcitag_t, int); 127 static void acpi_pci_md_conf_write(void *, pcitag_t, int, pcireg_t); 128 static int acpi_pci_md_conf_hook(void *, int, int, int, pcireg_t); 129 static void acpi_pci_md_conf_interrupt(void *, int, int, int, int, int *); 130 131 static int acpi_pci_md_intr_map(const struct pci_attach_args *, 132 pci_intr_handle_t *); 133 static const char *acpi_pci_md_intr_string(void *, pci_intr_handle_t, 134 char *, size_t); 135 static const struct evcnt *acpi_pci_md_intr_evcnt(void *, pci_intr_handle_t); 136 static int acpi_pci_md_intr_setattr(void *, pci_intr_handle_t *, int, 137 uint64_t); 138 static void * acpi_pci_md_intr_establish(void *, pci_intr_handle_t, 139 int, int (*)(void *), void *, 140 const char *); 141 static void acpi_pci_md_intr_disestablish(void *, void *); 142 143 struct arm32_pci_chipset arm_acpi_pci_chipset = { 144 .pc_attach_hook = acpi_pci_md_attach_hook, 145 .pc_bus_maxdevs = acpi_pci_md_bus_maxdevs, 146 .pc_make_tag = acpi_pci_md_make_tag, 147 .pc_decompose_tag = acpi_pci_md_decompose_tag, 148 .pc_get_segment = acpi_pci_md_get_segment, 149 .pc_get_devid = acpi_pci_md_get_devid, 150 .pc_get_frameid = acpi_pci_md_get_frameid, 151 .pc_conf_read = acpi_pci_md_conf_read, 152 .pc_conf_write = acpi_pci_md_conf_write, 153 .pc_conf_hook = acpi_pci_md_conf_hook, 154 .pc_conf_interrupt = acpi_pci_md_conf_interrupt, 155 156 .pc_intr_map = acpi_pci_md_intr_map, 157 .pc_intr_string = acpi_pci_md_intr_string, 158 .pc_intr_evcnt = acpi_pci_md_intr_evcnt, 159 .pc_intr_setattr = acpi_pci_md_intr_setattr, 160 .pc_intr_establish = acpi_pci_md_intr_establish, 161 .pc_intr_disestablish = acpi_pci_md_intr_disestablish, 162 }; 163 164 static ACPI_STATUS 165 acpi_pci_md_pci_link(ACPI_HANDLE handle, pci_chipset_tag_t pc, int bus) 166 { 167 ACPI_PCI_ROUTING_TABLE *prt; 168 ACPI_HANDLE linksrc; 169 ACPI_BUFFER buf; 170 ACPI_STATUS rv; 171 void *linkdev; 172 173 rv = acpi_get(handle, &buf, AcpiGetIrqRoutingTable); 174 if (ACPI_FAILURE(rv)) 175 return rv; 176 177 for (char *p = buf.Pointer; ; p += prt->Length) { 178 prt = (ACPI_PCI_ROUTING_TABLE *)p; 179 if (prt->Length == 0) 180 break; 181 182 const u_int dev = ACPI_HIWORD(prt->Address); 183 if (prt->Source[0] != 0) { 184 aprint_debug("ACPI: %s dev %u INT%c on lnkdev %s\n", 185 acpi_name(handle), dev, 'A' + (prt->Pin & 3), prt->Source); 186 rv = AcpiGetHandle(ACPI_ROOT_OBJECT, prt->Source, &linksrc); 187 if (ACPI_FAILURE(rv)) { 188 aprint_debug("ACPI: AcpiGetHandle failed for '%s': %s\n", 189 prt->Source, AcpiFormatException(rv)); 190 continue; 191 } 192 193 linkdev = acpi_pci_link_devbyhandle(linksrc); 194 acpi_pci_link_add_reference(linkdev, pc, 0, bus, dev, prt->Pin & 3); 195 } else { 196 aprint_debug("ACPI: %s dev %u INT%c on globint %d\n", 197 acpi_name(handle), dev, 'A' + (prt->Pin & 3), prt->SourceIndex); 198 } 199 } 200 201 return AE_OK; 202 } 203 204 static void 205 acpi_pci_md_attach_hook(device_t parent, device_t self, 206 struct pcibus_attach_args *pba) 207 { 208 struct acpi_pci_context *ap = pba->pba_pc->pc_conf_v; 209 struct acpi_pci_prt *prt, *prtp; 210 struct acpi_devnode *ad; 211 ACPI_HANDLE handle; 212 int seg, bus, dev, func; 213 214 seg = ap->ap_seg; 215 handle = NULL; 216 217 if (pba->pba_bridgetag) { 218 /* 219 * Find the PCI address of our parent bridge and look for the 220 * corresponding ACPI device node. If there is no node for this 221 * bus, use the parent bridge routing information. 222 */ 223 acpi_pci_md_decompose_tag(NULL, *pba->pba_bridgetag, &bus, &dev, &func); 224 ad = acpi_pcidev_find(seg, bus, dev, func); 225 if (ad != NULL) { 226 handle = ad->ad_handle; 227 } else { 228 /* No routes defined for this bus, copy from parent */ 229 TAILQ_FOREACH(prtp, &acpi_pci_irq_routes, prt_list) 230 if (prtp->prt_bus == bus) { 231 handle = prtp->prt_handle; 232 break; 233 } 234 } 235 } else { 236 /* 237 * Lookup the ACPI device node for the root bus. 238 */ 239 ad = acpi_pciroot_find(seg, 0); 240 if (ad != NULL) 241 handle = ad->ad_handle; 242 } 243 244 if (handle != NULL) { 245 prt = kmem_alloc(sizeof(*prt), KM_SLEEP); 246 prt->prt_bus = pba->pba_bus; 247 prt->prt_segment = ap->ap_seg; 248 prt->prt_handle = handle; 249 TAILQ_INSERT_TAIL(&acpi_pci_irq_routes, prt, prt_list); 250 } 251 252 acpimcfg_map_bus(self, pba->pba_pc, pba->pba_bus); 253 254 if (ad != NULL) { 255 /* 256 * This is a new ACPI managed bus. Add PCI link references. 257 */ 258 acpi_pci_md_pci_link(ad->ad_handle, pba->pba_pc, pba->pba_bus); 259 } 260 } 261 262 static int 263 acpi_pci_md_bus_maxdevs(void *v, int busno) 264 { 265 return 32; 266 } 267 268 static pcitag_t 269 acpi_pci_md_make_tag(void *v, int b, int d, int f) 270 { 271 return (b << 16) | (d << 11) | (f << 8); 272 } 273 274 static void 275 acpi_pci_md_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp) 276 { 277 if (bp) 278 *bp = (tag >> 16) & 0xff; 279 if (dp) 280 *dp = (tag >> 11) & 0x1f; 281 if (fp) 282 *fp = (tag >> 8) & 0x7; 283 } 284 285 static u_int 286 acpi_pci_md_get_segment(void *v) 287 { 288 struct acpi_pci_context * const ap = v; 289 290 return ap->ap_seg; 291 } 292 293 static uint32_t 294 acpi_pci_md_get_devid(void *v, uint32_t devid) 295 { 296 struct acpi_pci_context * const ap = v; 297 298 return acpi_iort_pci_root_map(ap->ap_seg, devid); 299 } 300 301 static uint32_t 302 acpi_pci_md_get_frameid(void *v, uint32_t devid) 303 { 304 struct acpi_pci_context * const ap = v; 305 306 return acpi_iort_its_id_map(ap->ap_seg, devid); 307 } 308 309 static pcireg_t 310 acpi_pci_md_conf_read(void *v, pcitag_t tag, int offset) 311 { 312 struct acpi_pci_context * const ap = v; 313 pcireg_t val; 314 315 if (offset < 0 || offset >= PCI_EXTCONF_SIZE) 316 return (pcireg_t) -1; 317 318 if (ap->ap_conf_read != NULL) 319 ap->ap_conf_read(&ap->ap_pc, tag, offset, &val); 320 else 321 acpimcfg_conf_read(&ap->ap_pc, tag, offset, &val); 322 323 return val; 324 } 325 326 static void 327 acpi_pci_md_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val) 328 { 329 struct acpi_pci_context * const ap = v; 330 331 if (offset < 0 || offset >= PCI_EXTCONF_SIZE) 332 return; 333 334 if (ap->ap_conf_write != NULL) 335 ap->ap_conf_write(&ap->ap_pc, tag, offset, val); 336 else 337 acpimcfg_conf_write(&ap->ap_pc, tag, offset, val); 338 } 339 340 static int 341 acpi_pci_md_conf_hook(void *v, int b, int d, int f, pcireg_t id) 342 { 343 return PCI_CONF_DEFAULT; 344 } 345 346 static void 347 acpi_pci_md_conf_interrupt(void *v, int bus, int dev, int ipin, int sqiz, int *ilinep) 348 { 349 } 350 351 static struct acpi_pci_prt * 352 acpi_pci_md_intr_find_prt(pci_chipset_tag_t pc, u_int bus) 353 { 354 struct acpi_pci_prt *prt, *prtp; 355 u_int segment; 356 357 segment = pci_get_segment(pc); 358 359 prt = NULL; 360 TAILQ_FOREACH(prtp, &acpi_pci_irq_routes, prt_list) 361 if (prtp->prt_segment == segment && prtp->prt_bus == bus) { 362 prt = prtp; 363 break; 364 } 365 366 return prt; 367 } 368 369 static int 370 acpi_pci_md_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ih) 371 { 372 struct acpi_pci_prt *prt; 373 ACPI_PCI_ROUTING_TABLE *tab; 374 int line, pol, trig, error; 375 ACPI_HANDLE linksrc; 376 ACPI_BUFFER buf; 377 void *linkdev; 378 379 if (pa->pa_intrpin == PCI_INTERRUPT_PIN_NONE) 380 return EINVAL; 381 382 prt = acpi_pci_md_intr_find_prt(pa->pa_pc, pa->pa_bus); 383 if (prt == NULL) 384 return ENXIO; 385 386 if (ACPI_FAILURE(acpi_get(prt->prt_handle, &buf, AcpiGetIrqRoutingTable))) 387 return EIO; 388 389 error = ENOENT; 390 for (char *p = buf.Pointer; ; p += tab->Length) { 391 tab = (ACPI_PCI_ROUTING_TABLE *)p; 392 if (tab->Length == 0) 393 break; 394 395 if (pa->pa_device == ACPI_HIWORD(tab->Address) && 396 (pa->pa_intrpin - 1) == (tab->Pin & 3)) { 397 if (tab->Source[0] != 0) { 398 if (ACPI_FAILURE(AcpiGetHandle(ACPI_ROOT_OBJECT, tab->Source, &linksrc))) 399 goto done; 400 linkdev = acpi_pci_link_devbyhandle(linksrc); 401 *ih = acpi_pci_link_route_interrupt(linkdev, 402 pa->pa_pc, tab->SourceIndex, 403 &line, &pol, &trig); 404 error = 0; 405 goto done; 406 } else { 407 *ih = tab->SourceIndex; 408 error = 0; 409 goto done; 410 } 411 } 412 } 413 414 done: 415 ACPI_FREE(buf.Pointer); 416 return error; 417 } 418 419 static const char * 420 acpi_pci_md_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len) 421 { 422 const int irq = __SHIFTOUT(ih, ARM_PCI_INTR_IRQ); 423 const int vec = __SHIFTOUT(ih, ARM_PCI_INTR_MSI_VEC); 424 425 if (ih & ARM_PCI_INTR_MSIX) 426 snprintf(buf, len, "irq %d (MSI-X vec %d)", irq, vec); 427 else if (ih & ARM_PCI_INTR_MSI) 428 snprintf(buf, len, "irq %d (MSI vec %d)", irq, vec); 429 else 430 snprintf(buf, len, "irq %d", irq); 431 432 return buf; 433 } 434 435 static const struct evcnt * 436 acpi_pci_md_intr_evcnt(void *v, pci_intr_handle_t ih) 437 { 438 return NULL; 439 } 440 441 static int 442 acpi_pci_md_intr_setattr(void *v, pci_intr_handle_t *ih, int attr, uint64_t data) 443 { 444 switch (attr) { 445 case PCI_INTR_MPSAFE: 446 if (data) 447 *ih |= ARM_PCI_INTR_MPSAFE; 448 else 449 *ih &= ~ARM_PCI_INTR_MPSAFE; 450 return 0; 451 default: 452 return ENODEV; 453 } 454 } 455 456 static struct acpi_pci_intr * 457 acpi_pci_md_intr_lookup(int irq) 458 { 459 struct acpi_pci_intr *pi; 460 461 TAILQ_FOREACH(pi, &acpi_pci_intrs, pi_list) 462 if (pi->pi_irq == irq) 463 return pi; 464 465 return NULL; 466 } 467 468 static void 469 acpi_pci_md_unblock_irqs(struct pic_softc *pic, size_t irqbase, uint32_t irqmask) 470 { 471 struct acpi_pci_intr * const pi = (struct acpi_pci_intr *)pic; 472 473 pi->pi_unblocked |= irqmask; 474 } 475 476 static void 477 acpi_pci_md_block_irqs(struct pic_softc *pic, size_t irqbase, uint32_t irqmask) 478 { 479 struct acpi_pci_intr * const pi = (struct acpi_pci_intr *)pic; 480 481 pi->pi_unblocked &= ~irqmask; 482 } 483 484 static int 485 acpi_pci_md_find_pending_irqs(struct pic_softc *pic) 486 { 487 struct acpi_pci_intr * const pi = (struct acpi_pci_intr *)pic; 488 489 pic_mark_pending_sources(pic, 0, pi->pi_unblocked); 490 491 return 1; 492 } 493 494 static void 495 acpi_pci_md_establish_irq(struct pic_softc *pic, struct intrsource *is) 496 { 497 } 498 499 static void 500 acpi_pci_md_source_name(struct pic_softc *pic, int irq, char *buf, size_t len) 501 { 502 snprintf(buf, len, "slot %d", irq); 503 } 504 505 static struct pic_ops acpi_pci_pic_ops = { 506 .pic_unblock_irqs = acpi_pci_md_unblock_irqs, 507 .pic_block_irqs = acpi_pci_md_block_irqs, 508 .pic_find_pending_irqs = acpi_pci_md_find_pending_irqs, 509 .pic_establish_irq = acpi_pci_md_establish_irq, 510 .pic_source_name = acpi_pci_md_source_name, 511 }; 512 513 static void * 514 acpi_pci_md_intr_establish(void *v, pci_intr_handle_t ih, int ipl, 515 int (*callback)(void *), void *arg, const char *xname) 516 { 517 struct acpi_pci_context * const ap = v; 518 struct acpi_pci_intr *pi; 519 int slot; 520 521 if ((ih & (ARM_PCI_INTR_MSI | ARM_PCI_INTR_MSIX)) != 0) 522 return arm_pci_msi_intr_establish(&ap->ap_pc, ih, ipl, callback, arg, xname); 523 524 const int irq = (int)__SHIFTOUT(ih, ARM_PCI_INTR_IRQ); 525 const int mpsafe = (ih & ARM_PCI_INTR_MPSAFE) ? IST_MPSAFE : 0; 526 527 pi = acpi_pci_md_intr_lookup(irq); 528 if (pi == NULL) { 529 pi = kmem_zalloc(sizeof(*pi), KM_SLEEP); 530 pi->pi_irq = irq; 531 snprintf(pi->pi_pic.pic_name, sizeof(pi->pi_pic.pic_name), 532 "PCI irq %d", irq); 533 pi->pi_pic.pic_maxsources = 32; 534 pi->pi_pic.pic_ops = &acpi_pci_pic_ops; 535 pi->pi_irqbase = pic_add(&pi->pi_pic, PIC_IRQBASE_ALLOC); 536 TAILQ_INSERT_TAIL(&acpi_pci_intrs, pi, pi_list); 537 pi->pi_ih = intr_establish_xname(irq, IPL_VM, IST_LEVEL | IST_MPSAFE, 538 pic_handle_intr, &pi->pi_pic, device_xname(ap->ap_dev)); 539 } 540 if (pi->pi_ih == NULL) 541 return NULL; 542 543 /* Find a free slot */ 544 for (slot = 0; slot < pi->pi_pic.pic_maxsources; slot++) 545 if (pi->pi_pic.pic_sources[slot] == NULL) 546 break; 547 if (slot == pi->pi_pic.pic_maxsources) 548 return NULL; 549 550 return intr_establish_xname(pi->pi_irqbase + slot, ipl, IST_LEVEL | mpsafe, 551 callback, arg, xname); 552 } 553 554 static void 555 acpi_pci_md_intr_disestablish(void *v, void *vih) 556 { 557 intr_disestablish(vih); 558 } 559 560 const struct acpi_pci_quirk * 561 acpi_pci_md_find_quirk(int seg) 562 { 563 ACPI_STATUS rv; 564 ACPI_TABLE_MCFG *mcfg; 565 u_int n; 566 567 rv = AcpiGetTable(ACPI_SIG_MCFG, 0, (ACPI_TABLE_HEADER **)&mcfg); 568 if (ACPI_FAILURE(rv)) { 569 #ifdef PCI_SMCCC 570 uint32_t ver = pci_smccc_version(); 571 aprint_debug("%s: SMCCC version %#x\n", __func__, ver); 572 if (PCI_SMCCC_SUCCESS(ver)) { 573 return &acpi_pci_smccc_quirk; 574 } 575 #endif 576 return NULL; 577 } 578 579 for (n = 0; n < __arraycount(acpi_pci_mcfg_quirks); n++) { 580 const struct acpi_pci_quirk *q = &acpi_pci_mcfg_quirks[n]; 581 if (memcmp(q->q_oemid, mcfg->Header.OemId, ACPI_OEM_ID_SIZE) == 0 && 582 memcmp(q->q_oemtableid, mcfg->Header.OemTableId, ACPI_OEM_TABLE_ID_SIZE) == 0 && 583 q->q_oemrevision == mcfg->Header.OemRevision && 584 (q->q_segment == -1 || q->q_segment == seg)) 585 return q; 586 } 587 588 return NULL; 589 } 590 591 pci_chipset_tag_t 592 acpi_pci_md_get_chipset_tag(struct acpi_softc *sc, int seg, int bbn) 593 { 594 struct acpi_pci_pct *pct = NULL, *pctp; 595 const struct acpi_pci_quirk *q; 596 597 TAILQ_FOREACH(pctp, &acpi_pci_chipset_tags, pct_list) 598 if (pctp->pct_ap.ap_seg == seg) { 599 pct = pctp; 600 break; 601 } 602 603 if (pct == NULL) { 604 pct = kmem_zalloc(sizeof(*pct), KM_SLEEP); 605 pct->pct_ap.ap_dev = sc->sc_dev; 606 pct->pct_ap.ap_pc = arm_acpi_pci_chipset; 607 pct->pct_ap.ap_pc.pc_conf_v = &pct->pct_ap; 608 pct->pct_ap.ap_pc.pc_intr_v = &pct->pct_ap; 609 pct->pct_ap.ap_seg = seg; 610 pct->pct_ap.ap_bus = bbn; 611 pct->pct_ap.ap_maxbus = -1; 612 pct->pct_ap.ap_bst = acpi_softc->sc_memt; 613 614 q = acpi_pci_md_find_quirk(seg); 615 if (q != NULL) 616 q->q_init(&pct->pct_ap); 617 618 TAILQ_INSERT_TAIL(&acpi_pci_chipset_tags, pct, pct_list); 619 } 620 621 return &pct->pct_ap.ap_pc; 622 } 623 __strong_alias(acpi_get_pci_chipset_tag,acpi_pci_md_get_chipset_tag); 624
Indexes created Wed Oct 15 16:09:53 GMT 2025