acpipchb.c revision 1.23 1 1.23 jmcneill /* $NetBSD: acpipchb.c,v 1.23 2021/01/26 00:29:22 jmcneill Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * This code is derived from software contributed to The NetBSD Foundation
8 1.1 jmcneill * by Jared McNeill <jmcneill (at) invisible.ca>.
9 1.1 jmcneill *
10 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
11 1.1 jmcneill * modification, are permitted provided that the following conditions
12 1.1 jmcneill * are met:
13 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
14 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
15 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
17 1.1 jmcneill * documentation and/or other materials provided with the distribution.
18 1.1 jmcneill *
19 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE.
30 1.1 jmcneill */
31 1.1 jmcneill
32 1.1 jmcneill #include <sys/cdefs.h>
33 1.23 jmcneill __KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.23 2021/01/26 00:29:22 jmcneill Exp $");
34 1.1 jmcneill
35 1.1 jmcneill #include <sys/param.h>
36 1.1 jmcneill #include <sys/bus.h>
37 1.1 jmcneill #include <sys/device.h>
38 1.1 jmcneill #include <sys/intr.h>
39 1.1 jmcneill #include <sys/systm.h>
40 1.1 jmcneill #include <sys/kernel.h>
41 1.1 jmcneill #include <sys/queue.h>
42 1.1 jmcneill #include <sys/mutex.h>
43 1.1 jmcneill #include <sys/kmem.h>
44 1.19 ad #include <sys/cpu.h>
45 1.1 jmcneill
46 1.1 jmcneill #include <arm/cpufunc.h>
47 1.1 jmcneill
48 1.1 jmcneill #include <dev/pci/pcireg.h>
49 1.1 jmcneill #include <dev/pci/pcivar.h>
50 1.1 jmcneill #include <dev/pci/pciconf.h>
51 1.1 jmcneill
52 1.1 jmcneill #include <dev/acpi/acpivar.h>
53 1.3 jmcneill #include <dev/acpi/acpi_pci.h>
54 1.1 jmcneill #include <dev/acpi/acpi_mcfg.h>
55 1.1 jmcneill
56 1.2 jmcneill #include <arm/acpi/acpi_pci_machdep.h>
57 1.2 jmcneill
58 1.1 jmcneill #define PCIHOST_CACHELINE_SIZE arm_dcache_align
59 1.1 jmcneill
60 1.9 jmcneill #define ACPIPCHB_MAX_RANGES 64 /* XXX arbitrary limit */
61 1.7 jmcneill
62 1.9 jmcneill struct acpipchb_bus_range {
63 1.7 jmcneill bus_addr_t min;
64 1.7 jmcneill bus_addr_t max;
65 1.7 jmcneill bus_addr_t offset;
66 1.9 jmcneill };
67 1.9 jmcneill
68 1.9 jmcneill struct acpipchb_bus_space {
69 1.9 jmcneill struct bus_space bs;
70 1.9 jmcneill
71 1.9 jmcneill struct acpipchb_bus_range range[ACPIPCHB_MAX_RANGES];
72 1.9 jmcneill int nrange;
73 1.7 jmcneill
74 1.7 jmcneill int (*map)(void *, bus_addr_t, bus_size_t,
75 1.7 jmcneill int, bus_space_handle_t *);
76 1.14 jmcneill
77 1.14 jmcneill int flags;
78 1.7 jmcneill };
79 1.7 jmcneill
80 1.1 jmcneill struct acpipchb_softc {
81 1.1 jmcneill device_t sc_dev;
82 1.1 jmcneill
83 1.9 jmcneill bus_space_tag_t sc_memt;
84 1.9 jmcneill
85 1.1 jmcneill ACPI_HANDLE sc_handle;
86 1.1 jmcneill ACPI_INTEGER sc_bus;
87 1.6 jmcneill
88 1.9 jmcneill struct acpipchb_bus_space sc_pcimem_bst;
89 1.7 jmcneill struct acpipchb_bus_space sc_pciio_bst;
90 1.1 jmcneill };
91 1.1 jmcneill
92 1.1 jmcneill static int acpipchb_match(device_t, cfdata_t, void *);
93 1.1 jmcneill static void acpipchb_attach(device_t, device_t, void *);
94 1.1 jmcneill
95 1.22 jmcneill static void acpipchb_setup_ranges(struct acpipchb_softc *,
96 1.22 jmcneill struct pcibus_attach_args *);
97 1.22 jmcneill static void acpipchb_setup_quirks(struct acpipchb_softc *,
98 1.22 jmcneill struct pcibus_attach_args *);
99 1.6 jmcneill
100 1.1 jmcneill CFATTACH_DECL_NEW(acpipchb, sizeof(struct acpipchb_softc),
101 1.1 jmcneill acpipchb_match, acpipchb_attach, NULL, NULL);
102 1.1 jmcneill
103 1.1 jmcneill static const char * const compatible[] = {
104 1.1 jmcneill "PNP0A08",
105 1.1 jmcneill NULL
106 1.1 jmcneill };
107 1.1 jmcneill
108 1.1 jmcneill static int
109 1.1 jmcneill acpipchb_match(device_t parent, cfdata_t cf, void *aux)
110 1.1 jmcneill {
111 1.1 jmcneill struct acpi_attach_args *aa = aux;
112 1.1 jmcneill
113 1.1 jmcneill if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE)
114 1.1 jmcneill return 0;
115 1.1 jmcneill
116 1.1 jmcneill return acpi_match_hid(aa->aa_node->ad_devinfo, compatible);
117 1.1 jmcneill }
118 1.1 jmcneill
119 1.1 jmcneill static void
120 1.1 jmcneill acpipchb_attach(device_t parent, device_t self, void *aux)
121 1.1 jmcneill {
122 1.1 jmcneill struct acpipchb_softc * const sc = device_private(self);
123 1.1 jmcneill struct acpi_attach_args *aa = aux;
124 1.1 jmcneill struct pcibus_attach_args pba;
125 1.15 jmcneill ACPI_INTEGER seg;
126 1.22 jmcneill ACPI_STATUS rv;
127 1.18 jmcneill uint16_t bus_start;
128 1.1 jmcneill
129 1.1 jmcneill sc->sc_dev = self;
130 1.9 jmcneill sc->sc_memt = aa->aa_memt;
131 1.1 jmcneill sc->sc_handle = aa->aa_node->ad_handle;
132 1.1 jmcneill
133 1.18 jmcneill /*
134 1.18 jmcneill * First try to derive the base bus number from _CRS. If that fails,
135 1.18 jmcneill * try _BBN. If that fails too, assume bus 0.
136 1.18 jmcneill */
137 1.18 jmcneill if (ACPI_SUCCESS(acpi_pcidev_pciroot_bus(sc->sc_handle, &bus_start))) {
138 1.18 jmcneill sc->sc_bus = bus_start;
139 1.18 jmcneill } else {
140 1.22 jmcneill rv = acpi_eval_integer(sc->sc_handle, "_BBN", &sc->sc_bus);
141 1.22 jmcneill if (ACPI_FAILURE(rv)) {
142 1.18 jmcneill sc->sc_bus = 0;
143 1.22 jmcneill }
144 1.18 jmcneill }
145 1.1 jmcneill
146 1.22 jmcneill if (ACPI_FAILURE(acpi_eval_integer(sc->sc_handle, "_SEG", &seg))) {
147 1.2 jmcneill seg = 0;
148 1.22 jmcneill }
149 1.2 jmcneill
150 1.1 jmcneill aprint_naive("\n");
151 1.1 jmcneill aprint_normal(": PCI Express Host Bridge\n");
152 1.1 jmcneill
153 1.23 jmcneill acpi_claim_childdevs(self, aa->aa_node);
154 1.23 jmcneill
155 1.5 jmcneill if (acpi_pci_ignore_boot_config(sc->sc_handle)) {
156 1.22 jmcneill if (acpimcfg_configure_bus(self, aa->aa_pc, sc->sc_handle,
157 1.22 jmcneill sc->sc_bus, PCIHOST_CACHELINE_SIZE) != 0) {
158 1.3 jmcneill aprint_error_dev(self, "failed to configure bus\n");
159 1.22 jmcneill }
160 1.5 jmcneill }
161 1.2 jmcneill
162 1.1 jmcneill memset(&pba, 0, sizeof(pba));
163 1.22 jmcneill pba.pba_flags = aa->aa_pciflags &
164 1.22 jmcneill ~(PCI_FLAGS_MEM_OKAY | PCI_FLAGS_IO_OKAY);
165 1.9 jmcneill pba.pba_memt = 0;
166 1.6 jmcneill pba.pba_iot = 0;
167 1.17 jmcneill pba.pba_dmat = aa->aa_dmat;
168 1.1 jmcneill #ifdef _PCI_HAVE_DMA64
169 1.17 jmcneill pba.pba_dmat64 = aa->aa_dmat64;
170 1.1 jmcneill #endif
171 1.16 jmcneill pba.pba_pc = aa->aa_pc;
172 1.1 jmcneill pba.pba_bus = sc->sc_bus;
173 1.1 jmcneill
174 1.9 jmcneill acpipchb_setup_ranges(sc, &pba);
175 1.16 jmcneill acpipchb_setup_quirks(sc, &pba);
176 1.6 jmcneill
177 1.1 jmcneill config_found_ia(self, "pcibus", &pba, pcibusprint);
178 1.1 jmcneill }
179 1.6 jmcneill
180 1.9 jmcneill struct acpipchb_setup_ranges_args {
181 1.6 jmcneill struct acpipchb_softc *sc;
182 1.6 jmcneill struct pcibus_attach_args *pba;
183 1.6 jmcneill };
184 1.6 jmcneill
185 1.7 jmcneill static int
186 1.7 jmcneill acpipchb_bus_space_map(void *t, bus_addr_t bpa, bus_size_t size, int flag,
187 1.7 jmcneill bus_space_handle_t *bshp)
188 1.7 jmcneill {
189 1.7 jmcneill struct acpipchb_bus_space * const abs = t;
190 1.9 jmcneill int i;
191 1.7 jmcneill
192 1.9 jmcneill if (size == 0)
193 1.7 jmcneill return ERANGE;
194 1.7 jmcneill
195 1.14 jmcneill if ((abs->flags & PCI_FLAGS_IO_OKAY) != 0) {
196 1.14 jmcneill /* Force strongly ordered mapping for all I/O space */
197 1.14 jmcneill flag = _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED;
198 1.14 jmcneill }
199 1.14 jmcneill
200 1.9 jmcneill for (i = 0; i < abs->nrange; i++) {
201 1.9 jmcneill struct acpipchb_bus_range * const range = &abs->range[i];
202 1.22 jmcneill if (bpa >= range->min && bpa + size - 1 <= range->max) {
203 1.22 jmcneill return abs->map(t, bpa + range->offset, size,
204 1.22 jmcneill flag, bshp);
205 1.22 jmcneill }
206 1.9 jmcneill }
207 1.9 jmcneill
208 1.9 jmcneill return ERANGE;
209 1.7 jmcneill }
210 1.7 jmcneill
211 1.6 jmcneill static ACPI_STATUS
212 1.9 jmcneill acpipchb_setup_ranges_cb(ACPI_RESOURCE *res, void *ctx)
213 1.6 jmcneill {
214 1.9 jmcneill struct acpipchb_setup_ranges_args * const args = ctx;
215 1.6 jmcneill struct acpipchb_softc * const sc = args->sc;
216 1.6 jmcneill struct pcibus_attach_args *pba = args->pba;
217 1.9 jmcneill struct acpipchb_bus_space *abs;
218 1.9 jmcneill struct acpipchb_bus_range *range;
219 1.9 jmcneill const char *range_type;
220 1.9 jmcneill u_int pci_flags;
221 1.6 jmcneill
222 1.6 jmcneill if (res->Type != ACPI_RESOURCE_TYPE_ADDRESS32 &&
223 1.22 jmcneill res->Type != ACPI_RESOURCE_TYPE_ADDRESS64) {
224 1.6 jmcneill return AE_OK;
225 1.22 jmcneill }
226 1.6 jmcneill
227 1.9 jmcneill switch (res->Data.Address.ResourceType) {
228 1.9 jmcneill case ACPI_IO_RANGE:
229 1.9 jmcneill abs = &sc->sc_pciio_bst;
230 1.9 jmcneill range_type = "I/O";
231 1.9 jmcneill pci_flags = PCI_FLAGS_IO_OKAY;
232 1.9 jmcneill break;
233 1.9 jmcneill case ACPI_MEMORY_RANGE:
234 1.9 jmcneill abs = &sc->sc_pcimem_bst;
235 1.9 jmcneill range_type = "MEM";
236 1.9 jmcneill pci_flags = PCI_FLAGS_MEM_OKAY;
237 1.9 jmcneill break;
238 1.9 jmcneill default:
239 1.6 jmcneill return AE_OK;
240 1.9 jmcneill }
241 1.6 jmcneill
242 1.9 jmcneill if (abs->nrange == ACPIPCHB_MAX_RANGES) {
243 1.9 jmcneill aprint_error_dev(sc->sc_dev,
244 1.22 jmcneill "maximum number of ranges reached (ACPIPCHB_MAX_RANGES)\n");
245 1.9 jmcneill return AE_LIMIT;
246 1.9 jmcneill }
247 1.6 jmcneill
248 1.9 jmcneill range = &abs->range[abs->nrange];
249 1.6 jmcneill switch (res->Type) {
250 1.6 jmcneill case ACPI_RESOURCE_TYPE_ADDRESS32:
251 1.9 jmcneill range->min = res->Data.Address32.Address.Minimum;
252 1.9 jmcneill range->max = res->Data.Address32.Address.Maximum;
253 1.9 jmcneill range->offset = res->Data.Address32.Address.TranslationOffset;
254 1.6 jmcneill break;
255 1.6 jmcneill case ACPI_RESOURCE_TYPE_ADDRESS64:
256 1.9 jmcneill range->min = res->Data.Address64.Address.Minimum;
257 1.9 jmcneill range->max = res->Data.Address64.Address.Maximum;
258 1.9 jmcneill range->offset = res->Data.Address64.Address.TranslationOffset;
259 1.6 jmcneill break;
260 1.9 jmcneill default:
261 1.9 jmcneill return AE_OK;
262 1.6 jmcneill }
263 1.9 jmcneill abs->nrange++;
264 1.6 jmcneill
265 1.22 jmcneill aprint_debug_dev(sc->sc_dev, "PCI %s [%#lx-%#lx] -> %#lx\n",
266 1.22 jmcneill range_type, range->min, range->max, range->offset);
267 1.6 jmcneill
268 1.9 jmcneill if ((pba->pba_flags & pci_flags) == 0) {
269 1.9 jmcneill abs->bs = *sc->sc_memt;
270 1.9 jmcneill abs->bs.bs_cookie = abs;
271 1.9 jmcneill abs->map = abs->bs.bs_map;
272 1.14 jmcneill abs->flags = pci_flags;
273 1.9 jmcneill abs->bs.bs_map = acpipchb_bus_space_map;
274 1.22 jmcneill if ((pci_flags & PCI_FLAGS_IO_OKAY) != 0) {
275 1.9 jmcneill pba->pba_iot = &abs->bs;
276 1.22 jmcneill } else if ((pci_flags & PCI_FLAGS_MEM_OKAY) != 0) {
277 1.9 jmcneill pba->pba_memt = &abs->bs;
278 1.22 jmcneill }
279 1.9 jmcneill pba->pba_flags |= pci_flags;
280 1.9 jmcneill }
281 1.6 jmcneill
282 1.9 jmcneill return AE_OK;
283 1.6 jmcneill }
284 1.6 jmcneill
285 1.6 jmcneill static void
286 1.9 jmcneill acpipchb_setup_ranges(struct acpipchb_softc *sc, struct pcibus_attach_args *pba)
287 1.6 jmcneill {
288 1.9 jmcneill struct acpipchb_setup_ranges_args args;
289 1.6 jmcneill
290 1.6 jmcneill args.sc = sc;
291 1.6 jmcneill args.pba = pba;
292 1.6 jmcneill
293 1.22 jmcneill AcpiWalkResources(sc->sc_handle, "_CRS", acpipchb_setup_ranges_cb,
294 1.22 jmcneill &args);
295 1.6 jmcneill }
296 1.16 jmcneill
297 1.16 jmcneill static void
298 1.16 jmcneill acpipchb_setup_quirks(struct acpipchb_softc *sc, struct pcibus_attach_args *pba)
299 1.16 jmcneill {
300 1.22 jmcneill struct arm32_pci_chipset *md_pc =
301 1.22 jmcneill (struct arm32_pci_chipset *)pba->pba_pc;
302 1.16 jmcneill struct acpi_pci_context *ap = md_pc->pc_conf_v;
303 1.16 jmcneill
304 1.16 jmcneill pba->pba_flags &= ~ap->ap_pciflags_clear;
305 1.16 jmcneill }
306