| History log of /src/sys/arch/arm/acpi/acpipchb.c |
| Revision | | Date | Author | Comments |
| 1.33 |
| 11-Jan-2025 |
jmcneill | acpi: i2c: only claim child devices with a _CRS or _ADR method
acpi_enter_i2c_devs is too aggressive with claiming child device nodes.
Restrict it to devices with either a _CRS or _ADR method. A driver is
free to claim more if appropriate.
Fixes missing HKEY (LEN0268) device on Thinkpad T14s Gen 6 (X1E).
|
| 1.32 |
| 15-Oct-2022 |
jmcneill | branches: 1.32.8;
Use "non-posted" instead of "strongly ordered" to describe nGnRnE mappings
Rename the following defines:
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED to BUS_SPACE_MAP_NONPOSTED
- PMAP_DEV_SO to PMAP_DEV_NP
- LX_BLKPAG_ATTR_DEVICE_MEM_SO to LX_BLKPAG_ATTR_DEVICE_MEM_NP
Rename the following option:
- AARCH64_DEVICE_MEM_STRONGLY_ORDERED to AARCH64_DEVICE_MEM_NONPOSTED
|
| 1.31 |
| 14-Oct-2022 |
jmcneill | Add a PCI resource manager and use it on Arm ACPI platforms.
The Arm ACPI code relied on PCI_NETBSD_CONFIGURE to configure devices that
were not enabled by system firmware. This is not safe to do unless the
firmware explicitly permits it using a device specific method defined in
the PCI firmware spec.
Introduce a new PCI resource manager that discovers what has already been
configured by firmware and allocates from the remaining space. This will
ensure that devices setup by firmware are untouched and only will program
BARs of devices that are not enabled at boot time.
The current implementation assumes that the parent PCI-PCI bridge's
are already configured. A worthwhile improvement in the future would be
to support programming windows for bridges that are not fully configured.
|
| 1.30 |
| 13-Aug-2022 |
jmcneill | Add "nopcimsi" boot option to force legacy INTx only mode.
|
| 1.29 |
| 13-Aug-2022 |
jmcneill | acpipchb: Add a kernel cmdline option to skip PCI resource assignment.
Passing "nopciconf" to the kernel will force acpipchb to skip PCI
resource assignment.
|
| 1.28 |
| 10-Aug-2021 |
jmcneill | Disable MSI if the linux,pcie-nomsi flag is present
|
| 1.27 |
| 07-Aug-2021 |
jmcneill | arm: acpi: Add support for SMCCC based PCI config access.
|
| 1.26 |
| 07-Aug-2021 |
thorpej | Merge thorpej-cfargs2.
|
| 1.25 |
| 12-May-2021 |
thorpej | branches: 1.25.4;
Pass along our devhandle to the PCI bus instance we attach.
|
| 1.24 |
| 24-Apr-2021 |
thorpej | branches: 1.24.2; 1.24.4;
Merge thorpej-cfargs branch:
Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.
Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)
Remove unnecessary or redundant interface attributes where they're not
needed.
There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)
...and a sentinel value CFARG_EOL.
Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.
Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
|
| 1.23 |
| 26-Jan-2021 |
jmcneill | branches: 1.23.2;
acpipchb is a bus, so claim all child ACPI device nodes
|
| 1.22 |
| 06-Dec-2020 |
jmcneill | Style fixes. NFC.
|
| 1.21 |
| 24-Oct-2020 |
skrll | branches: 1.21.2;
Trailing whitespace
|
| 1.20 |
| 17-Jun-2020 |
thorpej | <sys/extent.h> not needed here.
|
| 1.19 |
| 15-Jun-2020 |
ad | Use sys/cpu.h so that curcpu defined in terms of curlwp->l_cpu works too.
|
| 1.18 |
| 08-May-2020 |
jmcneill | Try to get the starting bus number from _CRS before falling back to _BBN.
There are apparently cases where the first bus in _CRS does not match the
value of _BBN, and the consensus is that _CRS should take precedence.
|
| 1.17 |
| 21-Jan-2020 |
jmcneill | Provide a properly constrained 32-bit DMA tag to ACPI.
|
| 1.16 |
| 17-Jan-2020 |
jmcneill | Add support for Arm N1 SDP PCIe host controller.
The N1 SDP has a few bugs that we need to work around:
- PCIe root port config space lives in a non-standard location.
- Access to PCIe config space of devices that do not exist results in
an sync SError. Firmware creates a "known devices" table at a fixed
physical address that we use to filter PCI conf access to only known
devices.
This change splits the Arm ACPI PCI quirks into separate files for each
host controller, and allows per-segment quirks to be applied.
These changes exposed some bugs in the MI ACPI layer related to
multi-segment support. The MI ACPI PCI code was using a shared PCI
chipset tag to access devices, and these accesses can happen before our
PCI host bridge drivers are attached! The global chipset tag is now gone,
and an MD callback can provide a custom tag on a per-segment basis.
|
| 1.15 |
| 29-Dec-2019 |
jmcneill | branches: 1.15.2;
Allow MD code to provide custom bus_dma tags on a per-node basis. On Arm
this is required to return non-coherent bus_dma tags for device nodes with
_CCA=0
|
| 1.14 |
| 28-Dec-2019 |
jmcneill | Do not use Early Write Acknowledge for PCIe I/O and config space.
|
| 1.13 |
| 15-Oct-2019 |
jmcneill | Amazon Graviton maxdevs quirk no longer required as of pci.c r1.155
|
| 1.12 |
| 15-Oct-2019 |
jmcneill | Fix detection of root port resources for Graviton and remove no longer required bridge fixup
|
| 1.11 |
| 14-Oct-2019 |
jmcneill | More Amazon Graviton quirks:
- Ignore devno > 0 on the PCIe root port.
- Fixup PCIe bridge bus number register on the root port.
- Move quirk handling to acpipchb so it can be applied before the bus
is configured.
|
| 1.10 |
| 14-Oct-2019 |
jmcneill | Add quirks for Amazon Graviton PCIe root ports. Configuration space for the
root port is found in a child AMZN0001 resource, not the MCFG table.
|
| 1.9 |
| 25-Jun-2019 |
jmcneill | branches: 1.9.2;
Honour _CRS mem ranges and translation offsets instead of assuming 1:1
mappings. Tested on Overdrive 1000.
|
| 1.8 |
| 19-Jun-2019 |
jmcneill | Provide a 64-bit dma tag and use a coherent tag unless CCA=0
|
| 1.7 |
| 19-Nov-2018 |
jmcneill | branches: 1.7.4;
On second thought, get rid of "bs_base" from struct bus_space and use a
custom bs_map for acpipchb instead.
|
| 1.6 |
| 18-Nov-2018 |
jmcneill | Add support for PCI I/O space.
|
| 1.5 |
| 16-Nov-2018 |
jmcneill | Restore acpi_pci_ignore_boot_config lost in previous commit
|
| 1.4 |
| 16-Nov-2018 |
jmcneill | Add intr_establish_xname support to arm and expose it to intrctl
|
| 1.3 |
| 21-Oct-2018 |
jmcneill | Only configure PCI bus if _DSM rev 1 func 5 ("Ignore PCI boot configuration") returns 1
|
| 1.2 |
| 19-Oct-2018 |
jmcneill | branches: 1.2.2;
Add support for PCI Segment Groups.
|
| 1.1 |
| 15-Oct-2018 |
jmcneill | Add ARM ACPI PCI support.
|
| 1.2.2.3 |
| 26-Nov-2018 |
pgoyette | Sync with HEAD, resolve a couple of conflicts
|
| 1.2.2.2 |
| 20-Oct-2018 |
pgoyette | Sync with head
|
| 1.2.2.1 |
| 19-Oct-2018 |
pgoyette | file acpipchb.c was added on branch pgoyette-compat on 2018-10-20 06:58:24 +0000
|
| 1.7.4.3 |
| 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.7.4.2 |
| 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.7.4.1 |
| 19-Nov-2018 |
christos | file acpipchb.c was added on branch phil-wifi on 2019-06-10 22:05:50 +0000
|
| 1.9.2.2 |
| 29-Dec-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #586):
sys/arch/arm/nvidia/tegra_pcie.c: revision 1.27
sys/arch/aarch64/aarch64/pmap.c: revision 1.57
sys/arch/aarch64/aarch64/locore.S: revision 1.48
sys/arch/aarch64/include/armreg.h: revision 1.29
sys/arch/aarch64/aarch64/pmap.c: revision 1.58
sys/arch/aarch64/aarch64/locore.S: revision 1.49
sys/arch/arm/acpi/acpipchb.c: revision 1.14
sys/arch/aarch64/aarch64/genassym.cf: revision 1.16
sys/arch/arm/acpi/acpi_machdep.c: revision 1.13
sys/arch/aarch64/include/pmap.h: revision 1.27
sys/arch/aarch64/aarch64/genassym.cf: revision 1.17
sys/arch/aarch64/include/pmap.h: revision 1.28
sys/arch/arm/fdt/pcihost_fdtvar.h: revision 1.3
sys/arch/arm/include/bus_defs.h: revision 1.14
sys/arch/aarch64/aarch64/bus_space.c: revision 1.9
sys/arch/arm/fdt/pcihost_fdt.c: revision 1.12
sys/arch/aarch64/conf/files.aarch64: revision 1.15
sys/arch/aarch64/conf/files.aarch64: revision 1.16
sys/arch/arm/rockchip/rk3399_pcie.c: revision 1.9
Enable early write acknowledge for device memory mappings.
Do not use Early Write Acknowledge for PCIe I/O and config space.
|
| 1.9.2.1 |
| 15-Oct-2019 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #332):
sys/arch/arm/acpi/acpipchb.c: revision 1.10
sys/arch/arm/acpi/acpipchb.c: revision 1.11
sys/arch/arm/acpi/acpipchb.c: revision 1.12
sys/arch/arm/acpi/acpi_pci_machdep.h: revision 1.3
sys/arch/arm/acpi/acpi_pci_machdep.h: revision 1.4
sys/arch/arm/acpi/acpi_pci_machdep.c: revision 1.10
sys/arch/arm/acpi/acpi_pci_machdep.c: revision 1.11
Add quirks for Amazon Graviton PCIe root ports. Configuration space for the
root port is found in a child AMZN0001 resource, not the MCFG table.
-
More Amazon Graviton quirks:
- Ignore devno > 0 on the PCIe root port.
- Fixup PCIe bridge bus number register on the root port.
- Move quirk handling to acpipchb so it can be applied before the bus
is configured.
-
Fix detection of root port resources for Graviton and remove no longer required bridge fixup
|
| 1.15.2.2 |
| 25-Jan-2020 |
ad | Sync with head.
|
| 1.15.2.1 |
| 17-Jan-2020 |
ad | Sync with head.
|
| 1.21.2.2 |
| 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.21.2.1 |
| 14-Dec-2020 |
thorpej | Sync w/ HEAD.
|
| 1.23.2.1 |
| 23-Mar-2021 |
thorpej | Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
|
| 1.24.4.1 |
| 31-May-2021 |
cjep | sync with head
|
| 1.24.2.1 |
| 13-May-2021 |
thorpej | Sync with HEAD.
|
| 1.25.4.1 |
| 04-Aug-2021 |
thorpej | Adapt to CFARGS().
|
| 1.32.8.1 |
| 02-Aug-2025 |
perseant | Sync with HEAD
|
