acpipchb.c revision 1.18
1 /* $NetBSD: acpipchb.c,v 1.18 2020/05/08 14:44:23 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2018 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jared McNeill <jmcneill (at) invisible.ca>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.18 2020/05/08 14:44:23 jmcneill Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/device.h> 38 #include <sys/intr.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/extent.h> 42 #include <sys/queue.h> 43 #include <sys/mutex.h> 44 #include <sys/kmem.h> 45 46 #include <machine/cpu.h> 47 48 #include <arm/cpufunc.h> 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 #include <dev/pci/pciconf.h> 53 54 #include <dev/acpi/acpivar.h> 55 #include <dev/acpi/acpi_pci.h> 56 #include <dev/acpi/acpi_mcfg.h> 57 58 #include <arm/acpi/acpi_pci_machdep.h> 59 60 #define PCIHOST_CACHELINE_SIZE arm_dcache_align 61 62 #define ACPIPCHB_MAX_RANGES 64 /* XXX arbitrary limit */ 63 64 struct acpipchb_bus_range { 65 bus_addr_t min; 66 bus_addr_t max; 67 bus_addr_t offset; 68 }; 69 70 struct acpipchb_bus_space { 71 struct bus_space bs; 72 73 struct acpipchb_bus_range range[ACPIPCHB_MAX_RANGES]; 74 int nrange; 75 76 int (*map)(void *, bus_addr_t, bus_size_t, 77 int, bus_space_handle_t *); 78 79 int flags; 80 }; 81 82 struct acpipchb_softc { 83 device_t sc_dev; 84 85 bus_space_tag_t sc_memt; 86 87 ACPI_HANDLE sc_handle; 88 ACPI_INTEGER sc_bus; 89 90 struct acpipchb_bus_space sc_pcimem_bst; 91 struct acpipchb_bus_space sc_pciio_bst; 92 }; 93 94 static int acpipchb_match(device_t, cfdata_t, void *); 95 static void acpipchb_attach(device_t, device_t, void *); 96 97 static void acpipchb_setup_ranges(struct acpipchb_softc *, struct pcibus_attach_args *); 98 static void acpipchb_setup_quirks(struct acpipchb_softc *, struct pcibus_attach_args *); 99 100 CFATTACH_DECL_NEW(acpipchb, sizeof(struct acpipchb_softc), 101 acpipchb_match, acpipchb_attach, NULL, NULL); 102 103 static const char * const compatible[] = { 104 "PNP0A08", 105 NULL 106 }; 107 108 static int 109 acpipchb_match(device_t parent, cfdata_t cf, void *aux) 110 { 111 struct acpi_attach_args *aa = aux; 112 113 if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE) 114 return 0; 115 116 return acpi_match_hid(aa->aa_node->ad_devinfo, compatible); 117 } 118 119 static void 120 acpipchb_attach(device_t parent, device_t self, void *aux) 121 { 122 struct acpipchb_softc * const sc = device_private(self); 123 struct acpi_attach_args *aa = aux; 124 struct pcibus_attach_args pba; 125 ACPI_INTEGER seg; 126 uint16_t bus_start; 127 128 sc->sc_dev = self; 129 sc->sc_memt = aa->aa_memt; 130 sc->sc_handle = aa->aa_node->ad_handle; 131 132 /* 133 * First try to derive the base bus number from _CRS. If that fails, 134 * try _BBN. If that fails too, assume bus 0. 135 */ 136 if (ACPI_SUCCESS(acpi_pcidev_pciroot_bus(sc->sc_handle, &bus_start))) { 137 sc->sc_bus = bus_start; 138 } else { 139 if (ACPI_FAILURE(acpi_eval_integer(sc->sc_handle, "_BBN", &sc->sc_bus))) 140 sc->sc_bus = 0; 141 } 142 143 if (ACPI_FAILURE(acpi_eval_integer(sc->sc_handle, "_SEG", &seg))) 144 seg = 0; 145 146 aprint_naive("\n"); 147 aprint_normal(": PCI Express Host Bridge\n"); 148 149 if (acpi_pci_ignore_boot_config(sc->sc_handle)) { 150 if (acpimcfg_configure_bus(self, aa->aa_pc, sc->sc_handle, sc->sc_bus, PCIHOST_CACHELINE_SIZE) != 0) 151 aprint_error_dev(self, "failed to configure bus\n"); 152 } 153 154 memset(&pba, 0, sizeof(pba)); 155 pba.pba_flags = aa->aa_pciflags & ~(PCI_FLAGS_MEM_OKAY | PCI_FLAGS_IO_OKAY); 156 pba.pba_memt = 0; 157 pba.pba_iot = 0; 158 pba.pba_dmat = aa->aa_dmat; 159 #ifdef _PCI_HAVE_DMA64 160 pba.pba_dmat64 = aa->aa_dmat64; 161 #endif 162 pba.pba_pc = aa->aa_pc; 163 pba.pba_bus = sc->sc_bus; 164 165 acpipchb_setup_ranges(sc, &pba); 166 acpipchb_setup_quirks(sc, &pba); 167 168 config_found_ia(self, "pcibus", &pba, pcibusprint); 169 } 170 171 struct acpipchb_setup_ranges_args { 172 struct acpipchb_softc *sc; 173 struct pcibus_attach_args *pba; 174 }; 175 176 static int 177 acpipchb_bus_space_map(void *t, bus_addr_t bpa, bus_size_t size, int flag, 178 bus_space_handle_t *bshp) 179 { 180 struct acpipchb_bus_space * const abs = t; 181 int i; 182 183 if (size == 0) 184 return ERANGE; 185 186 if ((abs->flags & PCI_FLAGS_IO_OKAY) != 0) { 187 /* Force strongly ordered mapping for all I/O space */ 188 flag = _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED; 189 } 190 191 for (i = 0; i < abs->nrange; i++) { 192 struct acpipchb_bus_range * const range = &abs->range[i]; 193 if (bpa >= range->min && bpa + size - 1 <= range->max) 194 return abs->map(t, bpa + range->offset, size, flag, bshp); 195 } 196 197 return ERANGE; 198 } 199 200 static ACPI_STATUS 201 acpipchb_setup_ranges_cb(ACPI_RESOURCE *res, void *ctx) 202 { 203 struct acpipchb_setup_ranges_args * const args = ctx; 204 struct acpipchb_softc * const sc = args->sc; 205 struct pcibus_attach_args *pba = args->pba; 206 struct acpipchb_bus_space *abs; 207 struct acpipchb_bus_range *range; 208 const char *range_type; 209 u_int pci_flags; 210 211 if (res->Type != ACPI_RESOURCE_TYPE_ADDRESS32 && 212 res->Type != ACPI_RESOURCE_TYPE_ADDRESS64) 213 return AE_OK; 214 215 switch (res->Data.Address.ResourceType) { 216 case ACPI_IO_RANGE: 217 abs = &sc->sc_pciio_bst; 218 range_type = "I/O"; 219 pci_flags = PCI_FLAGS_IO_OKAY; 220 break; 221 case ACPI_MEMORY_RANGE: 222 abs = &sc->sc_pcimem_bst; 223 range_type = "MEM"; 224 pci_flags = PCI_FLAGS_MEM_OKAY; 225 break; 226 default: 227 return AE_OK; 228 } 229 230 if (abs->nrange == ACPIPCHB_MAX_RANGES) { 231 aprint_error_dev(sc->sc_dev, 232 "maximum number of ranges reached, increase ACPIPCHB_MAX_RANGES\n"); 233 return AE_LIMIT; 234 } 235 236 range = &abs->range[abs->nrange]; 237 switch (res->Type) { 238 case ACPI_RESOURCE_TYPE_ADDRESS32: 239 range->min = res->Data.Address32.Address.Minimum; 240 range->max = res->Data.Address32.Address.Maximum; 241 range->offset = res->Data.Address32.Address.TranslationOffset; 242 break; 243 case ACPI_RESOURCE_TYPE_ADDRESS64: 244 range->min = res->Data.Address64.Address.Minimum; 245 range->max = res->Data.Address64.Address.Maximum; 246 range->offset = res->Data.Address64.Address.TranslationOffset; 247 break; 248 default: 249 return AE_OK; 250 } 251 abs->nrange++; 252 253 aprint_debug_dev(sc->sc_dev, "PCI %s [%#lx-%#lx] -> %#lx\n", range_type, range->min, range->max, range->offset); 254 255 if ((pba->pba_flags & pci_flags) == 0) { 256 abs->bs = *sc->sc_memt; 257 abs->bs.bs_cookie = abs; 258 abs->map = abs->bs.bs_map; 259 abs->flags = pci_flags; 260 abs->bs.bs_map = acpipchb_bus_space_map; 261 if ((pci_flags & PCI_FLAGS_IO_OKAY) != 0) 262 pba->pba_iot = &abs->bs; 263 else if ((pci_flags & PCI_FLAGS_MEM_OKAY) != 0) 264 pba->pba_memt = &abs->bs; 265 pba->pba_flags |= pci_flags; 266 } 267 268 return AE_OK; 269 } 270 271 static void 272 acpipchb_setup_ranges(struct acpipchb_softc *sc, struct pcibus_attach_args *pba) 273 { 274 struct acpipchb_setup_ranges_args args; 275 276 args.sc = sc; 277 args.pba = pba; 278 279 AcpiWalkResources(sc->sc_handle, "_CRS", acpipchb_setup_ranges_cb, &args); 280 } 281 282 static void 283 acpipchb_setup_quirks(struct acpipchb_softc *sc, struct pcibus_attach_args *pba) 284 { 285 struct arm32_pci_chipset *md_pc = (struct arm32_pci_chipset *)pba->pba_pc; 286 struct acpi_pci_context *ap = md_pc->pc_conf_v; 287 288 pba->pba_flags &= ~ap->ap_pciflags_clear; 289 } 290
Indexes created Thu Sep 25 16:09:42 GMT 2025