acpipchb.c revision 1.19
1 /* $NetBSD: acpipchb.c,v 1.19 2020/06/15 18:57:39 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 2018 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jared McNeill <jmcneill (at) invisible.ca>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.19 2020/06/15 18:57:39 ad Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/device.h> 38 #include <sys/intr.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/extent.h> 42 #include <sys/queue.h> 43 #include <sys/mutex.h> 44 #include <sys/kmem.h> 45 #include <sys/cpu.h> 46 47 #include <arm/cpufunc.h> 48 49 #include <dev/pci/pcireg.h> 50 #include <dev/pci/pcivar.h> 51 #include <dev/pci/pciconf.h> 52 53 #include <dev/acpi/acpivar.h> 54 #include <dev/acpi/acpi_pci.h> 55 #include <dev/acpi/acpi_mcfg.h> 56 57 #include <arm/acpi/acpi_pci_machdep.h> 58 59 #define PCIHOST_CACHELINE_SIZE arm_dcache_align 60 61 #define ACPIPCHB_MAX_RANGES 64 /* XXX arbitrary limit */ 62 63 struct acpipchb_bus_range { 64 bus_addr_t min; 65 bus_addr_t max; 66 bus_addr_t offset; 67 }; 68 69 struct acpipchb_bus_space { 70 struct bus_space bs; 71 72 struct acpipchb_bus_range range[ACPIPCHB_MAX_RANGES]; 73 int nrange; 74 75 int (*map)(void *, bus_addr_t, bus_size_t, 76 int, bus_space_handle_t *); 77 78 int flags; 79 }; 80 81 struct acpipchb_softc { 82 device_t sc_dev; 83 84 bus_space_tag_t sc_memt; 85 86 ACPI_HANDLE sc_handle; 87 ACPI_INTEGER sc_bus; 88 89 struct acpipchb_bus_space sc_pcimem_bst; 90 struct acpipchb_bus_space sc_pciio_bst; 91 }; 92 93 static int acpipchb_match(device_t, cfdata_t, void *); 94 static void acpipchb_attach(device_t, device_t, void *); 95 96 static void acpipchb_setup_ranges(struct acpipchb_softc *, struct pcibus_attach_args *); 97 static void acpipchb_setup_quirks(struct acpipchb_softc *, struct pcibus_attach_args *); 98 99 CFATTACH_DECL_NEW(acpipchb, sizeof(struct acpipchb_softc), 100 acpipchb_match, acpipchb_attach, NULL, NULL); 101 102 static const char * const compatible[] = { 103 "PNP0A08", 104 NULL 105 }; 106 107 static int 108 acpipchb_match(device_t parent, cfdata_t cf, void *aux) 109 { 110 struct acpi_attach_args *aa = aux; 111 112 if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE) 113 return 0; 114 115 return acpi_match_hid(aa->aa_node->ad_devinfo, compatible); 116 } 117 118 static void 119 acpipchb_attach(device_t parent, device_t self, void *aux) 120 { 121 struct acpipchb_softc * const sc = device_private(self); 122 struct acpi_attach_args *aa = aux; 123 struct pcibus_attach_args pba; 124 ACPI_INTEGER seg; 125 uint16_t bus_start; 126 127 sc->sc_dev = self; 128 sc->sc_memt = aa->aa_memt; 129 sc->sc_handle = aa->aa_node->ad_handle; 130 131 /* 132 * First try to derive the base bus number from _CRS. If that fails, 133 * try _BBN. If that fails too, assume bus 0. 134 */ 135 if (ACPI_SUCCESS(acpi_pcidev_pciroot_bus(sc->sc_handle, &bus_start))) { 136 sc->sc_bus = bus_start; 137 } else { 138 if (ACPI_FAILURE(acpi_eval_integer(sc->sc_handle, "_BBN", &sc->sc_bus))) 139 sc->sc_bus = 0; 140 } 141 142 if (ACPI_FAILURE(acpi_eval_integer(sc->sc_handle, "_SEG", &seg))) 143 seg = 0; 144 145 aprint_naive("\n"); 146 aprint_normal(": PCI Express Host Bridge\n"); 147 148 if (acpi_pci_ignore_boot_config(sc->sc_handle)) { 149 if (acpimcfg_configure_bus(self, aa->aa_pc, sc->sc_handle, sc->sc_bus, PCIHOST_CACHELINE_SIZE) != 0) 150 aprint_error_dev(self, "failed to configure bus\n"); 151 } 152 153 memset(&pba, 0, sizeof(pba)); 154 pba.pba_flags = aa->aa_pciflags & ~(PCI_FLAGS_MEM_OKAY | PCI_FLAGS_IO_OKAY); 155 pba.pba_memt = 0; 156 pba.pba_iot = 0; 157 pba.pba_dmat = aa->aa_dmat; 158 #ifdef _PCI_HAVE_DMA64 159 pba.pba_dmat64 = aa->aa_dmat64; 160 #endif 161 pba.pba_pc = aa->aa_pc; 162 pba.pba_bus = sc->sc_bus; 163 164 acpipchb_setup_ranges(sc, &pba); 165 acpipchb_setup_quirks(sc, &pba); 166 167 config_found_ia(self, "pcibus", &pba, pcibusprint); 168 } 169 170 struct acpipchb_setup_ranges_args { 171 struct acpipchb_softc *sc; 172 struct pcibus_attach_args *pba; 173 }; 174 175 static int 176 acpipchb_bus_space_map(void *t, bus_addr_t bpa, bus_size_t size, int flag, 177 bus_space_handle_t *bshp) 178 { 179 struct acpipchb_bus_space * const abs = t; 180 int i; 181 182 if (size == 0) 183 return ERANGE; 184 185 if ((abs->flags & PCI_FLAGS_IO_OKAY) != 0) { 186 /* Force strongly ordered mapping for all I/O space */ 187 flag = _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED; 188 } 189 190 for (i = 0; i < abs->nrange; i++) { 191 struct acpipchb_bus_range * const range = &abs->range[i]; 192 if (bpa >= range->min && bpa + size - 1 <= range->max) 193 return abs->map(t, bpa + range->offset, size, flag, bshp); 194 } 195 196 return ERANGE; 197 } 198 199 static ACPI_STATUS 200 acpipchb_setup_ranges_cb(ACPI_RESOURCE *res, void *ctx) 201 { 202 struct acpipchb_setup_ranges_args * const args = ctx; 203 struct acpipchb_softc * const sc = args->sc; 204 struct pcibus_attach_args *pba = args->pba; 205 struct acpipchb_bus_space *abs; 206 struct acpipchb_bus_range *range; 207 const char *range_type; 208 u_int pci_flags; 209 210 if (res->Type != ACPI_RESOURCE_TYPE_ADDRESS32 && 211 res->Type != ACPI_RESOURCE_TYPE_ADDRESS64) 212 return AE_OK; 213 214 switch (res->Data.Address.ResourceType) { 215 case ACPI_IO_RANGE: 216 abs = &sc->sc_pciio_bst; 217 range_type = "I/O"; 218 pci_flags = PCI_FLAGS_IO_OKAY; 219 break; 220 case ACPI_MEMORY_RANGE: 221 abs = &sc->sc_pcimem_bst; 222 range_type = "MEM"; 223 pci_flags = PCI_FLAGS_MEM_OKAY; 224 break; 225 default: 226 return AE_OK; 227 } 228 229 if (abs->nrange == ACPIPCHB_MAX_RANGES) { 230 aprint_error_dev(sc->sc_dev, 231 "maximum number of ranges reached, increase ACPIPCHB_MAX_RANGES\n"); 232 return AE_LIMIT; 233 } 234 235 range = &abs->range[abs->nrange]; 236 switch (res->Type) { 237 case ACPI_RESOURCE_TYPE_ADDRESS32: 238 range->min = res->Data.Address32.Address.Minimum; 239 range->max = res->Data.Address32.Address.Maximum; 240 range->offset = res->Data.Address32.Address.TranslationOffset; 241 break; 242 case ACPI_RESOURCE_TYPE_ADDRESS64: 243 range->min = res->Data.Address64.Address.Minimum; 244 range->max = res->Data.Address64.Address.Maximum; 245 range->offset = res->Data.Address64.Address.TranslationOffset; 246 break; 247 default: 248 return AE_OK; 249 } 250 abs->nrange++; 251 252 aprint_debug_dev(sc->sc_dev, "PCI %s [%#lx-%#lx] -> %#lx\n", range_type, range->min, range->max, range->offset); 253 254 if ((pba->pba_flags & pci_flags) == 0) { 255 abs->bs = *sc->sc_memt; 256 abs->bs.bs_cookie = abs; 257 abs->map = abs->bs.bs_map; 258 abs->flags = pci_flags; 259 abs->bs.bs_map = acpipchb_bus_space_map; 260 if ((pci_flags & PCI_FLAGS_IO_OKAY) != 0) 261 pba->pba_iot = &abs->bs; 262 else if ((pci_flags & PCI_FLAGS_MEM_OKAY) != 0) 263 pba->pba_memt = &abs->bs; 264 pba->pba_flags |= pci_flags; 265 } 266 267 return AE_OK; 268 } 269 270 static void 271 acpipchb_setup_ranges(struct acpipchb_softc *sc, struct pcibus_attach_args *pba) 272 { 273 struct acpipchb_setup_ranges_args args; 274 275 args.sc = sc; 276 args.pba = pba; 277 278 AcpiWalkResources(sc->sc_handle, "_CRS", acpipchb_setup_ranges_cb, &args); 279 } 280 281 static void 282 acpipchb_setup_quirks(struct acpipchb_softc *sc, struct pcibus_attach_args *pba) 283 { 284 struct arm32_pci_chipset *md_pc = (struct arm32_pci_chipset *)pba->pba_pc; 285 struct acpi_pci_context *ap = md_pc->pc_conf_v; 286 287 pba->pba_flags &= ~ap->ap_pciflags_clear; 288 } 289
Indexes created Sun Sep 21 19:09:51 GMT 2025