cpu_acpi.c revision 1.4 1 1.4 jmcneill /* $NetBSD: cpu_acpi.c,v 1.4 2018/10/19 11:11:03 jmcneill Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * This code is derived from software contributed to The NetBSD Foundation
8 1.1 jmcneill * by Jared McNeill <jmcneill (at) invisible.ca>.
9 1.1 jmcneill *
10 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
11 1.1 jmcneill * modification, are permitted provided that the following conditions
12 1.1 jmcneill * are met:
13 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
14 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
15 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
17 1.1 jmcneill * documentation and/or other materials provided with the distribution.
18 1.1 jmcneill *
19 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE.
30 1.1 jmcneill */
31 1.1 jmcneill
32 1.1 jmcneill #include <sys/cdefs.h>
33 1.4 jmcneill __KERNEL_RCSID(0, "$NetBSD: cpu_acpi.c,v 1.4 2018/10/19 11:11:03 jmcneill Exp $");
34 1.1 jmcneill
35 1.1 jmcneill #include <sys/param.h>
36 1.1 jmcneill #include <sys/bus.h>
37 1.1 jmcneill #include <sys/cpu.h>
38 1.1 jmcneill #include <sys/device.h>
39 1.1 jmcneill
40 1.1 jmcneill #include <dev/acpi/acpireg.h>
41 1.1 jmcneill #include <dev/acpi/acpivar.h>
42 1.1 jmcneill
43 1.1 jmcneill #include <arm/armreg.h>
44 1.1 jmcneill #include <arm/cpu.h>
45 1.1 jmcneill #include <arm/cpufunc.h>
46 1.1 jmcneill #include <arm/locore.h>
47 1.1 jmcneill
48 1.1 jmcneill #include <arm/arm/psci.h>
49 1.1 jmcneill
50 1.4 jmcneill extern struct cpu_info cpu_info_store[];
51 1.4 jmcneill
52 1.1 jmcneill static int cpu_acpi_match(device_t, cfdata_t, void *);
53 1.1 jmcneill static void cpu_acpi_attach(device_t, device_t, void *);
54 1.1 jmcneill
55 1.1 jmcneill CFATTACH_DECL_NEW(cpu_acpi, 0, cpu_acpi_match, cpu_acpi_attach, NULL, NULL);
56 1.1 jmcneill
57 1.1 jmcneill static register_t
58 1.1 jmcneill cpu_acpi_mpstart_pa(void)
59 1.1 jmcneill {
60 1.3 skrll
61 1.3 skrll return (register_t)KERN_VTOPHYS((vaddr_t)cpu_mpstart);
62 1.1 jmcneill }
63 1.1 jmcneill
64 1.1 jmcneill static int
65 1.1 jmcneill cpu_acpi_match(device_t parent, cfdata_t cf, void *aux)
66 1.1 jmcneill {
67 1.1 jmcneill ACPI_SUBTABLE_HEADER *hdrp = aux;
68 1.2 jmcneill ACPI_MADT_GENERIC_INTERRUPT *gicc;
69 1.1 jmcneill
70 1.2 jmcneill if (hdrp->Type != ACPI_MADT_TYPE_GENERIC_INTERRUPT)
71 1.2 jmcneill return 0;
72 1.2 jmcneill
73 1.2 jmcneill gicc = (ACPI_MADT_GENERIC_INTERRUPT *)hdrp;
74 1.2 jmcneill
75 1.2 jmcneill return (gicc->Flags & ACPI_MADT_ENABLED) != 0;
76 1.1 jmcneill }
77 1.1 jmcneill
78 1.1 jmcneill static void
79 1.1 jmcneill cpu_acpi_attach(device_t parent, device_t self, void *aux)
80 1.1 jmcneill {
81 1.1 jmcneill ACPI_MADT_GENERIC_INTERRUPT *gicc = aux;
82 1.1 jmcneill const uint64_t mpidr = gicc->ArmMpidr;
83 1.4 jmcneill const int unit = device_unit(self);
84 1.4 jmcneill struct cpu_info *ci = &cpu_info_store[unit];
85 1.1 jmcneill int error;
86 1.1 jmcneill
87 1.1 jmcneill if (cpu_mpidr_aff_read() != mpidr) {
88 1.1 jmcneill const u_int cpuindex = device_unit(self);
89 1.1 jmcneill
90 1.1 jmcneill cpu_mpidr[cpuindex] = mpidr;
91 1.1 jmcneill cpu_dcache_wb_range((vaddr_t)&cpu_mpidr[cpuindex], sizeof(cpu_mpidr[cpuindex]));
92 1.1 jmcneill
93 1.1 jmcneill /* XXX support spin table */
94 1.1 jmcneill error = psci_cpu_on(mpidr, cpu_acpi_mpstart_pa(), 0);
95 1.1 jmcneill if (error != PSCI_SUCCESS) {
96 1.1 jmcneill aprint_error_dev(self, "failed to start CPU\n");
97 1.1 jmcneill return;
98 1.1 jmcneill }
99 1.1 jmcneill
100 1.1 jmcneill __asm __volatile("sev" ::: "memory");
101 1.1 jmcneill
102 1.1 jmcneill for (u_int i = 0x10000000; i > 0; i--) {
103 1.1 jmcneill membar_consumer();
104 1.1 jmcneill if (arm_cpu_hatched & __BIT(cpuindex))
105 1.1 jmcneill break;
106 1.1 jmcneill }
107 1.1 jmcneill }
108 1.1 jmcneill
109 1.4 jmcneill /* Store the ACPI Processor UID in cpu_info */
110 1.4 jmcneill ci->ci_acpiid = gicc->Uid;
111 1.4 jmcneill
112 1.1 jmcneill /* Attach the CPU */
113 1.1 jmcneill cpu_attach(self, mpidr);
114 1.1 jmcneill }
115