cpu_acpi.c revision 1.12 1 /* $NetBSD: cpu_acpi.c,v 1.12 2021/11/24 10:01:24 jmcneill Exp $ */
2
3 /*-
4 * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jared McNeill <jmcneill (at) invisible.ca>.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include "tprof.h"
33 #include "opt_multiprocessor.h"
34
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: cpu_acpi.c,v 1.12 2021/11/24 10:01:24 jmcneill Exp $");
37
38 #include <sys/param.h>
39 #include <sys/bus.h>
40 #include <sys/cpu.h>
41 #include <sys/device.h>
42 #include <sys/interrupt.h>
43 #include <sys/kcpuset.h>
44 #include <sys/reboot.h>
45
46 #include <dev/acpi/acpireg.h>
47 #include <dev/acpi/acpivar.h>
48
49 #include <arm/armreg.h>
50 #include <arm/cpu.h>
51 #include <arm/cpufunc.h>
52 #include <arm/cpuvar.h>
53 #include <arm/locore.h>
54
55 #include <arm/arm/psci.h>
56
57 #if NTPROF > 0
58 #include <dev/tprof/tprof_armv8.h>
59 #endif
60
61 static int cpu_acpi_match(device_t, cfdata_t, void *);
62 static void cpu_acpi_attach(device_t, device_t, void *);
63
64 #if NTPROF > 0
65 static void cpu_acpi_tprof_init(device_t);
66 #endif
67
68 CFATTACH_DECL_NEW(cpu_acpi, 0, cpu_acpi_match, cpu_acpi_attach, NULL, NULL);
69
70 #ifdef MULTIPROCESSOR
71 static register_t
72 cpu_acpi_mpstart_pa(void)
73 {
74
75 return (register_t)KERN_VTOPHYS((vaddr_t)cpu_mpstart);
76 }
77 #endif /* MULTIPROCESSOR */
78
79 static int
80 cpu_acpi_match(device_t parent, cfdata_t cf, void *aux)
81 {
82 ACPI_SUBTABLE_HEADER *hdrp = aux;
83 ACPI_MADT_GENERIC_INTERRUPT *gicc;
84
85 if (hdrp->Type != ACPI_MADT_TYPE_GENERIC_INTERRUPT)
86 return 0;
87
88 gicc = (ACPI_MADT_GENERIC_INTERRUPT *)hdrp;
89
90 return (gicc->Flags & ACPI_MADT_ENABLED) != 0;
91 }
92
93 static void
94 cpu_acpi_attach(device_t parent, device_t self, void *aux)
95 {
96 prop_dictionary_t dict = device_properties(self);
97 ACPI_MADT_GENERIC_INTERRUPT *gicc = aux;
98 const uint64_t mpidr = gicc->ArmMpidr;
99 const int unit = device_unit(self);
100 struct cpu_info *ci = &cpu_info_store[unit];
101
102 #ifdef MULTIPROCESSOR
103 if (cpu_mpidr_aff_read() != mpidr && (boothowto & RB_MD1) == 0) {
104 const u_int cpuindex = device_unit(self);
105 int error;
106
107 cpu_mpidr[cpuindex] = mpidr;
108 cpu_dcache_wb_range((vaddr_t)&cpu_mpidr[cpuindex],
109 sizeof(cpu_mpidr[cpuindex]));
110
111 /* XXX support spin table */
112 error = psci_cpu_on(mpidr, cpu_acpi_mpstart_pa(), 0);
113 if (error != PSCI_SUCCESS) {
114 aprint_error_dev(self, "failed to start CPU\n");
115 return;
116 }
117
118 sev();
119
120 for (u_int i = 0x10000000; i > 0; i--) {
121 if (cpu_hatched_p(cpuindex))
122 break;
123 }
124 }
125 #endif /* MULTIPROCESSOR */
126
127 /* Assume that less efficient processors are faster. */
128 prop_dictionary_set_uint32(dict, "capacity_dmips_mhz",
129 gicc->EfficiencyClass);
130
131 /* Store the ACPI Processor UID in cpu_info */
132 ci->ci_acpiid = gicc->Uid;
133
134 /* Attach the CPU */
135 cpu_attach(self, mpidr);
136
137 #if NTPROF > 0
138 if (cpu_mpidr_aff_read() == mpidr)
139 config_interrupts(self, cpu_acpi_tprof_init);
140 #endif
141 }
142
143 #if NTPROF > 0
144 static struct cpu_info *
145 cpu_acpi_find_processor(UINT32 uid)
146 {
147 CPU_INFO_ITERATOR cii;
148 struct cpu_info *ci;
149
150 for (CPU_INFO_FOREACH(cii, ci)) {
151 if (ci->ci_acpiid == uid)
152 return ci;
153 }
154
155 return NULL;
156 }
157
158 static ACPI_STATUS
159 cpu_acpi_tprof_intr_establish(ACPI_SUBTABLE_HEADER *hdrp, void *aux)
160 {
161 device_t dev = aux;
162 ACPI_MADT_GENERIC_INTERRUPT *gicc;
163 struct cpu_info *ci;
164 char xname[16];
165 kcpuset_t *set;
166 int error;
167 void *ih;
168
169 if (hdrp->Type != ACPI_MADT_TYPE_GENERIC_INTERRUPT)
170 return AE_OK;
171
172 gicc = (ACPI_MADT_GENERIC_INTERRUPT *)hdrp;
173 if ((gicc->Flags & ACPI_MADT_ENABLED) == 0)
174 return AE_OK;
175
176 const bool cpu_primary_p = cpu_info_store[0].ci_cpuid == gicc->ArmMpidr;
177 const bool intr_ppi_p = gicc->PerformanceInterrupt < 32;
178 const int type = (gicc->Flags & ACPI_MADT_PERFORMANCE_IRQ_MODE) ?
179 IST_EDGE : IST_LEVEL;
180
181 if (intr_ppi_p && !cpu_primary_p)
182 return AE_OK;
183
184 ci = cpu_acpi_find_processor(gicc->Uid);
185 if (ci == NULL) {
186 aprint_error_dev(dev, "couldn't find processor %#x\n",
187 gicc->Uid);
188 return AE_OK;
189 }
190
191 if (intr_ppi_p) {
192 strlcpy(xname, "pmu", sizeof(xname));
193 } else {
194 snprintf(xname, sizeof(xname), "pmu %s", cpu_name(ci));
195 }
196
197 ih = intr_establish_xname(gicc->PerformanceInterrupt, IPL_HIGH,
198 type | IST_MPSAFE, armv8_pmu_intr, NULL, xname);
199 if (ih == NULL) {
200 aprint_error_dev(dev, "couldn't establish %s interrupt\n",
201 xname);
202 return AE_OK;
203 }
204
205 if (!intr_ppi_p) {
206 kcpuset_create(&set, true);
207 kcpuset_set(set, cpu_index(ci));
208 error = interrupt_distribute(ih, set, NULL);
209 kcpuset_destroy(set);
210
211 if (error) {
212 aprint_error_dev(dev,
213 "failed to distribute %s interrupt: %d\n",
214 xname, error);
215 return AE_OK;
216 }
217 }
218
219 aprint_normal("%s: PMU interrupting on irq %d\n", cpu_name(ci),
220 gicc->PerformanceInterrupt);
221
222 return AE_OK;
223 }
224
225 static void
226 cpu_acpi_tprof_init(device_t self)
227 {
228 armv8_pmu_init();
229
230 if (acpi_madt_map() != AE_OK) {
231 aprint_error_dev(self,
232 "failed to map MADT, performance counters not available\n");
233 return;
234 }
235 acpi_madt_walk(cpu_acpi_tprof_intr_establish, self);
236 acpi_madt_unmap();
237 }
238 #endif
239