cpu_acpi.c revision 1.16
1 /* $NetBSD: cpu_acpi.c,v 1.16 2024/06/30 17:58:08 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2018 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jared McNeill <jmcneill (at) invisible.ca>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "tprof.h" 33 #include "opt_multiprocessor.h" 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: cpu_acpi.c,v 1.16 2024/06/30 17:58:08 jmcneill Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/bus.h> 40 #include <sys/cpu.h> 41 #include <sys/device.h> 42 #include <sys/interrupt.h> 43 #include <sys/kcpuset.h> 44 #include <sys/reboot.h> 45 46 #include <dev/acpi/acpireg.h> 47 #include <dev/acpi/acpivar.h> 48 #include <dev/acpi/acpi_srat.h> 49 50 #include <arm/armreg.h> 51 #include <arm/cpu.h> 52 #include <arm/cpufunc.h> 53 #include <arm/cpuvar.h> 54 #include <arm/locore.h> 55 56 #include <arm/arm/psci.h> 57 58 #if NTPROF > 0 59 #include <dev/tprof/tprof_armv8.h> 60 #endif 61 62 static int cpu_acpi_match(device_t, cfdata_t, void *); 63 static void cpu_acpi_attach(device_t, device_t, void *); 64 65 #if NTPROF > 0 66 static void cpu_acpi_tprof_init(device_t); 67 #endif 68 69 CFATTACH_DECL2_NEW(cpu_acpi, 0, 70 cpu_acpi_match, cpu_acpi_attach, NULL, NULL, 71 cpu_rescan, cpu_childdetached); 72 73 #ifdef MULTIPROCESSOR 74 static register_t 75 cpu_acpi_mpstart_pa(void) 76 { 77 78 return (register_t)KERN_VTOPHYS((vaddr_t)cpu_mpstart); 79 } 80 #endif /* MULTIPROCESSOR */ 81 82 static int 83 cpu_acpi_match(device_t parent, cfdata_t cf, void *aux) 84 { 85 ACPI_SUBTABLE_HEADER *hdrp = aux; 86 ACPI_MADT_GENERIC_INTERRUPT *gicc; 87 88 if (hdrp->Type != ACPI_MADT_TYPE_GENERIC_INTERRUPT) 89 return 0; 90 91 gicc = (ACPI_MADT_GENERIC_INTERRUPT *)hdrp; 92 93 return (gicc->Flags & ACPI_MADT_ENABLED) != 0; 94 } 95 96 static void 97 cpu_acpi_attach(device_t parent, device_t self, void *aux) 98 { 99 prop_dictionary_t dict = device_properties(self); 100 ACPI_MADT_GENERIC_INTERRUPT *gicc = aux; 101 const uint64_t mpidr = gicc->ArmMpidr; 102 const int unit = device_unit(self); 103 struct cpu_info *ci = &cpu_info_store[unit]; 104 struct acpisrat_node *node; 105 106 #ifdef MULTIPROCESSOR 107 if (cpu_mpidr_aff_read() != mpidr && (boothowto & RB_MD1) == 0) { 108 const u_int cpuindex = device_unit(self); 109 int error; 110 111 cpu_mpidr[cpuindex] = mpidr; 112 cpu_dcache_wb_range((vaddr_t)&cpu_mpidr[cpuindex], 113 sizeof(cpu_mpidr[cpuindex])); 114 115 /* XXX support spin table */ 116 error = psci_cpu_on(mpidr, cpu_acpi_mpstart_pa(), 0); 117 if (error != PSCI_SUCCESS) { 118 aprint_error_dev(self, "failed to start CPU\n"); 119 return; 120 } 121 122 sev(); 123 124 for (u_int i = 0x10000000; i > 0; i--) { 125 if (cpu_hatched_p(cpuindex)) 126 break; 127 } 128 } 129 #endif /* MULTIPROCESSOR */ 130 131 /* Assume that less efficient processors are faster. */ 132 prop_dictionary_set_uint32(dict, "capacity_dmips_mhz", 133 gicc->EfficiencyClass); 134 135 /* Store the ACPI Processor UID in cpu_info */ 136 ci->ci_acpiid = gicc->Uid; 137 138 /* Scan SRAT for NUMA info. */ 139 if (cpu_mpidr_aff_read() == mpidr) { 140 acpisrat_init(); 141 } 142 node = acpisrat_get_node(gicc->Uid); 143 if (node != NULL) { 144 ci->ci_numa_id = node->nodeid; 145 } 146 147 /* Attach the CPU */ 148 cpu_attach(self, mpidr); 149 150 #if NTPROF > 0 151 if (cpu_mpidr_aff_read() == mpidr && armv8_pmu_detect()) 152 config_interrupts(self, cpu_acpi_tprof_init); 153 #endif 154 } 155 156 #if NTPROF > 0 157 static struct cpu_info * 158 cpu_acpi_find_processor(UINT32 uid) 159 { 160 CPU_INFO_ITERATOR cii; 161 struct cpu_info *ci; 162 163 for (CPU_INFO_FOREACH(cii, ci)) { 164 if (ci->ci_acpiid == uid) 165 return ci; 166 } 167 168 return NULL; 169 } 170 171 static ACPI_STATUS 172 cpu_acpi_tprof_intr_establish(ACPI_SUBTABLE_HEADER *hdrp, void *aux) 173 { 174 device_t dev = aux; 175 ACPI_MADT_GENERIC_INTERRUPT *gicc; 176 struct cpu_info *ci; 177 char xname[16]; 178 kcpuset_t *set; 179 int error; 180 void *ih; 181 182 if (hdrp->Type != ACPI_MADT_TYPE_GENERIC_INTERRUPT) 183 return AE_OK; 184 185 gicc = (ACPI_MADT_GENERIC_INTERRUPT *)hdrp; 186 if ((gicc->Flags & ACPI_MADT_ENABLED) == 0) 187 return AE_OK; 188 189 const bool cpu_primary_p = cpu_info_store[0].ci_cpuid == gicc->ArmMpidr; 190 const bool intr_ppi_p = gicc->PerformanceInterrupt < 32; 191 const int type = (gicc->Flags & ACPI_MADT_PERFORMANCE_IRQ_MODE) ? 192 IST_EDGE : IST_LEVEL; 193 194 if (intr_ppi_p && !cpu_primary_p) 195 return AE_OK; 196 197 ci = cpu_acpi_find_processor(gicc->Uid); 198 if (ci == NULL) { 199 aprint_error_dev(dev, "couldn't find processor %#x\n", 200 gicc->Uid); 201 return AE_OK; 202 } 203 204 if (intr_ppi_p) { 205 strlcpy(xname, "pmu", sizeof(xname)); 206 } else { 207 snprintf(xname, sizeof(xname), "pmu %s", cpu_name(ci)); 208 } 209 210 ih = intr_establish_xname(gicc->PerformanceInterrupt, IPL_HIGH, 211 type | IST_MPSAFE, armv8_pmu_intr, NULL, xname); 212 if (ih == NULL) { 213 aprint_error_dev(dev, "couldn't establish %s interrupt\n", 214 xname); 215 return AE_OK; 216 } 217 218 if (!intr_ppi_p) { 219 kcpuset_create(&set, true); 220 kcpuset_set(set, cpu_index(ci)); 221 error = interrupt_distribute(ih, set, NULL); 222 kcpuset_destroy(set); 223 224 if (error) { 225 aprint_error_dev(dev, 226 "failed to distribute %s interrupt: %d\n", 227 xname, error); 228 return AE_OK; 229 } 230 } 231 232 aprint_normal("%s: PMU interrupting on irq %d\n", cpu_name(ci), 233 gicc->PerformanceInterrupt); 234 235 return AE_OK; 236 } 237 238 static void 239 cpu_acpi_tprof_init(device_t self) 240 { 241 int err = armv8_pmu_init(); 242 if (err) { 243 aprint_error_dev(self, 244 "failed to initialize PMU event counter\n"); 245 return; 246 } 247 248 if (acpi_madt_map() != AE_OK) { 249 aprint_error_dev(self, 250 "failed to map MADT, performance counters not available\n"); 251 return; 252 } 253 acpi_madt_walk(cpu_acpi_tprof_intr_establish, self); 254 acpi_madt_unmap(); 255 } 256 #endif 257
Indexes created Mon Sep 22 13:09:51 GMT 2025