cpu_acpi.c revision 1.8.6.1 1 /* $NetBSD: cpu_acpi.c,v 1.8.6.1 2020/12/14 14:37:47 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jared McNeill <jmcneill (at) invisible.ca>.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include "tprof.h"
33 #include "opt_multiprocessor.h"
34
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: cpu_acpi.c,v 1.8.6.1 2020/12/14 14:37:47 thorpej Exp $");
37
38 #include <sys/param.h>
39 #include <sys/bus.h>
40 #include <sys/cpu.h>
41 #include <sys/device.h>
42 #include <sys/interrupt.h>
43 #include <sys/kcpuset.h>
44 #include <sys/reboot.h>
45
46 #include <dev/acpi/acpireg.h>
47 #include <dev/acpi/acpivar.h>
48
49 #include <arm/armreg.h>
50 #include <arm/cpu.h>
51 #include <arm/cpufunc.h>
52 #include <arm/cpuvar.h>
53 #include <arm/locore.h>
54
55 #include <arm/arm/psci.h>
56
57 #if NTPROF > 0
58 #include <dev/tprof/tprof_armv8.h>
59 #endif
60
61 static int cpu_acpi_match(device_t, cfdata_t, void *);
62 static void cpu_acpi_attach(device_t, device_t, void *);
63
64 #if NTPROF > 0
65 static void cpu_acpi_tprof_init(device_t);
66 #endif
67
68 CFATTACH_DECL_NEW(cpu_acpi, 0, cpu_acpi_match, cpu_acpi_attach, NULL, NULL);
69
70 #ifdef MULTIPROCESSOR
71 static register_t
72 cpu_acpi_mpstart_pa(void)
73 {
74
75 return (register_t)KERN_VTOPHYS((vaddr_t)cpu_mpstart);
76 }
77 #endif /* MULTIPROCESSOR */
78
79 static int
80 cpu_acpi_match(device_t parent, cfdata_t cf, void *aux)
81 {
82 ACPI_SUBTABLE_HEADER *hdrp = aux;
83 ACPI_MADT_GENERIC_INTERRUPT *gicc;
84
85 if (hdrp->Type != ACPI_MADT_TYPE_GENERIC_INTERRUPT)
86 return 0;
87
88 gicc = (ACPI_MADT_GENERIC_INTERRUPT *)hdrp;
89
90 return (gicc->Flags & ACPI_MADT_ENABLED) != 0;
91 }
92
93 static void
94 cpu_acpi_attach(device_t parent, device_t self, void *aux)
95 {
96 ACPI_MADT_GENERIC_INTERRUPT *gicc = aux;
97 const uint64_t mpidr = gicc->ArmMpidr;
98 const int unit = device_unit(self);
99 struct cpu_info *ci = &cpu_info_store[unit];
100
101 #ifdef MULTIPROCESSOR
102 if (cpu_mpidr_aff_read() != mpidr && (boothowto & RB_MD1) == 0) {
103 const u_int cpuindex = device_unit(self);
104 int error;
105
106 cpu_mpidr[cpuindex] = mpidr;
107 cpu_dcache_wb_range((vaddr_t)&cpu_mpidr[cpuindex], sizeof(cpu_mpidr[cpuindex]));
108
109 /* XXX support spin table */
110 error = psci_cpu_on(mpidr, cpu_acpi_mpstart_pa(), 0);
111 if (error != PSCI_SUCCESS) {
112 aprint_error_dev(self, "failed to start CPU\n");
113 return;
114 }
115
116 sev();
117
118 for (u_int i = 0x10000000; i > 0; i--) {
119 if (cpu_hatched_p(cpuindex))
120 break;
121 }
122 }
123 #endif /* MULTIPROCESSOR */
124
125 /* Store the ACPI Processor UID in cpu_info */
126 ci->ci_acpiid = gicc->Uid;
127
128 /* Attach the CPU */
129 cpu_attach(self, mpidr);
130
131 #if NTPROF > 0
132 if (cpu_mpidr_aff_read() == mpidr)
133 config_interrupts(self, cpu_acpi_tprof_init);
134 #endif
135 }
136
137 #if NTPROF > 0
138 static struct cpu_info *
139 cpu_acpi_find_processor(UINT32 uid)
140 {
141 CPU_INFO_ITERATOR cii;
142 struct cpu_info *ci;
143
144 for (CPU_INFO_FOREACH(cii, ci)) {
145 if (ci->ci_acpiid == uid)
146 return ci;
147 }
148
149 return NULL;
150 }
151
152 static ACPI_STATUS
153 cpu_acpi_tprof_intr_establish(ACPI_SUBTABLE_HEADER *hdrp, void *aux)
154 {
155 device_t dev = aux;
156 ACPI_MADT_GENERIC_INTERRUPT *gicc;
157 struct cpu_info *ci;
158 char xname[16];
159 kcpuset_t *set;
160 int error;
161 void *ih;
162
163 if (hdrp->Type != ACPI_MADT_TYPE_GENERIC_INTERRUPT)
164 return AE_OK;
165
166 gicc = (ACPI_MADT_GENERIC_INTERRUPT *)hdrp;
167 if ((gicc->Flags & ACPI_MADT_ENABLED) == 0)
168 return AE_OK;
169
170 const bool cpu_primary_p = cpu_mpidr_aff_read() == gicc->ArmMpidr;
171 const bool intr_ppi_p = gicc->PerformanceInterrupt < 32;
172 const int type = (gicc->Flags & ACPI_MADT_PERFORMANCE_IRQ_MODE) ? IST_EDGE : IST_LEVEL;
173
174 if (intr_ppi_p && !cpu_primary_p)
175 return AE_OK;
176
177 ci = cpu_acpi_find_processor(gicc->Uid);
178 if (ci == NULL) {
179 aprint_error_dev(dev, "couldn't find processor %#x\n", gicc->Uid);
180 return AE_OK;
181 }
182
183 if (intr_ppi_p) {
184 strlcpy(xname, "pmu", sizeof(xname));
185 } else {
186 snprintf(xname, sizeof(xname), "pmu %s", cpu_name(ci));
187 }
188
189 ih = intr_establish_xname(gicc->PerformanceInterrupt, IPL_HIGH, type | IST_MPSAFE,
190 armv8_pmu_intr, NULL, xname);
191 if (ih == NULL) {
192 aprint_error_dev(dev, "couldn't establish %s interrupt\n", xname);
193 return AE_OK;
194 }
195
196 if (!intr_ppi_p) {
197 kcpuset_create(&set, true);
198 kcpuset_set(set, cpu_index(ci));
199 error = interrupt_distribute(ih, set, NULL);
200 kcpuset_destroy(set);
201
202 if (error) {
203 aprint_error_dev(dev, "failed to distribute %s interrupt: %d\n",
204 xname, error);
205 return AE_OK;
206 }
207 }
208
209 aprint_normal("%s: PMU interrupting on irq %d\n", cpu_name(ci), gicc->PerformanceInterrupt);
210
211 return AE_OK;
212 }
213
214 static void
215 cpu_acpi_tprof_init(device_t self)
216 {
217 armv8_pmu_init();
218
219 if (acpi_madt_map() != AE_OK) {
220 aprint_error_dev(self, "failed to map MADT, performance counters not available\n");
221 return;
222 }
223 acpi_madt_walk(cpu_acpi_tprof_intr_establish, self);
224 acpi_madt_unmap();
225 }
226 #endif
227