1 /* $NetBSD: gxlphy.c,v 1.5 2021/06/29 21:03:36 pgoyette Exp $ */ 2 3 /* 4 * Copyright (c) 2019 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* 30 * Amlogic Meson GXL 10/100 internal PHY 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: gxlphy.c,v 1.5 2021/06/29 21:03:36 pgoyette Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/device.h> 40 #include <sys/socket.h> 41 #include <sys/errno.h> 42 43 #include <net/if.h> 44 #include <net/if_media.h> 45 46 #include <dev/mii/mii.h> 47 #include <dev/mii/miivar.h> 48 #include <dev/mii/miidevs.h> 49 50 #define TSTCNTL 20 51 #define TSTCNTL_READ __BIT(15) 52 #define TSTCNTL_WRITE __BIT(14) 53 #define TSTCNTL_REG_BANK_SEL __BITS(12,11) 54 #define TSTCNTL_TEST_MODE __BIT(10) 55 #define TSTCNTL_READ_ADDR __BITS(9,5) 56 #define TSTCNTL_WRITE_ADDR __BITS(4,0) 57 #define TSTREAD1 21 58 #define TSTWRITE 23 59 60 #define BANK_WOL 1 61 #define BANK_BIST 3 62 63 #define LPI_STATUS 0x0c 64 #define LPI_STATUS_RSV12 __BIT(12) 65 66 #define BIST_PLL_CTRL 0x1b 67 #define BIST_PLL_DIV0 0x1c 68 #define BIST_PLL_DIV1 0x1d 69 70 static int gxlphymatch(device_t, cfdata_t, void *); 71 static void gxlphyattach(device_t, device_t, void *); 72 73 CFATTACH_DECL_NEW(gxlphy, sizeof(struct mii_softc), 74 gxlphymatch, gxlphyattach, mii_phy_detach, mii_phy_activate); 75 76 static int gxlphy_service(struct mii_softc *, struct mii_data *, int); 77 static void gxlphy_status(struct mii_softc *); 78 79 static const struct mii_phy_funcs gxlphy_funcs = { 80 gxlphy_service, gxlphy_status, mii_phy_reset, 81 }; 82 83 static const struct mii_phydesc gxlphys[] = { 84 MII_PHY_DESC(xxAMLOGIC, GXL), 85 MII_PHY_END, 86 }; 87 88 static void 89 gxl_openbanks(struct mii_softc *sc) 90 { 91 PHY_WRITE(sc, TSTCNTL, 0); 92 PHY_WRITE(sc, TSTCNTL, TSTCNTL_TEST_MODE); 93 PHY_WRITE(sc, TSTCNTL, 0); 94 PHY_WRITE(sc, TSTCNTL, TSTCNTL_TEST_MODE); 95 } 96 97 static void 98 gxl_closebanks(struct mii_softc *sc) 99 { 100 PHY_WRITE(sc, TSTCNTL, 0); 101 } 102 103 static uint16_t 104 gxl_readreg(struct mii_softc *sc, u_int bank, u_int reg) 105 { 106 uint16_t val; 107 108 gxl_openbanks(sc); 109 PHY_WRITE(sc, TSTCNTL, 110 TSTCNTL_READ | TSTCNTL_TEST_MODE | 111 __SHIFTIN(bank, TSTCNTL_REG_BANK_SEL) | 112 __SHIFTIN(reg, TSTCNTL_READ_ADDR)); 113 PHY_READ(sc, TSTREAD1, &val); 114 gxl_closebanks(sc); 115 116 return val; 117 } 118 119 static void 120 gxl_writereg(struct mii_softc *sc, u_int bank, u_int reg, uint16_t val) 121 { 122 gxl_openbanks(sc); 123 PHY_WRITE(sc, TSTWRITE, val); 124 PHY_WRITE(sc, TSTCNTL, 125 TSTCNTL_WRITE | TSTCNTL_TEST_MODE | 126 __SHIFTIN(bank, TSTCNTL_REG_BANK_SEL) | 127 __SHIFTIN(reg, TSTCNTL_WRITE_ADDR)); 128 gxl_closebanks(sc); 129 } 130 131 static int 132 gxlphymatch(device_t parent, cfdata_t match, void *aux) 133 { 134 struct mii_attach_args *ma = aux; 135 136 if (mii_phy_match(ma, gxlphys) != NULL) 137 return 20; 138 139 return 0; 140 } 141 142 static void 143 gxlphyattach(device_t parent, device_t self, void *aux) 144 { 145 struct mii_softc *sc = device_private(self); 146 struct mii_attach_args *ma = aux; 147 struct mii_data *mii = ma->mii_data; 148 int oui = MII_OUI(ma->mii_id1, ma->mii_id2); 149 int model = MII_MODEL(ma->mii_id2); 150 int rev = MII_REV(ma->mii_id2); 151 char descr[MII_MAX_DESCR_LEN]; 152 153 mii_get_descr(descr, sizeof(descr), oui, model); 154 if (descr[0]) 155 aprint_normal(": %s (OUI 0x%06x, model 0x%04x), rev. %d\n", 156 descr, oui, model, rev); 157 else 158 aprint_normal(": OUI 0x%06x, model 0x%04x, rev. %d\n", 159 oui, model, rev); 160 aprint_naive(": Media interface\n"); 161 162 sc->mii_dev = self; 163 sc->mii_inst = mii->mii_instance; 164 sc->mii_phy = ma->mii_phyno; 165 sc->mii_mpd_oui = MII_OUI(ma->mii_id1, ma->mii_id2); 166 sc->mii_mpd_model = MII_MODEL(ma->mii_id2); 167 sc->mii_mpd_rev = MII_REV(ma->mii_id2); 168 sc->mii_funcs = &gxlphy_funcs; 169 sc->mii_pdata = mii; 170 sc->mii_flags = ma->mii_flags; 171 172 mii_lock(mii); 173 174 PHY_RESET(sc); 175 176 gxl_writereg(sc, BANK_BIST, BIST_PLL_CTRL, 0x5); 177 gxl_writereg(sc, BANK_BIST, BIST_PLL_DIV1, 0x029a); 178 gxl_writereg(sc, BANK_BIST, BIST_PLL_DIV0, 0xaaaa); 179 180 PHY_READ(sc, MII_BMSR, &sc->mii_capabilities); 181 sc->mii_capabilities &= ma->mii_capmask; 182 if (sc->mii_capabilities & BMSR_EXTSTAT) 183 PHY_READ(sc, MII_EXTSR, &sc->mii_extcapabilities); 184 185 mii_unlock(mii); 186 187 mii_phy_add_media(sc); 188 } 189 190 static int 191 gxlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 192 { 193 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 194 uint16_t reg; 195 196 KASSERT(mii_locked(mii)); 197 198 switch (cmd) { 199 case MII_POLLSTAT: 200 /* If we're not polling our PHY instance, just return. */ 201 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 202 return 0; 203 break; 204 205 case MII_MEDIACHG: 206 /* 207 * If the media indicates a different PHY instance, 208 * isolate ourselves. 209 */ 210 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 211 PHY_READ(sc, MII_BMCR, ®); 212 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 213 return 0; 214 } 215 216 /* If the interface is not up, don't do anything. */ 217 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 218 break; 219 220 mii_phy_setmedia(sc); 221 break; 222 223 case MII_TICK: 224 /* If we're not currently selected, just return. */ 225 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 226 return 0; 227 228 if (mii_phy_tick(sc) == EJUSTRETURN) 229 return 0; 230 break; 231 232 case MII_DOWN: 233 mii_phy_down(sc); 234 return 0; 235 } 236 237 /* Update the media status. */ 238 mii_phy_status(sc); 239 240 /* Callback if something changed. */ 241 mii_phy_update(sc, cmd); 242 return 0; 243 } 244 245 static void 246 gxlphy_status(struct mii_softc *sc) 247 { 248 uint16_t bmcr, bmsr, wol, lpa, aner; 249 250 KASSERT(mii_locked(sc->mii_pdata)); 251 252 PHY_READ(sc, MII_BMCR, &bmcr); 253 if ((bmcr & BMCR_AUTOEN) == 0) 254 goto done; 255 256 PHY_READ(sc, MII_BMSR, &bmsr); 257 if ((bmsr & BMSR_ACOMP) == 0) 258 goto done; 259 260 wol = gxl_readreg(sc, BANK_WOL, LPI_STATUS); 261 PHY_READ(sc, MII_ANLPAR, &lpa); 262 PHY_READ(sc, MII_ANER, &aner); 263 264 if ((wol & LPI_STATUS_RSV12) == 0 || 265 ((aner & ANER_LPAN) != 0 && (lpa & ANLPAR_ACK) == 0)) { 266 device_printf(sc->mii_dev, "LPA corruption - aneg restart\n"); 267 268 bmcr &= ~BMCR_ISO; 269 bmcr |= BMCR_AUTOEN; 270 bmcr |= BMCR_STARTNEG; 271 PHY_WRITE(sc, MII_BMCR, bmcr); 272 273 return; 274 } 275 276 done: 277 ukphy_status(sc); 278 } 279
Indexes created Sat Sep 20 22:09:52 GMT 2025