gxlphy.c revision 1.2
1 /* $NetBSD: gxlphy.c,v 1.2 2019/11/27 10:19:21 msaitoh Exp $ */ 2 3 /* 4 * Copyright (c) 2019 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* 30 * Amlogic Meson GXL 10/100 internal PHY 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: gxlphy.c,v 1.2 2019/11/27 10:19:21 msaitoh Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/device.h> 40 #include <sys/socket.h> 41 #include <sys/errno.h> 42 43 #include <net/if.h> 44 #include <net/if_media.h> 45 46 #include <dev/mii/mii.h> 47 #include <dev/mii/miivar.h> 48 #include <dev/mii/miidevs.h> 49 50 #define TSTCNTL 20 51 #define TSTCNTL_READ __BIT(15) 52 #define TSTCNTL_WRITE __BIT(14) 53 #define TSTCNTL_REG_BANK_SEL __BITS(12,11) 54 #define TSTCNTL_TEST_MODE __BIT(10) 55 #define TSTCNTL_READ_ADDR __BITS(9,5) 56 #define TSTCNTL_WRITE_ADDR __BITS(4,0) 57 #define TSTREAD1 21 58 #define TSTWRITE 23 59 60 #define BANK_WOL 1 61 #define BANK_BIST 3 62 63 #define LPI_STATUS 0x0c 64 #define LPI_STATUS_RSV12 __BIT(12) 65 66 #define BIST_PLL_CTRL 0x1b 67 #define BIST_PLL_DIV0 0x1c 68 #define BIST_PLL_DIV1 0x1d 69 70 static int gxlphymatch(device_t, cfdata_t, void *); 71 static void gxlphyattach(device_t, device_t, void *); 72 73 CFATTACH_DECL3_NEW(gxlphy, sizeof(struct mii_softc), 74 gxlphymatch, gxlphyattach, mii_phy_detach, mii_phy_activate, NULL, NULL, 75 DVF_DETACH_SHUTDOWN); 76 77 static int gxlphy_service(struct mii_softc *, struct mii_data *, int); 78 static void gxlphy_status(struct mii_softc *); 79 80 static const struct mii_phy_funcs gxlphy_funcs = { 81 gxlphy_service, gxlphy_status, mii_phy_reset, 82 }; 83 84 static const struct mii_phydesc gxlphys[] = { 85 MII_PHY_DESC(xxAMLOGIC, GXL), 86 MII_PHY_END, 87 }; 88 89 static void 90 gxl_openbanks(struct mii_softc *sc) 91 { 92 PHY_WRITE(sc, TSTCNTL, 0); 93 PHY_WRITE(sc, TSTCNTL, TSTCNTL_TEST_MODE); 94 PHY_WRITE(sc, TSTCNTL, 0); 95 PHY_WRITE(sc, TSTCNTL, TSTCNTL_TEST_MODE); 96 } 97 98 static void 99 gxl_closebanks(struct mii_softc *sc) 100 { 101 PHY_WRITE(sc, TSTCNTL, 0); 102 } 103 104 static uint16_t 105 gxl_readreg(struct mii_softc *sc, u_int bank, u_int reg) 106 { 107 uint16_t val; 108 109 gxl_openbanks(sc); 110 PHY_WRITE(sc, TSTCNTL, 111 TSTCNTL_READ | TSTCNTL_TEST_MODE | 112 __SHIFTIN(bank, TSTCNTL_REG_BANK_SEL) | 113 __SHIFTIN(reg, TSTCNTL_READ_ADDR)); 114 PHY_READ(sc, TSTREAD1, &val); 115 gxl_closebanks(sc); 116 117 return val; 118 } 119 120 static void 121 gxl_writereg(struct mii_softc *sc, u_int bank, u_int reg, uint16_t val) 122 { 123 gxl_openbanks(sc); 124 PHY_WRITE(sc, TSTWRITE, val); 125 PHY_WRITE(sc, TSTCNTL, 126 TSTCNTL_WRITE | TSTCNTL_TEST_MODE | 127 __SHIFTIN(bank, TSTCNTL_REG_BANK_SEL) | 128 __SHIFTIN(reg, TSTCNTL_WRITE_ADDR)); 129 gxl_closebanks(sc); 130 } 131 132 static int 133 gxlphymatch(device_t parent, cfdata_t match, void *aux) 134 { 135 struct mii_attach_args *ma = aux; 136 137 if (mii_phy_match(ma, gxlphys) != NULL) 138 return 20; 139 140 return 0; 141 } 142 143 static void 144 gxlphyattach(device_t parent, device_t self, void *aux) 145 { 146 struct mii_softc *sc = device_private(self); 147 struct mii_attach_args *ma = aux; 148 struct mii_data *mii = ma->mii_data; 149 int oui = MII_OUI(ma->mii_id1, ma->mii_id2); 150 int model = MII_MODEL(ma->mii_id2); 151 int rev = MII_REV(ma->mii_id2); 152 const char *descr; 153 154 if ((descr = mii_get_descr(oui, model)) != NULL) 155 aprint_normal(": %s (OUI 0x%06x, model 0x%04x), rev. %d\n", 156 descr, oui, model, rev); 157 else 158 aprint_normal(": OUI 0x%06x, model 0x%04x, rev. %d\n", 159 oui, model, rev); 160 aprint_naive(": Media interface\n"); 161 162 sc->mii_dev = self; 163 sc->mii_inst = mii->mii_instance; 164 sc->mii_phy = ma->mii_phyno; 165 sc->mii_mpd_oui = MII_OUI(ma->mii_id1, ma->mii_id2); 166 sc->mii_mpd_model = MII_MODEL(ma->mii_id2); 167 sc->mii_mpd_rev = MII_REV(ma->mii_id2); 168 sc->mii_funcs = &gxlphy_funcs; 169 sc->mii_pdata = mii; 170 sc->mii_flags = ma->mii_flags; 171 172 PHY_RESET(sc); 173 174 gxl_writereg(sc, BANK_BIST, BIST_PLL_CTRL, 0x5); 175 gxl_writereg(sc, BANK_BIST, BIST_PLL_DIV1, 0x029a); 176 gxl_writereg(sc, BANK_BIST, BIST_PLL_DIV0, 0xaaaa); 177 178 PHY_READ(sc, MII_BMSR, &sc->mii_capabilities); 179 sc->mii_capabilities &= ma->mii_capmask; 180 if (sc->mii_capabilities & BMSR_EXTSTAT) 181 PHY_READ(sc, MII_EXTSR, &sc->mii_extcapabilities); 182 183 mii_phy_add_media(sc); 184 } 185 186 static int 187 gxlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 188 { 189 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 190 uint16_t reg; 191 192 switch (cmd) { 193 case MII_POLLSTAT: 194 /* If we're not polling our PHY instance, just return. */ 195 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 196 return 0; 197 break; 198 199 case MII_MEDIACHG: 200 /* 201 * If the media indicates a different PHY instance, 202 * isolate ourselves. 203 */ 204 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 205 PHY_READ(sc, MII_BMCR, ®); 206 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 207 return 0; 208 } 209 210 /* If the interface is not up, don't do anything. */ 211 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 212 break; 213 214 mii_phy_setmedia(sc); 215 break; 216 217 case MII_TICK: 218 /* If we're not currently selected, just return. */ 219 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 220 return 0; 221 222 if (mii_phy_tick(sc) == EJUSTRETURN) 223 return 0; 224 break; 225 226 case MII_DOWN: 227 mii_phy_down(sc); 228 return 0; 229 } 230 231 /* Update the media status. */ 232 mii_phy_status(sc); 233 234 /* Callback if something changed. */ 235 mii_phy_update(sc, cmd); 236 return 0; 237 } 238 239 static void 240 gxlphy_status(struct mii_softc *sc) 241 { 242 uint16_t bmcr, bmsr, wol, lpa, aner; 243 244 PHY_READ(sc, MII_BMCR, &bmcr); 245 if ((bmcr & BMCR_AUTOEN) == 0) 246 goto done; 247 248 PHY_READ(sc, MII_BMSR, &bmsr); 249 if ((bmsr & BMSR_ACOMP) == 0) 250 goto done; 251 252 wol = gxl_readreg(sc, BANK_WOL, LPI_STATUS); 253 PHY_READ(sc, MII_ANLPAR, &lpa); 254 PHY_READ(sc, MII_ANER, &aner); 255 256 if ((wol & LPI_STATUS_RSV12) == 0 || 257 ((aner & ANER_LPAN) != 0 && (lpa & ANLPAR_ACK) == 0)) { 258 device_printf(sc->mii_dev, "LPA corruption - aneg restart\n"); 259 260 bmcr &= ~BMCR_ISO; 261 bmcr |= BMCR_AUTOEN; 262 bmcr |= BMCR_STARTNEG; 263 PHY_WRITE(sc, MII_BMCR, bmcr); 264 265 return; 266 } 267 268 done: 269 ukphy_status(sc); 270 } 271
Indexes created Thu Oct 02 01:09:59 GMT 2025