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arm32_boot.c revision 1.19.4.6
      1  1.19.4.6  pgoyette /*	$NetBSD: arm32_boot.c,v 1.19.4.6 2019/01/26 21:59:59 pgoyette Exp $	*/
      2       1.1      matt 
      3       1.1      matt /*
      4       1.1      matt  * Copyright (c) 2002, 2003, 2005  Genetec Corporation.  All rights reserved.
      5       1.1      matt  * Written by Hiroyuki Bessho for Genetec Corporation.
      6       1.1      matt  *
      7       1.1      matt  * Redistribution and use in source and binary forms, with or without
      8       1.1      matt  * modification, are permitted provided that the following conditions
      9       1.1      matt  * are met:
     10       1.1      matt  * 1. Redistributions of source code must retain the above copyright
     11       1.1      matt  *    notice, this list of conditions and the following disclaimer.
     12       1.1      matt  * 2. Redistributions in binary form must reproduce the above copyright
     13       1.1      matt  *    notice, this list of conditions and the following disclaimer in the
     14       1.1      matt  *    documentation and/or other materials provided with the distribution.
     15       1.1      matt  * 3. The name of Genetec Corporation may not be used to endorse or
     16       1.1      matt  *    promote products derived from this software without specific prior
     17       1.1      matt  *    written permission.
     18       1.1      matt  *
     19       1.1      matt  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
     20       1.1      matt  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21       1.1      matt  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22       1.1      matt  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
     23       1.1      matt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24       1.1      matt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25       1.1      matt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26       1.1      matt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27       1.1      matt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28       1.1      matt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29       1.1      matt  * POSSIBILITY OF SUCH DAMAGE.
     30       1.1      matt  *
     31       1.1      matt  * Copyright (c) 2001 Wasabi Systems, Inc.
     32       1.1      matt  * All rights reserved.
     33       1.1      matt  *
     34       1.1      matt  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
     35       1.1      matt  *
     36       1.1      matt  * Redistribution and use in source and binary forms, with or without
     37       1.1      matt  * modification, are permitted provided that the following conditions
     38       1.1      matt  * are met:
     39       1.1      matt  * 1. Redistributions of source code must retain the above copyright
     40       1.1      matt  *    notice, this list of conditions and the following disclaimer.
     41       1.1      matt  * 2. Redistributions in binary form must reproduce the above copyright
     42       1.1      matt  *    notice, this list of conditions and the following disclaimer in the
     43       1.1      matt  *    documentation and/or other materials provided with the distribution.
     44       1.1      matt  * 3. All advertising materials mentioning features or use of this software
     45       1.1      matt  *    must display the following acknowledgement:
     46       1.1      matt  *	This product includes software developed for the NetBSD Project by
     47       1.1      matt  *	Wasabi Systems, Inc.
     48       1.1      matt  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     49       1.1      matt  *    or promote products derived from this software without specific prior
     50       1.1      matt  *    written permission.
     51       1.1      matt  *
     52       1.1      matt  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     53       1.1      matt  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     54       1.1      matt  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     55       1.1      matt  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     56       1.1      matt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     57       1.1      matt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     58       1.1      matt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     59       1.1      matt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     60       1.1      matt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     61       1.1      matt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     62       1.1      matt  * POSSIBILITY OF SUCH DAMAGE.
     63       1.1      matt  *
     64       1.1      matt  * Copyright (c) 1997,1998 Mark Brinicombe.
     65       1.1      matt  * Copyright (c) 1997,1998 Causality Limited.
     66       1.1      matt  * All rights reserved.
     67       1.1      matt  *
     68       1.1      matt  * Redistribution and use in source and binary forms, with or without
     69       1.1      matt  * modification, are permitted provided that the following conditions
     70       1.1      matt  * are met:
     71       1.1      matt  * 1. Redistributions of source code must retain the above copyright
     72       1.1      matt  *    notice, this list of conditions and the following disclaimer.
     73       1.1      matt  * 2. Redistributions in binary form must reproduce the above copyright
     74       1.1      matt  *    notice, this list of conditions and the following disclaimer in the
     75       1.1      matt  *    documentation and/or other materials provided with the distribution.
     76       1.1      matt  * 3. All advertising materials mentioning features or use of this software
     77       1.1      matt  *    must display the following acknowledgement:
     78       1.1      matt  *	This product includes software developed by Mark Brinicombe
     79       1.1      matt  *	for the NetBSD Project.
     80       1.1      matt  * 4. The name of the company nor the name of the author may be used to
     81       1.1      matt  *    endorse or promote products derived from this software without specific
     82       1.1      matt  *    prior written permission.
     83       1.1      matt  *
     84       1.1      matt  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     85       1.1      matt  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     86       1.1      matt  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     87       1.1      matt  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     88       1.1      matt  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     89       1.1      matt  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     90       1.1      matt  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     91       1.1      matt  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     92       1.1      matt  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     93       1.1      matt  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     94       1.1      matt  * SUCH DAMAGE.
     95       1.1      matt  *
     96       1.1      matt  * Copyright (c) 2007 Microsoft
     97       1.1      matt  * All rights reserved.
     98       1.1      matt  *
     99       1.1      matt  * Redistribution and use in source and binary forms, with or without
    100       1.1      matt  * modification, are permitted provided that the following conditions
    101       1.1      matt  * are met:
    102       1.1      matt  * 1. Redistributions of source code must retain the above copyright
    103       1.1      matt  *    notice, this list of conditions and the following disclaimer.
    104       1.1      matt  * 2. Redistributions in binary form must reproduce the above copyright
    105       1.1      matt  *    notice, this list of conditions and the following disclaimer in the
    106       1.1      matt  *    documentation and/or other materials provided with the distribution.
    107       1.1      matt  * 3. All advertising materials mentioning features or use of this software
    108       1.1      matt  *    must display the following acknowledgement:
    109       1.1      matt  *	This product includes software developed by Microsoft
    110       1.1      matt  *
    111       1.1      matt  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
    112       1.1      matt  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
    113       1.1      matt  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
    114       1.1      matt  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
    115       1.1      matt  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
    116       1.1      matt  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
    117       1.1      matt  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    118       1.1      matt  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    119       1.1      matt  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    120       1.1      matt  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    121       1.1      matt  * SUCH DAMAGE.
    122       1.1      matt  */
    123       1.1      matt 
    124       1.1      matt #include <sys/cdefs.h>
    125  1.19.4.6  pgoyette __KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.19.4.6 2019/01/26 21:59:59 pgoyette Exp $");
    126       1.1      matt 
    127  1.19.4.1  pgoyette #include "opt_arm_debug.h"
    128  1.19.4.1  pgoyette #include "opt_cputypes.h"
    129       1.3     skrll #include "opt_ddb.h"
    130       1.3     skrll #include "opt_kgdb.h"
    131       1.9     skrll #include "opt_multiprocessor.h"
    132       1.1      matt 
    133       1.1      matt #include <sys/param.h>
    134       1.1      matt #include <sys/reboot.h>
    135       1.1      matt #include <sys/cpu.h>
    136       1.1      matt #include <sys/intr.h>
    137       1.7      matt #include <sys/atomic.h>
    138       1.7      matt #include <sys/device.h>
    139       1.1      matt 
    140       1.1      matt #include <uvm/uvm_extern.h>
    141       1.1      matt 
    142       1.5      matt #include <arm/locore.h>
    143       1.1      matt #include <arm/undefined.h>
    144       1.1      matt #include <arm/arm32/machdep.h>
    145       1.1      matt 
    146       1.1      matt #include <machine/db_machdep.h>
    147       1.1      matt #include <ddb/db_extern.h>
    148       1.1      matt 
    149       1.1      matt #include <machine/bootconfig.h>
    150       1.1      matt 
    151       1.3     skrll #ifdef KGDB
    152       1.3     skrll #include <sys/kgdb.h>
    153       1.3     skrll #endif
    154       1.3     skrll 
    155  1.19.4.1  pgoyette #ifdef VERBOSE_INIT_ARM
    156  1.19.4.1  pgoyette #define VPRINTF(...)	printf(__VA_ARGS__)
    157  1.19.4.1  pgoyette #else
    158  1.19.4.3  pgoyette #define VPRINTF(...)	__nothing
    159  1.19.4.1  pgoyette #endif
    160  1.19.4.1  pgoyette 
    161      1.11  jmcneill #ifdef MULTIPROCESSOR
    162      1.11  jmcneill static kmutex_t cpu_hatch_lock;
    163      1.11  jmcneill #endif
    164      1.11  jmcneill 
    165       1.1      matt vaddr_t
    166       1.1      matt initarm_common(vaddr_t kvm_base, vsize_t kvm_size,
    167       1.1      matt 	const struct boot_physmem *bp, size_t nbp)
    168       1.1      matt {
    169       1.1      matt 	struct bootmem_info * const bmi = &bootmem_info;
    170       1.1      matt 
    171  1.19.4.1  pgoyette 	VPRINTF("nfreeblocks = %u, free_pages = %d (%#x)\n",
    172       1.1      matt 	    bmi->bmi_nfreeblocks, bmi->bmi_freepages,
    173       1.1      matt 	    bmi->bmi_freepages);
    174       1.1      matt 
    175       1.1      matt 	/*
    176       1.1      matt 	 * Moved from cpu_startup() as data_abort_handler() references
    177       1.1      matt 	 * this during uvm init.
    178       1.1      matt 	 */
    179       1.1      matt 	uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
    180       1.1      matt 
    181      1.19     skrll 	struct lwp * const l = &lwp0;
    182      1.19     skrll 	struct pcb * const pcb = lwp_getpcb(l);
    183      1.19     skrll 
    184      1.19     skrll 	/* Zero out the PCB. */
    185      1.19     skrll  	memset(pcb, 0, sizeof(*pcb));
    186      1.19     skrll 
    187      1.19     skrll 	pcb->pcb_ksp = uvm_lwp_getuarea(l) + USPACE_SVC_STACK_TOP;
    188      1.19     skrll 	pcb->pcb_ksp -= sizeof(struct trapframe);
    189      1.19     skrll 
    190      1.19     skrll 	struct trapframe * tf = (struct trapframe *)pcb->pcb_ksp;
    191      1.19     skrll 
    192      1.19     skrll 	/* Zero out the trapframe. */
    193      1.19     skrll 	memset(tf, 0, sizeof(*tf));
    194      1.19     skrll 	lwp_settrapframe(l, tf);
    195      1.19     skrll 
    196      1.19     skrll #if defined(__ARMEB__)
    197      1.19     skrll 	tf->tf_spsr = PSR_USR32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0);
    198      1.19     skrll #else
    199      1.19     skrll  	tf->tf_spsr = PSR_USR32_MODE;
    200      1.19     skrll #endif
    201      1.19     skrll 
    202  1.19.4.1  pgoyette 	VPRINTF("bootstrap done.\n");
    203       1.1      matt 
    204  1.19.4.1  pgoyette 	VPRINTF("vectors");
    205       1.1      matt 	arm32_vector_init(systempage.pv_va, ARM_VEC_ALL);
    206  1.19.4.1  pgoyette 	VPRINTF(" %#"PRIxVADDR"\n", vector_page);
    207       1.1      matt 
    208       1.1      matt 	/*
    209       1.1      matt 	 * Pages were allocated during the secondary bootstrap for the
    210       1.1      matt 	 * stacks for different CPU modes.
    211       1.1      matt 	 * We must now set the r13 registers in the different CPU modes to
    212       1.1      matt 	 * point to these stacks.
    213       1.1      matt 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
    214       1.1      matt 	 * of the stack memory.
    215       1.1      matt 	 */
    216  1.19.4.1  pgoyette 	VPRINTF("init subsystems: stacks ");
    217       1.1      matt 	set_stackptr(PSR_FIQ32_MODE,
    218       1.1      matt 	    fiqstack.pv_va + FIQ_STACK_SIZE * PAGE_SIZE);
    219       1.1      matt 	set_stackptr(PSR_IRQ32_MODE,
    220       1.1      matt 	    irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
    221       1.1      matt 	set_stackptr(PSR_ABT32_MODE,
    222       1.1      matt 	    abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
    223       1.1      matt 	set_stackptr(PSR_UND32_MODE,
    224       1.1      matt 	    undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
    225       1.1      matt 
    226       1.1      matt 	/*
    227       1.1      matt 	 * Well we should set a data abort handler.
    228       1.1      matt 	 * Once things get going this will change as we will need a proper
    229       1.1      matt 	 * handler.
    230       1.1      matt 	 * Until then we will use a handler that just panics but tells us
    231       1.1      matt 	 * why.
    232       1.1      matt 	 * Initialisation of the vectors will just panic on a data abort.
    233       1.1      matt 	 * This just fills in a slightly better one.
    234       1.1      matt 	 */
    235  1.19.4.1  pgoyette 	VPRINTF("vectors ");
    236       1.1      matt 	data_abort_handler_address = (u_int)data_abort_handler;
    237       1.1      matt 	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
    238       1.1      matt 	undefined_handler_address = (u_int)undefinedinstruction_bounce;
    239       1.1      matt 
    240       1.1      matt 	/* Initialise the undefined instruction handlers */
    241  1.19.4.1  pgoyette 	VPRINTF("undefined ");
    242       1.1      matt 	undefined_init();
    243       1.1      matt 
    244       1.1      matt 	/* Load memory into UVM. */
    245  1.19.4.1  pgoyette 	VPRINTF("page ");
    246      1.18    cherry 	uvm_md_init();
    247       1.1      matt 
    248  1.19.4.3  pgoyette 	VPRINTF("pmap_physload\n");
    249       1.2      matt 	KASSERT(bp != NULL || nbp == 0);
    250       1.2      matt 	KASSERT(bp == NULL || nbp != 0);
    251       1.1      matt 
    252       1.2      matt 	for (size_t i = 0; i < bmi->bmi_nfreeblocks; i++) {
    253       1.2      matt 		pv_addr_t * const pv = &bmi->bmi_freeblocks[i];
    254       1.2      matt 		paddr_t start = atop(pv->pv_pa);
    255       1.2      matt 		const paddr_t end = start + atop(pv->pv_size);
    256  1.19.4.3  pgoyette 		int vm_freelist = VM_FREELIST_DEFAULT;
    257       1.2      matt 
    258  1.19.4.3  pgoyette 		VPRINTF("block %2zu start %08lx  end %08lx", i,
    259  1.19.4.3  pgoyette 		    pv->pv_pa, pv->pv_pa + pv->pv_size);
    260  1.19.4.3  pgoyette 
    261  1.19.4.3  pgoyette 		if (!bp) {
    262  1.19.4.3  pgoyette 			VPRINTF("... loading in freelist %d\n", vm_freelist);
    263  1.19.4.3  pgoyette 			uvm_page_physload(start, end, start, end, VM_FREELIST_DEFAULT);
    264  1.19.4.3  pgoyette 			continue;
    265  1.19.4.3  pgoyette 		}
    266  1.19.4.4  pgoyette 		VPRINTF("\n");
    267  1.19.4.3  pgoyette 		paddr_t segend = end;
    268  1.19.4.3  pgoyette 		for (size_t j = 0; j < nbp; j++ /*, start = segend, segend = end */) {
    269  1.19.4.3  pgoyette 			paddr_t bp_start = bp[j].bp_start;
    270  1.19.4.3  pgoyette 			paddr_t bp_end = bp_start + bp[j].bp_pages;
    271  1.19.4.3  pgoyette 
    272  1.19.4.4  pgoyette 			VPRINTF("   bp %2zu start %08lx  end %08lx\n",
    273  1.19.4.3  pgoyette 			    j, ptoa(bp_start), ptoa(bp_end));
    274  1.19.4.3  pgoyette 			KASSERT(bp_start < bp_end);
    275  1.19.4.3  pgoyette 			if (start > bp_end || segend < bp_start)
    276  1.19.4.3  pgoyette 				continue;
    277  1.19.4.3  pgoyette 
    278  1.19.4.3  pgoyette 			if (start < bp_start)
    279  1.19.4.3  pgoyette 				start = bp_start;
    280  1.19.4.3  pgoyette 
    281  1.19.4.3  pgoyette 			if (start < bp_end) {
    282  1.19.4.3  pgoyette 				if (segend > bp_end) {
    283  1.19.4.3  pgoyette 					segend = bp_end;
    284       1.2      matt 				}
    285  1.19.4.3  pgoyette 				vm_freelist = bp[j].bp_freelist;
    286      1.17     skrll 
    287  1.19.4.3  pgoyette 				uvm_page_physload(start, segend, start, segend,
    288  1.19.4.3  pgoyette 				    vm_freelist);
    289  1.19.4.3  pgoyette 				VPRINTF("         start %08lx  end %08lx"
    290  1.19.4.4  pgoyette 				    "... loading in freelist %d\n", ptoa(start),
    291  1.19.4.3  pgoyette 				    ptoa(segend), vm_freelist);
    292  1.19.4.3  pgoyette 				start = segend;
    293  1.19.4.3  pgoyette 				segend = end;
    294  1.19.4.3  pgoyette 			}
    295       1.1      matt 		}
    296       1.1      matt 	}
    297       1.1      matt 
    298  1.19.4.4  pgoyette 	/* Boot strap pmap telling it where the managed kernel virtual memory is */
    299  1.19.4.1  pgoyette 	VPRINTF("pmap ");
    300       1.1      matt 	pmap_bootstrap(kvm_base, kvm_base + kvm_size);
    301      1.17     skrll 
    302       1.1      matt #ifdef __HAVE_MEMORY_DISK__
    303       1.1      matt 	md_root_setconf(memory_disk, sizeof memory_disk);
    304       1.1      matt #endif
    305       1.1      matt 
    306       1.1      matt #ifdef BOOTHOWTO
    307       1.1      matt 	boothowto |= BOOTHOWTO;
    308       1.1      matt #endif
    309       1.1      matt 
    310       1.1      matt #ifdef KGDB
    311       1.1      matt 	if (boothowto & RB_KDB) {
    312       1.1      matt 		kgdb_debug_init = 1;
    313       1.1      matt 		kgdb_connect(1);
    314       1.1      matt 	}
    315       1.1      matt #endif
    316       1.1      matt 
    317       1.1      matt #ifdef DDB
    318       1.1      matt 	db_machine_init();
    319       1.1      matt 	ddb_init(0, NULL, NULL);
    320       1.1      matt 
    321       1.1      matt 	if (boothowto & RB_KDB)
    322       1.1      matt 		Debugger();
    323       1.1      matt #endif
    324       1.1      matt 
    325      1.11  jmcneill #ifdef MULTIPROCESSOR
    326      1.12  jakllsch 	mutex_init(&cpu_hatch_lock, MUTEX_DEFAULT, IPL_NONE);
    327      1.11  jmcneill #endif
    328      1.11  jmcneill 
    329  1.19.4.1  pgoyette 	VPRINTF("done.\n");
    330       1.1      matt 
    331       1.1      matt 	/* We return the new stack pointer address */
    332      1.19     skrll 	return pcb->pcb_ksp;
    333       1.1      matt }
    334       1.1      matt 
    335       1.1      matt #ifdef MULTIPROCESSOR
    336       1.1      matt /*
    337       1.1      matt  * When we are called, the MMU and caches are on and we are running on the stack
    338       1.1      matt  * of the idlelwp for this cpu.
    339       1.1      matt  */
    340       1.1      matt void
    341  1.19.4.5  pgoyette cpu_hatch(struct cpu_info *ci, u_int cpuindex, void (*md_cpu_init)(struct cpu_info *))
    342       1.1      matt {
    343  1.19.4.5  pgoyette 	KASSERT(cpu_index(ci) == cpuindex);
    344       1.1      matt 
    345       1.1      matt 	/*
    346       1.1      matt 	 * Raise our IPL to the max
    347       1.1      matt 	 */
    348       1.1      matt 	splhigh();
    349       1.1      matt 
    350  1.19.4.5  pgoyette 	VPRINTF("%s(%s): ", __func__, cpu_name(ci));
    351  1.19.4.3  pgoyette 	ci->ci_ctrl = armreg_sctlr_read();
    352       1.7      matt 	uint32_t mpidr = armreg_mpidr_read();
    353  1.19.4.5  pgoyette 	ci->ci_mpidr = mpidr;
    354       1.7      matt 	if (mpidr & MPIDR_MT) {
    355  1.19.4.6  pgoyette 		ci->ci_smt_id = __SHIFTOUT(mpidr, MPIDR_AFF0);
    356  1.19.4.6  pgoyette 		ci->ci_core_id = __SHIFTOUT(mpidr, MPIDR_AFF1);
    357  1.19.4.6  pgoyette 		ci->ci_package_id = __SHIFTOUT(mpidr, MPIDR_AFF2);
    358       1.7      matt 	} else {
    359  1.19.4.6  pgoyette 		ci->ci_core_id = __SHIFTOUT(mpidr, MPIDR_AFF0);
    360  1.19.4.6  pgoyette 		ci->ci_package_id = __SHIFTOUT(mpidr, MPIDR_AFF1);
    361       1.7      matt 	}
    362       1.1      matt 
    363  1.19.4.5  pgoyette 	ci->ci_arm_cpuid = cpu_idnum();
    364  1.19.4.5  pgoyette 	ci->ci_arm_cputype = ci->ci_arm_cpuid & CPU_ID_CPU_MASK;
    365  1.19.4.5  pgoyette 	ci->ci_arm_cpurev = ci->ci_arm_cpuid & CPU_ID_REVISION_MASK;
    366  1.19.4.5  pgoyette 
    367       1.1      matt 	/*
    368       1.1      matt 	 * Make sure we have the right vector page.
    369       1.1      matt 	 */
    370  1.19.4.1  pgoyette 	VPRINTF(" vectors");
    371       1.1      matt 	arm32_vector_init(systempage.pv_va, ARM_VEC_ALL);
    372       1.1      matt 
    373       1.1      matt 	/*
    374       1.7      matt 	 * Initialize the stack for each mode (we are already running on the
    375       1.7      matt 	 * SVC32 stack of the idlelwp).
    376       1.1      matt 	 */
    377  1.19.4.1  pgoyette 	VPRINTF(" stacks");
    378       1.1      matt 	set_stackptr(PSR_FIQ32_MODE,
    379      1.10      matt 	    fiqstack.pv_va + (cpu_index(ci) + 1) * FIQ_STACK_SIZE * PAGE_SIZE);
    380       1.1      matt 	set_stackptr(PSR_IRQ32_MODE,
    381      1.10      matt 	    irqstack.pv_va + (cpu_index(ci) + 1) * IRQ_STACK_SIZE * PAGE_SIZE);
    382       1.1      matt 	set_stackptr(PSR_ABT32_MODE,
    383      1.10      matt 	    abtstack.pv_va + (cpu_index(ci) + 1) * ABT_STACK_SIZE * PAGE_SIZE);
    384       1.1      matt 	set_stackptr(PSR_UND32_MODE,
    385      1.10      matt 	    undstack.pv_va + (cpu_index(ci) + 1) * UND_STACK_SIZE * PAGE_SIZE);
    386       1.1      matt 
    387       1.6      matt 	ci->ci_lastlwp = NULL;
    388       1.6      matt 	ci->ci_pmap_lastuser = NULL;
    389       1.6      matt #ifdef ARM_MMU_EXTENDED
    390  1.19.4.1  pgoyette 	VPRINTF(" tlb");
    391       1.1      matt 	/*
    392       1.6      matt 	 * Attach to the tlb.
    393       1.1      matt 	 */
    394       1.6      matt 	ci->ci_pmap_cur = pmap_kernel();
    395       1.6      matt 	ci->ci_pmap_asid_cur = KERNEL_PID;
    396       1.1      matt #endif
    397       1.6      matt 
    398       1.1      matt #ifdef CPU_CORTEX
    399       1.1      matt 	if (CPU_ID_CORTEX_P(ci->ci_arm_cpuid)) {
    400       1.1      matt 		/*
    401       1.1      matt 		 * Start and reset the PMC Cycle Counter.
    402      1.17     skrll 		 */
    403       1.1      matt 		armreg_pmcr_write(ARM11_PMCCTL_E|ARM11_PMCCTL_P|ARM11_PMCCTL_C);
    404       1.1      matt 		armreg_pmcntenset_write(CORTEX_CNTENS_C);
    405       1.1      matt 	}
    406       1.1      matt #endif
    407       1.1      matt 
    408      1.11  jmcneill 	mutex_enter(&cpu_hatch_lock);
    409      1.11  jmcneill 
    410       1.7      matt 	aprint_naive("%s", device_xname(ci->ci_dev));
    411       1.7      matt 	aprint_normal("%s", device_xname(ci->ci_dev));
    412       1.7      matt 	identify_arm_cpu(ci->ci_dev, ci);
    413  1.19.4.1  pgoyette 	VPRINTF(" vfp");
    414       1.7      matt 	vfp_attach(ci);
    415       1.7      matt 
    416      1.11  jmcneill 	mutex_exit(&cpu_hatch_lock);
    417      1.11  jmcneill 
    418  1.19.4.3  pgoyette 	VPRINTF(" md(%p)", md_cpu_init);
    419  1.19.4.3  pgoyette 	if (md_cpu_init != NULL)
    420  1.19.4.3  pgoyette 		(*md_cpu_init)(ci);
    421  1.19.4.3  pgoyette 
    422  1.19.4.1  pgoyette 	VPRINTF(" interrupts");
    423       1.1      matt 	/*
    424       1.1      matt 	 * Let the interrupts do what they need to on this CPU.
    425       1.1      matt 	 */
    426       1.1      matt 	intr_cpu_init(ci);
    427       1.1      matt 
    428  1.19.4.1  pgoyette 	VPRINTF(" done!\n");
    429  1.19.4.3  pgoyette 
    430  1.19.4.3  pgoyette 	/* Notify cpu_boot_secondary_processors that we're done */
    431  1.19.4.5  pgoyette 	atomic_and_32(&arm_cpu_mbox, ~__BIT(cpuindex));
    432       1.8       ryo 	membar_producer();
    433       1.7      matt 	__asm __volatile("sev; sev; sev");
    434       1.1      matt }
    435       1.1      matt #endif /* MULTIPROCESSOR */
    436