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arm32_boot.c revision 1.8
      1  1.8    ryo /*	$NetBSD: arm32_boot.c,v 1.8 2014/09/14 20:35:45 ryo Exp $	*/
      2  1.1   matt 
      3  1.1   matt /*
      4  1.1   matt  * Copyright (c) 2002, 2003, 2005  Genetec Corporation.  All rights reserved.
      5  1.1   matt  * Written by Hiroyuki Bessho for Genetec Corporation.
      6  1.1   matt  *
      7  1.1   matt  * Redistribution and use in source and binary forms, with or without
      8  1.1   matt  * modification, are permitted provided that the following conditions
      9  1.1   matt  * are met:
     10  1.1   matt  * 1. Redistributions of source code must retain the above copyright
     11  1.1   matt  *    notice, this list of conditions and the following disclaimer.
     12  1.1   matt  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1   matt  *    notice, this list of conditions and the following disclaimer in the
     14  1.1   matt  *    documentation and/or other materials provided with the distribution.
     15  1.1   matt  * 3. The name of Genetec Corporation may not be used to endorse or
     16  1.1   matt  *    promote products derived from this software without specific prior
     17  1.1   matt  *    written permission.
     18  1.1   matt  *
     19  1.1   matt  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
     20  1.1   matt  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  1.1   matt  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  1.1   matt  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
     23  1.1   matt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  1.1   matt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  1.1   matt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.1   matt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  1.1   matt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  1.1   matt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  1.1   matt  * POSSIBILITY OF SUCH DAMAGE.
     30  1.1   matt  *
     31  1.1   matt  * Copyright (c) 2001 Wasabi Systems, Inc.
     32  1.1   matt  * All rights reserved.
     33  1.1   matt  *
     34  1.1   matt  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
     35  1.1   matt  *
     36  1.1   matt  * Redistribution and use in source and binary forms, with or without
     37  1.1   matt  * modification, are permitted provided that the following conditions
     38  1.1   matt  * are met:
     39  1.1   matt  * 1. Redistributions of source code must retain the above copyright
     40  1.1   matt  *    notice, this list of conditions and the following disclaimer.
     41  1.1   matt  * 2. Redistributions in binary form must reproduce the above copyright
     42  1.1   matt  *    notice, this list of conditions and the following disclaimer in the
     43  1.1   matt  *    documentation and/or other materials provided with the distribution.
     44  1.1   matt  * 3. All advertising materials mentioning features or use of this software
     45  1.1   matt  *    must display the following acknowledgement:
     46  1.1   matt  *	This product includes software developed for the NetBSD Project by
     47  1.1   matt  *	Wasabi Systems, Inc.
     48  1.1   matt  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     49  1.1   matt  *    or promote products derived from this software without specific prior
     50  1.1   matt  *    written permission.
     51  1.1   matt  *
     52  1.1   matt  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     53  1.1   matt  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     54  1.1   matt  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     55  1.1   matt  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     56  1.1   matt  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     57  1.1   matt  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     58  1.1   matt  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     59  1.1   matt  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     60  1.1   matt  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     61  1.1   matt  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     62  1.1   matt  * POSSIBILITY OF SUCH DAMAGE.
     63  1.1   matt  *
     64  1.1   matt  * Copyright (c) 1997,1998 Mark Brinicombe.
     65  1.1   matt  * Copyright (c) 1997,1998 Causality Limited.
     66  1.1   matt  * All rights reserved.
     67  1.1   matt  *
     68  1.1   matt  * Redistribution and use in source and binary forms, with or without
     69  1.1   matt  * modification, are permitted provided that the following conditions
     70  1.1   matt  * are met:
     71  1.1   matt  * 1. Redistributions of source code must retain the above copyright
     72  1.1   matt  *    notice, this list of conditions and the following disclaimer.
     73  1.1   matt  * 2. Redistributions in binary form must reproduce the above copyright
     74  1.1   matt  *    notice, this list of conditions and the following disclaimer in the
     75  1.1   matt  *    documentation and/or other materials provided with the distribution.
     76  1.1   matt  * 3. All advertising materials mentioning features or use of this software
     77  1.1   matt  *    must display the following acknowledgement:
     78  1.1   matt  *	This product includes software developed by Mark Brinicombe
     79  1.1   matt  *	for the NetBSD Project.
     80  1.1   matt  * 4. The name of the company nor the name of the author may be used to
     81  1.1   matt  *    endorse or promote products derived from this software without specific
     82  1.1   matt  *    prior written permission.
     83  1.1   matt  *
     84  1.1   matt  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     85  1.1   matt  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     86  1.1   matt  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     87  1.1   matt  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     88  1.1   matt  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     89  1.1   matt  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     90  1.1   matt  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     91  1.1   matt  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     92  1.1   matt  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     93  1.1   matt  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     94  1.1   matt  * SUCH DAMAGE.
     95  1.1   matt  *
     96  1.1   matt  * Copyright (c) 2007 Microsoft
     97  1.1   matt  * All rights reserved.
     98  1.1   matt  *
     99  1.1   matt  * Redistribution and use in source and binary forms, with or without
    100  1.1   matt  * modification, are permitted provided that the following conditions
    101  1.1   matt  * are met:
    102  1.1   matt  * 1. Redistributions of source code must retain the above copyright
    103  1.1   matt  *    notice, this list of conditions and the following disclaimer.
    104  1.1   matt  * 2. Redistributions in binary form must reproduce the above copyright
    105  1.1   matt  *    notice, this list of conditions and the following disclaimer in the
    106  1.1   matt  *    documentation and/or other materials provided with the distribution.
    107  1.1   matt  * 3. All advertising materials mentioning features or use of this software
    108  1.1   matt  *    must display the following acknowledgement:
    109  1.1   matt  *	This product includes software developed by Microsoft
    110  1.1   matt  *
    111  1.1   matt  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
    112  1.1   matt  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
    113  1.1   matt  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
    114  1.1   matt  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
    115  1.1   matt  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
    116  1.1   matt  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
    117  1.1   matt  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    118  1.1   matt  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    119  1.1   matt  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    120  1.1   matt  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    121  1.1   matt  * SUCH DAMAGE.
    122  1.1   matt  */
    123  1.1   matt 
    124  1.1   matt #include <sys/cdefs.h>
    125  1.1   matt 
    126  1.8    ryo __KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.8 2014/09/14 20:35:45 ryo Exp $");
    127  1.3  skrll 
    128  1.3  skrll #include "opt_ddb.h"
    129  1.3  skrll #include "opt_kgdb.h"
    130  1.1   matt 
    131  1.1   matt #include <sys/param.h>
    132  1.1   matt #include <sys/reboot.h>
    133  1.1   matt #include <sys/cpu.h>
    134  1.1   matt #include <sys/intr.h>
    135  1.7   matt #include <sys/atomic.h>
    136  1.7   matt #include <sys/device.h>
    137  1.1   matt 
    138  1.1   matt #include <uvm/uvm_extern.h>
    139  1.1   matt 
    140  1.5   matt #include <arm/locore.h>
    141  1.1   matt #include <arm/undefined.h>
    142  1.1   matt #include <arm/arm32/machdep.h>
    143  1.1   matt 
    144  1.1   matt #include <machine/db_machdep.h>
    145  1.1   matt #include <ddb/db_extern.h>
    146  1.1   matt 
    147  1.1   matt #include <machine/bootconfig.h>
    148  1.1   matt 
    149  1.3  skrll #ifdef KGDB
    150  1.3  skrll #include <sys/kgdb.h>
    151  1.3  skrll #endif
    152  1.3  skrll 
    153  1.1   matt vaddr_t
    154  1.1   matt initarm_common(vaddr_t kvm_base, vsize_t kvm_size,
    155  1.1   matt 	const struct boot_physmem *bp, size_t nbp)
    156  1.1   matt {
    157  1.1   matt 	struct bootmem_info * const bmi = &bootmem_info;
    158  1.1   matt 
    159  1.1   matt #ifdef VERBOSE_INIT_ARM
    160  1.1   matt 	printf("nfreeblocks = %u, free_pages = %d (%#x)\n",
    161  1.1   matt 	    bmi->bmi_nfreeblocks, bmi->bmi_freepages,
    162  1.1   matt 	    bmi->bmi_freepages);
    163  1.1   matt #endif
    164  1.1   matt 
    165  1.1   matt 	/*
    166  1.1   matt 	 * Moved from cpu_startup() as data_abort_handler() references
    167  1.1   matt 	 * this during uvm init.
    168  1.1   matt 	 */
    169  1.1   matt 	uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
    170  1.1   matt 
    171  1.1   matt #ifdef VERBOSE_INIT_ARM
    172  1.1   matt 	printf("bootstrap done.\n");
    173  1.1   matt #endif
    174  1.1   matt 
    175  1.4   matt #ifdef VERBOSE_INIT_ARM
    176  1.4   matt 	printf("vectors");
    177  1.4   matt #endif
    178  1.1   matt 	arm32_vector_init(systempage.pv_va, ARM_VEC_ALL);
    179  1.4   matt #ifdef VERBOSE_INIT_ARM
    180  1.4   matt 	printf(" %#"PRIxVADDR"\n", vector_page);
    181  1.4   matt #endif
    182  1.1   matt 
    183  1.1   matt 	/*
    184  1.1   matt 	 * Pages were allocated during the secondary bootstrap for the
    185  1.1   matt 	 * stacks for different CPU modes.
    186  1.1   matt 	 * We must now set the r13 registers in the different CPU modes to
    187  1.1   matt 	 * point to these stacks.
    188  1.1   matt 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
    189  1.1   matt 	 * of the stack memory.
    190  1.1   matt 	 */
    191  1.1   matt #ifdef VERBOSE_INIT_ARM
    192  1.1   matt 	printf("init subsystems: stacks ");
    193  1.1   matt #endif
    194  1.1   matt 	set_stackptr(PSR_FIQ32_MODE,
    195  1.1   matt 	    fiqstack.pv_va + FIQ_STACK_SIZE * PAGE_SIZE);
    196  1.1   matt 	set_stackptr(PSR_IRQ32_MODE,
    197  1.1   matt 	    irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
    198  1.1   matt 	set_stackptr(PSR_ABT32_MODE,
    199  1.1   matt 	    abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
    200  1.1   matt 	set_stackptr(PSR_UND32_MODE,
    201  1.1   matt 	    undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
    202  1.1   matt 
    203  1.1   matt 	/*
    204  1.1   matt 	 * Well we should set a data abort handler.
    205  1.1   matt 	 * Once things get going this will change as we will need a proper
    206  1.1   matt 	 * handler.
    207  1.1   matt 	 * Until then we will use a handler that just panics but tells us
    208  1.1   matt 	 * why.
    209  1.1   matt 	 * Initialisation of the vectors will just panic on a data abort.
    210  1.1   matt 	 * This just fills in a slightly better one.
    211  1.1   matt 	 */
    212  1.1   matt #ifdef VERBOSE_INIT_ARM
    213  1.1   matt 	printf("vectors ");
    214  1.1   matt #endif
    215  1.1   matt 	data_abort_handler_address = (u_int)data_abort_handler;
    216  1.1   matt 	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
    217  1.1   matt 	undefined_handler_address = (u_int)undefinedinstruction_bounce;
    218  1.1   matt 
    219  1.1   matt 	/* Initialise the undefined instruction handlers */
    220  1.1   matt #ifdef VERBOSE_INIT_ARM
    221  1.1   matt 	printf("undefined ");
    222  1.1   matt #endif
    223  1.1   matt 	undefined_init();
    224  1.1   matt 
    225  1.1   matt 	/* Load memory into UVM. */
    226  1.1   matt #ifdef VERBOSE_INIT_ARM
    227  1.1   matt 	printf("page ");
    228  1.1   matt #endif
    229  1.1   matt 	uvm_setpagesize();	/* initialize PAGE_SIZE-dependent variables */
    230  1.1   matt 
    231  1.1   matt #ifdef VERBOSE_INIT_ARM
    232  1.1   matt 	printf("pmap_physload ");
    233  1.1   matt #endif
    234  1.2   matt 	KASSERT(bp != NULL || nbp == 0);
    235  1.2   matt 	KASSERT(bp == NULL || nbp != 0);
    236  1.1   matt 
    237  1.2   matt 	for (size_t i = 0; i < bmi->bmi_nfreeblocks; i++) {
    238  1.2   matt 		pv_addr_t * const pv = &bmi->bmi_freeblocks[i];
    239  1.2   matt 		paddr_t start = atop(pv->pv_pa);
    240  1.2   matt 		const paddr_t end = start + atop(pv->pv_size);
    241  1.2   matt 
    242  1.2   matt 		while (start < end) {
    243  1.2   matt 			int vm_freelist = VM_FREELIST_DEFAULT;
    244  1.2   matt 			paddr_t segend = end;
    245  1.2   matt 			/*
    246  1.2   matt 			 * This assumes the bp list is sorted in ascending
    247  1.2   matt 			 * order.
    248  1.2   matt 			 */
    249  1.2   matt 			for (size_t j = 0; j < nbp; j++) {
    250  1.2   matt 				paddr_t bp_start = bp[j].bp_start;
    251  1.2   matt 				paddr_t bp_end = bp_start + bp[j].bp_pages;
    252  1.2   matt 				if (start < bp_start) {
    253  1.2   matt 					if (segend > bp_start) {
    254  1.2   matt 						segend = bp_start;
    255  1.2   matt 					}
    256  1.2   matt 					break;
    257  1.2   matt 				}
    258  1.2   matt 				if (start < bp_end) {
    259  1.2   matt 					if (segend > bp_end) {
    260  1.2   matt 						segend = bp_end;
    261  1.2   matt 					}
    262  1.2   matt 					vm_freelist = bp[j].bp_freelist;
    263  1.2   matt 					break;
    264  1.2   matt 				}
    265  1.2   matt 			}
    266  1.2   matt 
    267  1.2   matt 			uvm_page_physload(start, segend, start, segend,
    268  1.2   matt 			    vm_freelist);
    269  1.2   matt 			start = segend;
    270  1.1   matt 		}
    271  1.1   matt 	}
    272  1.1   matt 
    273  1.1   matt 	/* Boot strap pmap telling it where the kernel page table is */
    274  1.1   matt #ifdef VERBOSE_INIT_ARM
    275  1.1   matt 	printf("pmap ");
    276  1.1   matt #endif
    277  1.1   matt 	pmap_bootstrap(kvm_base, kvm_base + kvm_size);
    278  1.1   matt 
    279  1.1   matt #ifdef __HAVE_MEMORY_DISK__
    280  1.1   matt 	md_root_setconf(memory_disk, sizeof memory_disk);
    281  1.1   matt #endif
    282  1.1   matt 
    283  1.1   matt #ifdef BOOTHOWTO
    284  1.1   matt 	boothowto |= BOOTHOWTO;
    285  1.1   matt #endif
    286  1.1   matt 
    287  1.1   matt #ifdef KGDB
    288  1.1   matt 	if (boothowto & RB_KDB) {
    289  1.1   matt 		kgdb_debug_init = 1;
    290  1.1   matt 		kgdb_connect(1);
    291  1.1   matt 	}
    292  1.1   matt #endif
    293  1.1   matt 
    294  1.1   matt #ifdef DDB
    295  1.1   matt 	db_machine_init();
    296  1.1   matt 	ddb_init(0, NULL, NULL);
    297  1.1   matt 
    298  1.1   matt 	if (boothowto & RB_KDB)
    299  1.1   matt 		Debugger();
    300  1.1   matt #endif
    301  1.1   matt 
    302  1.1   matt #ifdef VERBOSE_INIT_ARM
    303  1.1   matt 	printf("done.\n");
    304  1.1   matt #endif
    305  1.1   matt 
    306  1.1   matt 	/* We return the new stack pointer address */
    307  1.1   matt 	return kernelstack.pv_va + USPACE_SVC_STACK_TOP;
    308  1.1   matt }
    309  1.1   matt 
    310  1.1   matt #ifdef MULTIPROCESSOR
    311  1.1   matt /*
    312  1.1   matt  * When we are called, the MMU and caches are on and we are running on the stack
    313  1.1   matt  * of the idlelwp for this cpu.
    314  1.1   matt  */
    315  1.1   matt void
    316  1.1   matt cpu_hatch(struct cpu_info *ci, cpuid_t cpuid, void (*md_cpu_init)(struct cpu_info *))
    317  1.1   matt {
    318  1.1   matt 	KASSERT(cpu_index(ci) == cpuid);
    319  1.1   matt 
    320  1.1   matt 	/*
    321  1.1   matt 	 * Raise our IPL to the max
    322  1.1   matt 	 */
    323  1.1   matt 	splhigh();
    324  1.1   matt 
    325  1.7   matt #ifdef VERBOSE_INIT_ARM
    326  1.1   matt 	printf("%s(%s): ", __func__, ci->ci_data.cpu_name);
    327  1.7   matt #endif
    328  1.7   matt 	uint32_t mpidr = armreg_mpidr_read();
    329  1.7   matt 	if (mpidr & MPIDR_MT) {
    330  1.7   matt 		ci->ci_data.cpu_smt_id = mpidr & MPIDR_AFF0;
    331  1.7   matt 		ci->ci_data.cpu_core_id = mpidr & MPIDR_AFF1;
    332  1.7   matt 		ci->ci_data.cpu_package_id = mpidr & MPIDR_AFF2;
    333  1.7   matt 	} else {
    334  1.7   matt 		ci->ci_data.cpu_core_id = mpidr & MPIDR_AFF0;
    335  1.7   matt 		ci->ci_data.cpu_package_id = mpidr & MPIDR_AFF1;
    336  1.7   matt 	}
    337  1.1   matt 
    338  1.1   matt 	/*
    339  1.1   matt 	 * Make sure we have the right vector page.
    340  1.1   matt 	 */
    341  1.7   matt #ifdef VERBOSE_INIT_ARM
    342  1.1   matt 	printf(" vectors");
    343  1.7   matt #endif
    344  1.1   matt 	arm32_vector_init(systempage.pv_va, ARM_VEC_ALL);
    345  1.1   matt 
    346  1.1   matt 	/*
    347  1.7   matt 	 * Initialize the stack for each mode (we are already running on the
    348  1.7   matt 	 * SVC32 stack of the idlelwp).
    349  1.1   matt 	 */
    350  1.7   matt #ifdef VERBOSE_INIT_ARM
    351  1.1   matt 	printf(" stacks");
    352  1.7   matt #endif
    353  1.1   matt 	set_stackptr(PSR_FIQ32_MODE,
    354  1.1   matt 	    fiqstack.pv_va + cpu_index(ci) * FIQ_STACK_SIZE * PAGE_SIZE);
    355  1.1   matt 	set_stackptr(PSR_IRQ32_MODE,
    356  1.1   matt 	    irqstack.pv_va + cpu_index(ci) * IRQ_STACK_SIZE * PAGE_SIZE);
    357  1.1   matt 	set_stackptr(PSR_ABT32_MODE,
    358  1.1   matt 	    abtstack.pv_va + cpu_index(ci) * ABT_STACK_SIZE * PAGE_SIZE);
    359  1.1   matt 	set_stackptr(PSR_UND32_MODE,
    360  1.1   matt 	    undstack.pv_va + cpu_index(ci) * UND_STACK_SIZE * PAGE_SIZE);
    361  1.1   matt 
    362  1.6   matt 	ci->ci_lastlwp = NULL;
    363  1.6   matt 	ci->ci_pmap_lastuser = NULL;
    364  1.6   matt #ifdef ARM_MMU_EXTENDED
    365  1.7   matt #ifdef VERBOSE_INIT_ARM
    366  1.6   matt 	printf(" tlb");
    367  1.7   matt #endif
    368  1.1   matt 	/*
    369  1.6   matt 	 * Attach to the tlb.
    370  1.1   matt 	 */
    371  1.6   matt 	ci->ci_pmap_cur = pmap_kernel();
    372  1.6   matt 	ci->ci_pmap_asid_cur = KERNEL_PID;
    373  1.1   matt #endif
    374  1.6   matt 
    375  1.1   matt #ifdef CPU_CORTEX
    376  1.1   matt 	if (CPU_ID_CORTEX_P(ci->ci_arm_cpuid)) {
    377  1.1   matt 		/*
    378  1.1   matt 		 * Start and reset the PMC Cycle Counter.
    379  1.1   matt 		 */
    380  1.1   matt 		armreg_pmcr_write(ARM11_PMCCTL_E|ARM11_PMCCTL_P|ARM11_PMCCTL_C);
    381  1.1   matt 		armreg_pmcntenset_write(CORTEX_CNTENS_C);
    382  1.1   matt 	}
    383  1.1   matt #endif
    384  1.1   matt 
    385  1.7   matt 	aprint_naive("%s", device_xname(ci->ci_dev));
    386  1.7   matt 	aprint_normal("%s", device_xname(ci->ci_dev));
    387  1.7   matt 	identify_arm_cpu(ci->ci_dev, ci);
    388  1.7   matt #ifdef VERBOSE_INIT_ARM
    389  1.7   matt 	printf(" vfp");
    390  1.7   matt #endif
    391  1.7   matt 	vfp_attach(ci);
    392  1.7   matt 
    393  1.7   matt #ifdef VERBOSE_INIT_ARM
    394  1.1   matt 	printf(" interrupts");
    395  1.7   matt #endif
    396  1.1   matt 	/*
    397  1.1   matt 	 * Let the interrupts do what they need to on this CPU.
    398  1.1   matt 	 */
    399  1.1   matt 	intr_cpu_init(ci);
    400  1.1   matt 
    401  1.7   matt #ifdef VERBOSE_INIT_ARM
    402  1.1   matt 	printf(" md(%p)", md_cpu_init);
    403  1.7   matt #endif
    404  1.1   matt 	if (md_cpu_init != NULL)
    405  1.1   matt 		(*md_cpu_init)(ci);
    406  1.1   matt 
    407  1.7   matt #ifdef VERBOSE_INIT_ARM
    408  1.7   matt 	printf(" done!\n");
    409  1.1   matt #endif
    410  1.7   matt 	atomic_and_32(&arm_cpu_mbox, ~(1 << cpuid));
    411  1.8    ryo 	membar_producer();
    412  1.7   matt 	__asm __volatile("sev; sev; sev");
    413  1.1   matt }
    414  1.1   matt #endif /* MULTIPROCESSOR */
    415