arm32_boot.c revision 1.19
1 /* $NetBSD: arm32_boot.c,v 1.19 2017/07/02 16:16:44 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. 5 * Written by Hiroyuki Bessho for Genetec Corporation. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of Genetec Corporation may not be used to endorse or 16 * promote products derived from this software without specific prior 17 * written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 * 31 * Copyright (c) 2001 Wasabi Systems, Inc. 32 * All rights reserved. 33 * 34 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed for the NetBSD Project by 47 * Wasabi Systems, Inc. 48 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 49 * or promote products derived from this software without specific prior 50 * written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 54 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 55 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 56 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 62 * POSSIBILITY OF SUCH DAMAGE. 63 * 64 * Copyright (c) 1997,1998 Mark Brinicombe. 65 * Copyright (c) 1997,1998 Causality Limited. 66 * All rights reserved. 67 * 68 * Redistribution and use in source and binary forms, with or without 69 * modification, are permitted provided that the following conditions 70 * are met: 71 * 1. Redistributions of source code must retain the above copyright 72 * notice, this list of conditions and the following disclaimer. 73 * 2. Redistributions in binary form must reproduce the above copyright 74 * notice, this list of conditions and the following disclaimer in the 75 * documentation and/or other materials provided with the distribution. 76 * 3. All advertising materials mentioning features or use of this software 77 * must display the following acknowledgement: 78 * This product includes software developed by Mark Brinicombe 79 * for the NetBSD Project. 80 * 4. The name of the company nor the name of the author may be used to 81 * endorse or promote products derived from this software without specific 82 * prior written permission. 83 * 84 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 85 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 86 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 87 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 88 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 89 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 91 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 92 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 93 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 94 * SUCH DAMAGE. 95 * 96 * Copyright (c) 2007 Microsoft 97 * All rights reserved. 98 * 99 * Redistribution and use in source and binary forms, with or without 100 * modification, are permitted provided that the following conditions 101 * are met: 102 * 1. Redistributions of source code must retain the above copyright 103 * notice, this list of conditions and the following disclaimer. 104 * 2. Redistributions in binary form must reproduce the above copyright 105 * notice, this list of conditions and the following disclaimer in the 106 * documentation and/or other materials provided with the distribution. 107 * 3. All advertising materials mentioning features or use of this software 108 * must display the following acknowledgement: 109 * This product includes software developed by Microsoft 110 * 111 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 112 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 113 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 114 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT, 115 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 116 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 117 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 118 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 119 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 120 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 121 * SUCH DAMAGE. 122 */ 123 124 #include <sys/cdefs.h> 125 126 __KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.19 2017/07/02 16:16:44 skrll Exp $"); 127 128 #include "opt_ddb.h" 129 #include "opt_kgdb.h" 130 #include "opt_multiprocessor.h" 131 132 #include <sys/param.h> 133 #include <sys/reboot.h> 134 #include <sys/cpu.h> 135 #include <sys/intr.h> 136 #include <sys/atomic.h> 137 #include <sys/device.h> 138 139 #include <uvm/uvm_extern.h> 140 141 #include <arm/locore.h> 142 #include <arm/undefined.h> 143 #include <arm/arm32/machdep.h> 144 145 #include <machine/db_machdep.h> 146 #include <ddb/db_extern.h> 147 148 #include <machine/bootconfig.h> 149 150 #ifdef KGDB 151 #include <sys/kgdb.h> 152 #endif 153 154 #ifdef MULTIPROCESSOR 155 static kmutex_t cpu_hatch_lock; 156 #endif 157 158 vaddr_t 159 initarm_common(vaddr_t kvm_base, vsize_t kvm_size, 160 const struct boot_physmem *bp, size_t nbp) 161 { 162 struct bootmem_info * const bmi = &bootmem_info; 163 164 #ifdef VERBOSE_INIT_ARM 165 printf("nfreeblocks = %u, free_pages = %d (%#x)\n", 166 bmi->bmi_nfreeblocks, bmi->bmi_freepages, 167 bmi->bmi_freepages); 168 #endif 169 170 /* 171 * Moved from cpu_startup() as data_abort_handler() references 172 * this during uvm init. 173 */ 174 uvm_lwp_setuarea(&lwp0, kernelstack.pv_va); 175 176 struct lwp * const l = &lwp0; 177 struct pcb * const pcb = lwp_getpcb(l); 178 179 /* Zero out the PCB. */ 180 memset(pcb, 0, sizeof(*pcb)); 181 182 pcb->pcb_ksp = uvm_lwp_getuarea(l) + USPACE_SVC_STACK_TOP; 183 pcb->pcb_ksp -= sizeof(struct trapframe); 184 185 struct trapframe * tf = (struct trapframe *)pcb->pcb_ksp; 186 187 /* Zero out the trapframe. */ 188 memset(tf, 0, sizeof(*tf)); 189 lwp_settrapframe(l, tf); 190 191 #if defined(__ARMEB__) 192 tf->tf_spsr = PSR_USR32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0); 193 #else 194 tf->tf_spsr = PSR_USR32_MODE; 195 #endif 196 197 #ifdef VERBOSE_INIT_ARM 198 printf("bootstrap done.\n"); 199 #endif 200 201 #ifdef VERBOSE_INIT_ARM 202 printf("vectors"); 203 #endif 204 arm32_vector_init(systempage.pv_va, ARM_VEC_ALL); 205 #ifdef VERBOSE_INIT_ARM 206 printf(" %#"PRIxVADDR"\n", vector_page); 207 #endif 208 209 /* 210 * Pages were allocated during the secondary bootstrap for the 211 * stacks for different CPU modes. 212 * We must now set the r13 registers in the different CPU modes to 213 * point to these stacks. 214 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 215 * of the stack memory. 216 */ 217 #ifdef VERBOSE_INIT_ARM 218 printf("init subsystems: stacks "); 219 #endif 220 set_stackptr(PSR_FIQ32_MODE, 221 fiqstack.pv_va + FIQ_STACK_SIZE * PAGE_SIZE); 222 set_stackptr(PSR_IRQ32_MODE, 223 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 224 set_stackptr(PSR_ABT32_MODE, 225 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 226 set_stackptr(PSR_UND32_MODE, 227 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 228 229 /* 230 * Well we should set a data abort handler. 231 * Once things get going this will change as we will need a proper 232 * handler. 233 * Until then we will use a handler that just panics but tells us 234 * why. 235 * Initialisation of the vectors will just panic on a data abort. 236 * This just fills in a slightly better one. 237 */ 238 #ifdef VERBOSE_INIT_ARM 239 printf("vectors "); 240 #endif 241 data_abort_handler_address = (u_int)data_abort_handler; 242 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 243 undefined_handler_address = (u_int)undefinedinstruction_bounce; 244 245 /* Initialise the undefined instruction handlers */ 246 #ifdef VERBOSE_INIT_ARM 247 printf("undefined "); 248 #endif 249 undefined_init(); 250 251 /* Load memory into UVM. */ 252 #ifdef VERBOSE_INIT_ARM 253 printf("page "); 254 #endif 255 uvm_md_init(); 256 257 #ifdef VERBOSE_INIT_ARM 258 printf("pmap_physload "); 259 #endif 260 KASSERT(bp != NULL || nbp == 0); 261 KASSERT(bp == NULL || nbp != 0); 262 263 for (size_t i = 0; i < bmi->bmi_nfreeblocks; i++) { 264 pv_addr_t * const pv = &bmi->bmi_freeblocks[i]; 265 paddr_t start = atop(pv->pv_pa); 266 const paddr_t end = start + atop(pv->pv_size); 267 268 while (start < end) { 269 int vm_freelist = VM_FREELIST_DEFAULT; 270 paddr_t segend = end; 271 /* 272 * This assumes the bp list is sorted in ascending 273 * order. 274 */ 275 for (size_t j = 0; j < nbp; j++) { 276 paddr_t bp_start = bp[j].bp_start; 277 paddr_t bp_end = bp_start + bp[j].bp_pages; 278 if (start < bp_start) { 279 if (segend > bp_start) { 280 segend = bp_start; 281 } 282 break; 283 } 284 if (start < bp_end) { 285 if (segend > bp_end) { 286 segend = bp_end; 287 } 288 vm_freelist = bp[j].bp_freelist; 289 break; 290 } 291 } 292 293 uvm_page_physload(start, segend, start, segend, 294 vm_freelist); 295 start = segend; 296 } 297 } 298 299 /* Boot strap pmap telling it where the kernel page table is */ 300 #ifdef VERBOSE_INIT_ARM 301 printf("pmap "); 302 #endif 303 pmap_bootstrap(kvm_base, kvm_base + kvm_size); 304 305 #ifdef __HAVE_MEMORY_DISK__ 306 md_root_setconf(memory_disk, sizeof memory_disk); 307 #endif 308 309 #ifdef BOOTHOWTO 310 boothowto |= BOOTHOWTO; 311 #endif 312 313 #ifdef KGDB 314 if (boothowto & RB_KDB) { 315 kgdb_debug_init = 1; 316 kgdb_connect(1); 317 } 318 #endif 319 320 #ifdef DDB 321 db_machine_init(); 322 ddb_init(0, NULL, NULL); 323 324 if (boothowto & RB_KDB) 325 Debugger(); 326 #endif 327 328 #ifdef MULTIPROCESSOR 329 mutex_init(&cpu_hatch_lock, MUTEX_DEFAULT, IPL_NONE); 330 #endif 331 332 #ifdef VERBOSE_INIT_ARM 333 printf("done.\n"); 334 #endif 335 336 /* We return the new stack pointer address */ 337 return pcb->pcb_ksp; 338 } 339 340 #ifdef MULTIPROCESSOR 341 /* 342 * When we are called, the MMU and caches are on and we are running on the stack 343 * of the idlelwp for this cpu. 344 */ 345 void 346 cpu_hatch(struct cpu_info *ci, cpuid_t cpuid, void (*md_cpu_init)(struct cpu_info *)) 347 { 348 KASSERT(cpu_index(ci) == cpuid); 349 350 /* 351 * Raise our IPL to the max 352 */ 353 splhigh(); 354 355 #ifdef CPU_CORTEX 356 #if 0 357 KASSERTMSG(armreg_auxctl_read() & CORTEXA9_AUXCTL_SMP, "auxctl %#x", 358 armreg_auxctl_read()); 359 #endif 360 #endif 361 362 #ifdef VERBOSE_INIT_ARM 363 printf("%s(%s): ", __func__, ci->ci_data.cpu_name); 364 #endif 365 uint32_t mpidr = armreg_mpidr_read(); 366 if (mpidr & MPIDR_MT) { 367 ci->ci_data.cpu_smt_id = mpidr & MPIDR_AFF0; 368 ci->ci_data.cpu_core_id = mpidr & MPIDR_AFF1; 369 ci->ci_data.cpu_package_id = mpidr & MPIDR_AFF2; 370 } else { 371 ci->ci_data.cpu_core_id = mpidr & MPIDR_AFF0; 372 ci->ci_data.cpu_package_id = mpidr & MPIDR_AFF1; 373 } 374 375 /* 376 * Make sure we have the right vector page. 377 */ 378 #ifdef VERBOSE_INIT_ARM 379 printf(" vectors"); 380 #endif 381 arm32_vector_init(systempage.pv_va, ARM_VEC_ALL); 382 383 /* 384 * Initialize the stack for each mode (we are already running on the 385 * SVC32 stack of the idlelwp). 386 */ 387 #ifdef VERBOSE_INIT_ARM 388 printf(" stacks"); 389 #endif 390 set_stackptr(PSR_FIQ32_MODE, 391 fiqstack.pv_va + (cpu_index(ci) + 1) * FIQ_STACK_SIZE * PAGE_SIZE); 392 set_stackptr(PSR_IRQ32_MODE, 393 irqstack.pv_va + (cpu_index(ci) + 1) * IRQ_STACK_SIZE * PAGE_SIZE); 394 set_stackptr(PSR_ABT32_MODE, 395 abtstack.pv_va + (cpu_index(ci) + 1) * ABT_STACK_SIZE * PAGE_SIZE); 396 set_stackptr(PSR_UND32_MODE, 397 undstack.pv_va + (cpu_index(ci) + 1) * UND_STACK_SIZE * PAGE_SIZE); 398 399 ci->ci_lastlwp = NULL; 400 ci->ci_pmap_lastuser = NULL; 401 #ifdef ARM_MMU_EXTENDED 402 #ifdef VERBOSE_INIT_ARM 403 printf(" tlb"); 404 #endif 405 /* 406 * Attach to the tlb. 407 */ 408 ci->ci_pmap_cur = pmap_kernel(); 409 ci->ci_pmap_asid_cur = KERNEL_PID; 410 #endif 411 412 #ifdef CPU_CORTEX 413 if (CPU_ID_CORTEX_P(ci->ci_arm_cpuid)) { 414 /* 415 * Start and reset the PMC Cycle Counter. 416 */ 417 armreg_pmcr_write(ARM11_PMCCTL_E|ARM11_PMCCTL_P|ARM11_PMCCTL_C); 418 armreg_pmcntenset_write(CORTEX_CNTENS_C); 419 } 420 #endif 421 422 mutex_enter(&cpu_hatch_lock); 423 424 aprint_naive("%s", device_xname(ci->ci_dev)); 425 aprint_normal("%s", device_xname(ci->ci_dev)); 426 identify_arm_cpu(ci->ci_dev, ci); 427 #ifdef VERBOSE_INIT_ARM 428 printf(" vfp"); 429 #endif 430 vfp_attach(ci); 431 432 mutex_exit(&cpu_hatch_lock); 433 434 #ifdef VERBOSE_INIT_ARM 435 printf(" interrupts"); 436 #endif 437 /* 438 * Let the interrupts do what they need to on this CPU. 439 */ 440 intr_cpu_init(ci); 441 442 #ifdef VERBOSE_INIT_ARM 443 printf(" md(%p)", md_cpu_init); 444 #endif 445 if (md_cpu_init != NULL) 446 (*md_cpu_init)(ci); 447 448 #ifdef VERBOSE_INIT_ARM 449 printf(" done!\n"); 450 #endif 451 atomic_and_32(&arm_cpu_mbox, ~(1 << cpuid)); 452 membar_producer(); 453 __asm __volatile("sev; sev; sev"); 454 } 455 #endif /* MULTIPROCESSOR */ 456
Indexes created Thu Oct 02 14:10:14 GMT 2025