arm32_boot.c revision 1.37
1 /* $NetBSD: arm32_boot.c,v 1.37 2020/02/15 08:16:11 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. 5 * Written by Hiroyuki Bessho for Genetec Corporation. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of Genetec Corporation may not be used to endorse or 16 * promote products derived from this software without specific prior 17 * written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 * 31 * Copyright (c) 2001 Wasabi Systems, Inc. 32 * All rights reserved. 33 * 34 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed for the NetBSD Project by 47 * Wasabi Systems, Inc. 48 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 49 * or promote products derived from this software without specific prior 50 * written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 54 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 55 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 56 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 62 * POSSIBILITY OF SUCH DAMAGE. 63 * 64 * Copyright (c) 1997,1998 Mark Brinicombe. 65 * Copyright (c) 1997,1998 Causality Limited. 66 * All rights reserved. 67 * 68 * Redistribution and use in source and binary forms, with or without 69 * modification, are permitted provided that the following conditions 70 * are met: 71 * 1. Redistributions of source code must retain the above copyright 72 * notice, this list of conditions and the following disclaimer. 73 * 2. Redistributions in binary form must reproduce the above copyright 74 * notice, this list of conditions and the following disclaimer in the 75 * documentation and/or other materials provided with the distribution. 76 * 3. All advertising materials mentioning features or use of this software 77 * must display the following acknowledgement: 78 * This product includes software developed by Mark Brinicombe 79 * for the NetBSD Project. 80 * 4. The name of the company nor the name of the author may be used to 81 * endorse or promote products derived from this software without specific 82 * prior written permission. 83 * 84 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 85 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 86 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 87 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 88 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 89 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 91 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 92 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 93 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 94 * SUCH DAMAGE. 95 * 96 * Copyright (c) 2007 Microsoft 97 * All rights reserved. 98 * 99 * Redistribution and use in source and binary forms, with or without 100 * modification, are permitted provided that the following conditions 101 * are met: 102 * 1. Redistributions of source code must retain the above copyright 103 * notice, this list of conditions and the following disclaimer. 104 * 2. Redistributions in binary form must reproduce the above copyright 105 * notice, this list of conditions and the following disclaimer in the 106 * documentation and/or other materials provided with the distribution. 107 * 3. All advertising materials mentioning features or use of this software 108 * must display the following acknowledgement: 109 * This product includes software developed by Microsoft 110 * 111 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 112 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 113 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 114 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT, 115 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 116 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 117 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 118 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 119 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 120 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 121 * SUCH DAMAGE. 122 */ 123 124 #include <sys/cdefs.h> 125 __KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.37 2020/02/15 08:16:11 skrll Exp $"); 126 127 #include "opt_arm_debug.h" 128 #include "opt_cputypes.h" 129 #include "opt_ddb.h" 130 #include "opt_kgdb.h" 131 #include "opt_multiprocessor.h" 132 133 #include <sys/param.h> 134 #include <sys/reboot.h> 135 #include <sys/cpu.h> 136 #include <sys/intr.h> 137 #include <sys/atomic.h> 138 #include <sys/device.h> 139 140 #include <uvm/uvm_extern.h> 141 142 #include <arm/locore.h> 143 #include <arm/undefined.h> 144 #include <arm/arm32/machdep.h> 145 146 #include <machine/db_machdep.h> 147 #include <ddb/db_extern.h> 148 149 #include <machine/bootconfig.h> 150 151 #ifdef KGDB 152 #include <sys/kgdb.h> 153 #endif 154 155 #ifdef VERBOSE_INIT_ARM 156 #define VPRINTF(...) printf(__VA_ARGS__) 157 #else 158 #define VPRINTF(...) __nothing 159 #endif 160 161 vaddr_t 162 initarm_common(vaddr_t kvm_base, vsize_t kvm_size, 163 const struct boot_physmem *bp, size_t nbp) 164 { 165 struct bootmem_info * const bmi = &bootmem_info; 166 167 VPRINTF("nfreeblocks = %u, free_pages = %d (%#x)\n", 168 bmi->bmi_nfreeblocks, bmi->bmi_freepages, 169 bmi->bmi_freepages); 170 171 /* 172 * Moved from cpu_startup() as data_abort_handler() references 173 * this during uvm init. 174 */ 175 uvm_lwp_setuarea(&lwp0, kernelstack.pv_va); 176 177 struct lwp * const l = &lwp0; 178 struct pcb * const pcb = lwp_getpcb(l); 179 180 /* Zero out the PCB. */ 181 memset(pcb, 0, sizeof(*pcb)); 182 183 pcb->pcb_ksp = uvm_lwp_getuarea(l) + USPACE_SVC_STACK_TOP; 184 pcb->pcb_ksp -= sizeof(struct trapframe); 185 186 struct trapframe * tf = (struct trapframe *)pcb->pcb_ksp; 187 188 /* Zero out the trapframe. */ 189 memset(tf, 0, sizeof(*tf)); 190 lwp_settrapframe(l, tf); 191 192 #if defined(__ARMEB__) 193 tf->tf_spsr = PSR_USR32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0); 194 #else 195 tf->tf_spsr = PSR_USR32_MODE; 196 #endif 197 198 VPRINTF("bootstrap done.\n"); 199 200 VPRINTF("vectors"); 201 arm32_vector_init(systempage.pv_va, ARM_VEC_ALL); 202 VPRINTF(" %#"PRIxVADDR"\n", vector_page); 203 204 /* 205 * Pages were allocated during the secondary bootstrap for the 206 * stacks for different CPU modes. 207 * We must now set the r13 registers in the different CPU modes to 208 * point to these stacks. 209 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 210 * of the stack memory. 211 */ 212 VPRINTF("init subsystems: stacks "); 213 set_stackptr(PSR_FIQ32_MODE, 214 fiqstack.pv_va + FIQ_STACK_SIZE * PAGE_SIZE); 215 set_stackptr(PSR_IRQ32_MODE, 216 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 217 set_stackptr(PSR_ABT32_MODE, 218 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 219 set_stackptr(PSR_UND32_MODE, 220 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 221 222 /* 223 * Well we should set a data abort handler. 224 * Once things get going this will change as we will need a proper 225 * handler. 226 * Until then we will use a handler that just panics but tells us 227 * why. 228 * Initialisation of the vectors will just panic on a data abort. 229 * This just fills in a slightly better one. 230 */ 231 VPRINTF("vectors "); 232 data_abort_handler_address = (u_int)data_abort_handler; 233 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 234 undefined_handler_address = (u_int)undefinedinstruction_bounce; 235 236 /* Initialise the undefined instruction handlers */ 237 VPRINTF("undefined "); 238 undefined_init(); 239 240 /* Load memory into UVM. */ 241 VPRINTF("page "); 242 uvm_md_init(); 243 244 VPRINTF("pmap_physload\n"); 245 KASSERT(bp != NULL || nbp == 0); 246 KASSERT(bp == NULL || nbp != 0); 247 248 for (size_t i = 0; i < bmi->bmi_nfreeblocks; i++) { 249 pv_addr_t * const pv = &bmi->bmi_freeblocks[i]; 250 paddr_t start = atop(pv->pv_pa); 251 const paddr_t end = start + atop(pv->pv_size); 252 int vm_freelist = VM_FREELIST_DEFAULT; 253 254 VPRINTF("block %2zu start %08lx end %08lx", i, 255 pv->pv_pa, pv->pv_pa + pv->pv_size); 256 257 if (!bp) { 258 VPRINTF("... loading in freelist %d\n", vm_freelist); 259 uvm_page_physload(start, end, start, end, VM_FREELIST_DEFAULT); 260 continue; 261 } 262 VPRINTF("\n"); 263 paddr_t segend = end; 264 for (size_t j = 0; j < nbp; j++ /*, start = segend, segend = end */) { 265 paddr_t bp_start = bp[j].bp_start; 266 paddr_t bp_end = bp_start + bp[j].bp_pages; 267 268 VPRINTF(" bp %2zu start %08lx end %08lx\n", 269 j, ptoa(bp_start), ptoa(bp_end)); 270 KASSERT(bp_start < bp_end); 271 if (start > bp_end || segend < bp_start) 272 continue; 273 274 if (start < bp_start) 275 start = bp_start; 276 277 if (start < bp_end) { 278 if (segend > bp_end) { 279 segend = bp_end; 280 } 281 vm_freelist = bp[j].bp_freelist; 282 283 uvm_page_physload(start, segend, start, segend, 284 vm_freelist); 285 VPRINTF(" start %08lx end %08lx" 286 "... loading in freelist %d\n", ptoa(start), 287 ptoa(segend), vm_freelist); 288 start = segend; 289 segend = end; 290 } 291 } 292 } 293 294 /* Boot strap pmap telling it where the managed kernel virtual memory is */ 295 VPRINTF("pmap "); 296 pmap_bootstrap(kvm_base, kvm_base + kvm_size); 297 298 #ifdef __HAVE_MEMORY_DISK__ 299 md_root_setconf(memory_disk, sizeof memory_disk); 300 #endif 301 302 #ifdef BOOTHOWTO 303 boothowto |= BOOTHOWTO; 304 #endif 305 306 #ifdef KGDB 307 if (boothowto & RB_KDB) { 308 kgdb_debug_init = 1; 309 kgdb_connect(1); 310 } 311 #endif 312 313 #ifdef DDB 314 db_machine_init(); 315 ddb_init(0, NULL, NULL); 316 317 if (boothowto & RB_KDB) 318 Debugger(); 319 #endif 320 321 #ifdef MULTIPROCESSOR 322 /* 323 * Ensure BP cache is flushed to memory so that APs start cache 324 * coherency with correct view. 325 */ 326 cpu_dcache_wbinv_all(); 327 #endif 328 329 VPRINTF("done.\n"); 330 331 /* We return the new stack pointer address */ 332 return pcb->pcb_ksp; 333 } 334 335 #ifdef MULTIPROCESSOR 336 /* 337 * When we are called, the MMU and caches are on and we are running on the stack 338 * of the idlelwp for this cpu. 339 */ 340 void 341 cpu_hatch(struct cpu_info *ci, u_int cpuindex, void (*md_cpu_init)(struct cpu_info *)) 342 { 343 KASSERT(cpu_index(ci) == cpuindex); 344 345 /* 346 * Raise our IPL to the max 347 */ 348 splhigh(); 349 350 VPRINTF("%s(%s): ", __func__, cpu_name(ci)); 351 /* mpidr/midr filled in by armv7_mpcontinuation */ 352 ci->ci_ctrl = armreg_sctlr_read(); 353 ci->ci_arm_cpuid = cpu_idnum(); 354 ci->ci_arm_cputype = ci->ci_arm_cpuid & CPU_ID_CPU_MASK; 355 ci->ci_arm_cpurev = ci->ci_arm_cpuid & CPU_ID_REVISION_MASK; 356 357 /* 358 * Make sure we have the right vector page. 359 */ 360 VPRINTF(" vectors"); 361 arm32_vector_init(systempage.pv_va, ARM_VEC_ALL); 362 363 /* 364 * Initialize the stack for each mode (we are already running on the 365 * SVC32 stack of the idlelwp). 366 */ 367 VPRINTF(" stacks"); 368 set_stackptr(PSR_FIQ32_MODE, 369 fiqstack.pv_va + (cpu_index(ci) + 1) * FIQ_STACK_SIZE * PAGE_SIZE); 370 set_stackptr(PSR_IRQ32_MODE, 371 irqstack.pv_va + (cpu_index(ci) + 1) * IRQ_STACK_SIZE * PAGE_SIZE); 372 set_stackptr(PSR_ABT32_MODE, 373 abtstack.pv_va + (cpu_index(ci) + 1) * ABT_STACK_SIZE * PAGE_SIZE); 374 set_stackptr(PSR_UND32_MODE, 375 undstack.pv_va + (cpu_index(ci) + 1) * UND_STACK_SIZE * PAGE_SIZE); 376 377 ci->ci_lastlwp = NULL; 378 ci->ci_pmap_lastuser = NULL; 379 #ifdef ARM_MMU_EXTENDED 380 VPRINTF(" tlb"); 381 /* 382 * Attach to the tlb. 383 */ 384 ci->ci_pmap_cur = pmap_kernel(); 385 ci->ci_pmap_asid_cur = KERNEL_PID; 386 #endif 387 388 #ifdef CPU_CORTEX 389 if (CPU_ID_CORTEX_P(ci->ci_arm_cpuid)) { 390 /* 391 * Start and reset the PMC Cycle Counter. 392 */ 393 armreg_pmcr_write(ARM11_PMCCTL_E|ARM11_PMCCTL_P|ARM11_PMCCTL_C); 394 armreg_pmcntenset_write(CORTEX_CNTENS_C); 395 } 396 #endif 397 398 mutex_enter(&cpu_hatch_lock); 399 400 aprint_naive("%s", device_xname(ci->ci_dev)); 401 aprint_normal("%s", device_xname(ci->ci_dev)); 402 identify_arm_cpu(ci->ci_dev, ci); 403 VPRINTF(" vfp"); 404 vfp_attach(ci); 405 406 mutex_exit(&cpu_hatch_lock); 407 408 VPRINTF(" md(%p)", md_cpu_init); 409 if (md_cpu_init != NULL) 410 (*md_cpu_init)(ci); 411 412 VPRINTF(" interrupts"); 413 /* 414 * Let the interrupts do what they need to on this CPU. 415 */ 416 intr_cpu_init(ci); 417 418 VPRINTF(" done!\n"); 419 420 cpu_clr_mbox(cpuindex); 421 } 422 #endif /* MULTIPROCESSOR */ 423
Indexes created Thu Oct 02 10:09:58 GMT 2025