arm32_boot.c revision 1.39 1 /* $NetBSD: arm32_boot.c,v 1.39 2020/07/10 12:25:09 skrll Exp $ */
2
3 /*
4 * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved.
5 * Written by Hiroyuki Bessho for Genetec Corporation.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of Genetec Corporation may not be used to endorse or
16 * promote products derived from this software without specific prior
17 * written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 *
31 * Copyright (c) 2001 Wasabi Systems, Inc.
32 * All rights reserved.
33 *
34 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. All advertising materials mentioning features or use of this software
45 * must display the following acknowledgement:
46 * This product includes software developed for the NetBSD Project by
47 * Wasabi Systems, Inc.
48 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
49 * or promote products derived from this software without specific prior
50 * written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
54 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
55 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
56 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
62 * POSSIBILITY OF SUCH DAMAGE.
63 *
64 * Copyright (c) 1997,1998 Mark Brinicombe.
65 * Copyright (c) 1997,1998 Causality Limited.
66 * All rights reserved.
67 *
68 * Redistribution and use in source and binary forms, with or without
69 * modification, are permitted provided that the following conditions
70 * are met:
71 * 1. Redistributions of source code must retain the above copyright
72 * notice, this list of conditions and the following disclaimer.
73 * 2. Redistributions in binary form must reproduce the above copyright
74 * notice, this list of conditions and the following disclaimer in the
75 * documentation and/or other materials provided with the distribution.
76 * 3. All advertising materials mentioning features or use of this software
77 * must display the following acknowledgement:
78 * This product includes software developed by Mark Brinicombe
79 * for the NetBSD Project.
80 * 4. The name of the company nor the name of the author may be used to
81 * endorse or promote products derived from this software without specific
82 * prior written permission.
83 *
84 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
85 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
86 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
87 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
88 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
89 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
91 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
92 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
93 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
94 * SUCH DAMAGE.
95 *
96 * Copyright (c) 2007 Microsoft
97 * All rights reserved.
98 *
99 * Redistribution and use in source and binary forms, with or without
100 * modification, are permitted provided that the following conditions
101 * are met:
102 * 1. Redistributions of source code must retain the above copyright
103 * notice, this list of conditions and the following disclaimer.
104 * 2. Redistributions in binary form must reproduce the above copyright
105 * notice, this list of conditions and the following disclaimer in the
106 * documentation and/or other materials provided with the distribution.
107 * 3. All advertising materials mentioning features or use of this software
108 * must display the following acknowledgement:
109 * This product includes software developed by Microsoft
110 *
111 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
112 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
113 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
114 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
115 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
116 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
117 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
118 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
119 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
120 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
121 * SUCH DAMAGE.
122 */
123
124 #include <sys/cdefs.h>
125 __KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.39 2020/07/10 12:25:09 skrll Exp $");
126
127 #include "opt_arm_debug.h"
128 #include "opt_cputypes.h"
129 #include "opt_ddb.h"
130 #include "opt_kgdb.h"
131 #include "opt_multiprocessor.h"
132
133 #include <sys/param.h>
134
135 #include <sys/asan.h>
136 #include <sys/atomic.h>
137 #include <sys/cpu.h>
138 #include <sys/device.h>
139 #include <sys/intr.h>
140 #include <sys/reboot.h>
141
142 #include <uvm/uvm_extern.h>
143
144 #include <arm/locore.h>
145 #include <arm/undefined.h>
146 #include <arm/arm32/machdep.h>
147
148 #include <machine/db_machdep.h>
149 #include <ddb/db_extern.h>
150
151 #include <machine/bootconfig.h>
152
153 #ifdef KGDB
154 #include <sys/kgdb.h>
155 #endif
156
157 #ifdef VERBOSE_INIT_ARM
158 #define VPRINTF(...) printf(__VA_ARGS__)
159 #else
160 #define VPRINTF(...) __nothing
161 #endif
162
163 vaddr_t
164 initarm_common(vaddr_t kvm_base, vsize_t kvm_size,
165 const struct boot_physmem *bp, size_t nbp)
166 {
167 struct bootmem_info * const bmi = &bootmem_info;
168
169 VPRINTF("nfreeblocks = %u, free_pages = %d (%#x)\n",
170 bmi->bmi_nfreeblocks, bmi->bmi_freepages,
171 bmi->bmi_freepages);
172
173 /*
174 * Moved from cpu_startup() as data_abort_handler() references
175 * this during uvm init.
176 */
177 uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
178
179 struct lwp * const l = &lwp0;
180 struct pcb * const pcb = lwp_getpcb(l);
181
182 /* Zero out the PCB. */
183 memset(pcb, 0, sizeof(*pcb));
184
185 pcb->pcb_ksp = uvm_lwp_getuarea(l) + USPACE_SVC_STACK_TOP;
186 pcb->pcb_ksp -= sizeof(struct trapframe);
187
188 struct trapframe * tf = (struct trapframe *)pcb->pcb_ksp;
189
190 /* Zero out the trapframe. */
191 memset(tf, 0, sizeof(*tf));
192 lwp_settrapframe(l, tf);
193
194 #if defined(__ARMEB__)
195 tf->tf_spsr = PSR_USR32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0);
196 #else
197 tf->tf_spsr = PSR_USR32_MODE;
198 #endif
199
200 VPRINTF("bootstrap done.\n");
201
202 VPRINTF("vectors");
203 arm32_vector_init(systempage.pv_va, ARM_VEC_ALL);
204 VPRINTF(" %#"PRIxVADDR"\n", vector_page);
205
206 /*
207 * Pages were allocated during the secondary bootstrap for the
208 * stacks for different CPU modes.
209 * We must now set the r13 registers in the different CPU modes to
210 * point to these stacks.
211 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
212 * of the stack memory.
213 */
214 VPRINTF("init subsystems: stacks ");
215 set_stackptr(PSR_FIQ32_MODE,
216 fiqstack.pv_va + FIQ_STACK_SIZE * PAGE_SIZE);
217 set_stackptr(PSR_IRQ32_MODE,
218 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
219 set_stackptr(PSR_ABT32_MODE,
220 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
221 set_stackptr(PSR_UND32_MODE,
222 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
223
224 /*
225 * Well we should set a data abort handler.
226 * Once things get going this will change as we will need a proper
227 * handler.
228 * Until then we will use a handler that just panics but tells us
229 * why.
230 * Initialisation of the vectors will just panic on a data abort.
231 * This just fills in a slightly better one.
232 */
233 VPRINTF("vectors ");
234 data_abort_handler_address = (u_int)data_abort_handler;
235 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
236 undefined_handler_address = (u_int)undefinedinstruction_bounce;
237
238 /* Initialise the undefined instruction handlers */
239 VPRINTF("undefined ");
240 undefined_init();
241
242 /* Load memory into UVM. */
243 VPRINTF("page ");
244 uvm_md_init();
245
246 VPRINTF("pmap_physload\n");
247 KASSERT(bp != NULL || nbp == 0);
248 KASSERT(bp == NULL || nbp != 0);
249
250 for (size_t i = 0; i < bmi->bmi_nfreeblocks; i++) {
251 pv_addr_t * const pv = &bmi->bmi_freeblocks[i];
252 paddr_t start = atop(pv->pv_pa);
253 const paddr_t end = start + atop(pv->pv_size);
254 int vm_freelist = VM_FREELIST_DEFAULT;
255
256 VPRINTF("block %2zu start %08lx end %08lx", i,
257 pv->pv_pa, pv->pv_pa + pv->pv_size);
258
259 if (!bp) {
260 VPRINTF("... loading in freelist %d\n", vm_freelist);
261 uvm_page_physload(start, end, start, end, VM_FREELIST_DEFAULT);
262 continue;
263 }
264 VPRINTF("\n");
265 paddr_t segend = end;
266 for (size_t j = 0; j < nbp; j++ /*, start = segend, segend = end */) {
267 paddr_t bp_start = bp[j].bp_start;
268 paddr_t bp_end = bp_start + bp[j].bp_pages;
269
270 VPRINTF(" bp %2zu start %08lx end %08lx\n",
271 j, ptoa(bp_start), ptoa(bp_end));
272 KASSERT(bp_start < bp_end);
273 if (start > bp_end || segend < bp_start)
274 continue;
275
276 if (start < bp_start)
277 start = bp_start;
278
279 if (start < bp_end) {
280 if (segend > bp_end) {
281 segend = bp_end;
282 }
283 vm_freelist = bp[j].bp_freelist;
284
285 uvm_page_physload(start, segend, start, segend,
286 vm_freelist);
287 VPRINTF(" start %08lx end %08lx"
288 "... loading in freelist %d\n", ptoa(start),
289 ptoa(segend), vm_freelist);
290 start = segend;
291 segend = end;
292 }
293 }
294 }
295
296 /* Boot strap pmap telling it where the managed kernel virtual memory is */
297 VPRINTF("pmap ");
298 pmap_bootstrap(kvm_base, kvm_base + kvm_size);
299
300 kasan_init();
301
302 #ifdef __HAVE_MEMORY_DISK__
303 md_root_setconf(memory_disk, sizeof memory_disk);
304 #endif
305
306 #ifdef BOOTHOWTO
307 boothowto |= BOOTHOWTO;
308 #endif
309
310 #ifdef KGDB
311 if (boothowto & RB_KDB) {
312 kgdb_debug_init = 1;
313 kgdb_connect(1);
314 }
315 #endif
316
317 #ifdef DDB
318 db_machine_init();
319 ddb_init(0, NULL, NULL);
320
321 if (boothowto & RB_KDB)
322 Debugger();
323 #endif
324
325 #ifdef MULTIPROCESSOR
326 /*
327 * Ensure BP cache is flushed to memory so that APs start cache
328 * coherency with correct view.
329 */
330 cpu_dcache_wbinv_all();
331 #endif
332
333 VPRINTF("done.\n");
334
335 /* We return the new stack pointer address */
336 return pcb->pcb_ksp;
337 }
338
339 #ifdef MULTIPROCESSOR
340 /*
341 * When we are called, the MMU and caches are on and we are running on the stack
342 * of the idlelwp for this cpu.
343 */
344 void
345 cpu_hatch(struct cpu_info *ci, u_int cpuindex, void (*md_cpu_init)(struct cpu_info *))
346 {
347 KASSERT(cpu_index(ci) == cpuindex);
348
349 /*
350 * Raise our IPL to the max
351 */
352 splhigh();
353
354 VPRINTF("%s(%s): ", __func__, cpu_name(ci));
355 /* mpidr/midr filled in by armv7_mpcontinuation */
356 ci->ci_ctrl = armreg_sctlr_read();
357 ci->ci_arm_cpuid = cpu_idnum();
358 ci->ci_arm_cputype = ci->ci_arm_cpuid & CPU_ID_CPU_MASK;
359 ci->ci_arm_cpurev = ci->ci_arm_cpuid & CPU_ID_REVISION_MASK;
360
361 /*
362 * Make sure we have the right vector page.
363 */
364 VPRINTF(" vectors");
365 arm32_vector_init(systempage.pv_va, ARM_VEC_ALL);
366
367 /*
368 * Initialize the stack for each mode (we are already running on the
369 * SVC32 stack of the idlelwp).
370 */
371 VPRINTF(" stacks");
372 set_stackptr(PSR_FIQ32_MODE,
373 fiqstack.pv_va + (cpu_index(ci) + 1) * FIQ_STACK_SIZE * PAGE_SIZE);
374 set_stackptr(PSR_IRQ32_MODE,
375 irqstack.pv_va + (cpu_index(ci) + 1) * IRQ_STACK_SIZE * PAGE_SIZE);
376 set_stackptr(PSR_ABT32_MODE,
377 abtstack.pv_va + (cpu_index(ci) + 1) * ABT_STACK_SIZE * PAGE_SIZE);
378 set_stackptr(PSR_UND32_MODE,
379 undstack.pv_va + (cpu_index(ci) + 1) * UND_STACK_SIZE * PAGE_SIZE);
380
381 ci->ci_lastlwp = NULL;
382 ci->ci_pmap_lastuser = NULL;
383 #ifdef ARM_MMU_EXTENDED
384 VPRINTF(" tlb");
385 /*
386 * Attach to the tlb.
387 */
388 ci->ci_pmap_cur = pmap_kernel();
389 ci->ci_pmap_asid_cur = KERNEL_PID;
390 #endif
391
392 #ifdef CPU_CORTEX
393 if (CPU_ID_CORTEX_P(ci->ci_arm_cpuid)) {
394 /*
395 * Start and reset the PMC Cycle Counter.
396 */
397 armreg_pmcr_write(ARM11_PMCCTL_E|ARM11_PMCCTL_P|ARM11_PMCCTL_C);
398 armreg_pmcntenset_write(CORTEX_CNTENS_C);
399 }
400 #endif
401
402 mutex_enter(&cpu_hatch_lock);
403
404 aprint_naive("%s", device_xname(ci->ci_dev));
405 aprint_normal("%s", device_xname(ci->ci_dev));
406 identify_arm_cpu(ci->ci_dev, ci);
407 VPRINTF(" vfp");
408 vfp_attach(ci);
409
410 mutex_exit(&cpu_hatch_lock);
411
412 VPRINTF(" md(%p)", md_cpu_init);
413 if (md_cpu_init != NULL)
414 (*md_cpu_init)(ci);
415
416 VPRINTF(" interrupts");
417 /*
418 * Let the interrupts do what they need to on this CPU.
419 */
420 intr_cpu_init(ci);
421
422 VPRINTF(" done!\n");
423
424 cpu_clr_mbox(cpuindex);
425 }
426 #endif /* MULTIPROCESSOR */
427