arm32_kvminit.c revision 1.37
1 /* $NetBSD: arm32_kvminit.c,v 1.37 2015/11/25 08:36:50 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. 5 * Written by Hiroyuki Bessho for Genetec Corporation. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of Genetec Corporation may not be used to endorse or 16 * promote products derived from this software without specific prior 17 * written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 * 31 * Copyright (c) 2001 Wasabi Systems, Inc. 32 * All rights reserved. 33 * 34 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed for the NetBSD Project by 47 * Wasabi Systems, Inc. 48 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 49 * or promote products derived from this software without specific prior 50 * written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 54 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 55 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 56 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 62 * POSSIBILITY OF SUCH DAMAGE. 63 * 64 * Copyright (c) 1997,1998 Mark Brinicombe. 65 * Copyright (c) 1997,1998 Causality Limited. 66 * All rights reserved. 67 * 68 * Redistribution and use in source and binary forms, with or without 69 * modification, are permitted provided that the following conditions 70 * are met: 71 * 1. Redistributions of source code must retain the above copyright 72 * notice, this list of conditions and the following disclaimer. 73 * 2. Redistributions in binary form must reproduce the above copyright 74 * notice, this list of conditions and the following disclaimer in the 75 * documentation and/or other materials provided with the distribution. 76 * 3. All advertising materials mentioning features or use of this software 77 * must display the following acknowledgement: 78 * This product includes software developed by Mark Brinicombe 79 * for the NetBSD Project. 80 * 4. The name of the company nor the name of the author may be used to 81 * endorse or promote products derived from this software without specific 82 * prior written permission. 83 * 84 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 85 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 86 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 87 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 88 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 89 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 91 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 92 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 93 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 94 * SUCH DAMAGE. 95 * 96 * Copyright (c) 2007 Microsoft 97 * All rights reserved. 98 * 99 * Redistribution and use in source and binary forms, with or without 100 * modification, are permitted provided that the following conditions 101 * are met: 102 * 1. Redistributions of source code must retain the above copyright 103 * notice, this list of conditions and the following disclaimer. 104 * 2. Redistributions in binary form must reproduce the above copyright 105 * notice, this list of conditions and the following disclaimer in the 106 * documentation and/or other materials provided with the distribution. 107 * 3. All advertising materials mentioning features or use of this software 108 * must display the following acknowledgement: 109 * This product includes software developed by Microsoft 110 * 111 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 112 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 113 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 114 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT, 115 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 116 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 117 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 118 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 119 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 120 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 121 * SUCH DAMAGE. 122 */ 123 124 #include "opt_multiprocessor.h" 125 126 #include <sys/cdefs.h> 127 __KERNEL_RCSID(0, "$NetBSD: arm32_kvminit.c,v 1.37 2015/11/25 08:36:50 skrll Exp $"); 128 129 #include <sys/param.h> 130 #include <sys/device.h> 131 #include <sys/kernel.h> 132 #include <sys/reboot.h> 133 #include <sys/bus.h> 134 135 #include <dev/cons.h> 136 137 #include <uvm/uvm_extern.h> 138 139 #include <arm/locore.h> 140 #include <arm/db_machdep.h> 141 #include <arm/undefined.h> 142 #include <arm/bootconfig.h> 143 #include <arm/arm32/machdep.h> 144 145 struct bootmem_info bootmem_info; 146 147 extern void *msgbufaddr; 148 paddr_t msgbufphys; 149 paddr_t physical_start; 150 paddr_t physical_end; 151 152 extern char etext[]; 153 extern char __data_start[], _edata[]; 154 extern char __bss_start[], __bss_end__[]; 155 extern char _end[]; 156 157 /* Page tables for mapping kernel VM */ 158 #define KERNEL_L2PT_VMDATA_NUM 8 /* start with 32MB of KVM */ 159 160 /* 161 * Macros to translate between physical and virtual for a subset of the 162 * kernel address space. *Not* for general use. 163 */ 164 #if defined(KERNEL_BASE_VOFFSET) 165 #define KERN_VTOPHYS(bmi, va) \ 166 ((paddr_t)((vaddr_t)(va) - KERNEL_BASE_VOFFSET)) 167 #define KERN_PHYSTOV(bmi, pa) \ 168 ((vaddr_t)((paddr_t)(pa) + KERNEL_BASE_VOFFSET)) 169 #else 170 #define KERN_VTOPHYS(bmi, va) \ 171 ((paddr_t)((vaddr_t)(va) - KERNEL_BASE + (bmi)->bmi_start)) 172 #define KERN_PHYSTOV(bmi, pa) \ 173 ((vaddr_t)((paddr_t)(pa) - (bmi)->bmi_start + KERNEL_BASE)) 174 #endif 175 176 void 177 arm32_bootmem_init(paddr_t memstart, psize_t memsize, vsize_t kernelstart) 178 { 179 struct bootmem_info * const bmi = &bootmem_info; 180 pv_addr_t *pv = bmi->bmi_freeblocks; 181 182 #ifdef VERBOSE_INIT_ARM 183 printf("%s: memstart=%#lx, memsize=%#lx, kernelstart=%#lx\n", 184 __func__, memstart, memsize, kernelstart); 185 #endif 186 187 physical_start = bmi->bmi_start = memstart; 188 physical_end = bmi->bmi_end = memstart + memsize; 189 #ifndef ARM_HAS_LPAE 190 if (physical_end == 0) { 191 physical_end = -PAGE_SIZE; 192 memsize -= PAGE_SIZE; 193 bmi->bmi_end -= PAGE_SIZE; 194 #ifdef VERBOSE_INIT_ARM 195 printf("%s: memsize shrunk by a page to avoid ending at 4GB\n", 196 __func__); 197 #endif 198 } 199 #endif 200 physmem = memsize / PAGE_SIZE; 201 202 /* 203 * Let's record where the kernel lives. 204 */ 205 bmi->bmi_kernelstart = kernelstart; 206 bmi->bmi_kernelend = KERN_VTOPHYS(bmi, round_page((vaddr_t)_end)); 207 208 #ifdef VERBOSE_INIT_ARM 209 printf("%s: kernelend=%#lx\n", __func__, bmi->bmi_kernelend); 210 #endif 211 212 /* 213 * Now the rest of the free memory must be after the kernel. 214 */ 215 pv->pv_pa = bmi->bmi_kernelend; 216 pv->pv_va = KERN_PHYSTOV(bmi, pv->pv_pa); 217 pv->pv_size = bmi->bmi_end - bmi->bmi_kernelend; 218 bmi->bmi_freepages += pv->pv_size / PAGE_SIZE; 219 #ifdef VERBOSE_INIT_ARM 220 printf("%s: adding %lu free pages: [%#lx..%#lx] (VA %#lx)\n", 221 __func__, pv->pv_size / PAGE_SIZE, pv->pv_pa, 222 pv->pv_pa + pv->pv_size - 1, pv->pv_va); 223 #endif 224 pv++; 225 226 /* 227 * Add a free block for any memory before the kernel. 228 */ 229 if (bmi->bmi_start < bmi->bmi_kernelstart) { 230 pv->pv_pa = bmi->bmi_start; 231 pv->pv_va = KERN_PHYSTOV(bmi, pv->pv_pa); 232 pv->pv_size = bmi->bmi_kernelstart - pv->pv_pa; 233 bmi->bmi_freepages += pv->pv_size / PAGE_SIZE; 234 #ifdef VERBOSE_INIT_ARM 235 printf("%s: adding %lu free pages: [%#lx..%#lx] (VA %#lx)\n", 236 __func__, pv->pv_size / PAGE_SIZE, pv->pv_pa, 237 pv->pv_pa + pv->pv_size - 1, pv->pv_va); 238 #endif 239 pv++; 240 } 241 242 bmi->bmi_nfreeblocks = pv - bmi->bmi_freeblocks; 243 244 SLIST_INIT(&bmi->bmi_freechunks); 245 SLIST_INIT(&bmi->bmi_chunks); 246 } 247 248 static bool 249 concat_pvaddr(pv_addr_t *acc_pv, pv_addr_t *pv) 250 { 251 if (acc_pv->pv_pa + acc_pv->pv_size == pv->pv_pa 252 && acc_pv->pv_va + acc_pv->pv_size == pv->pv_va 253 && acc_pv->pv_prot == pv->pv_prot 254 && acc_pv->pv_cache == pv->pv_cache) { 255 #ifdef VERBOSE_INIT_ARMX 256 printf("%s: appending pv %p (%#lx..%#lx) to %#lx..%#lx\n", 257 __func__, pv, pv->pv_pa, pv->pv_pa + pv->pv_size + 1, 258 acc_pv->pv_pa, acc_pv->pv_pa + acc_pv->pv_size + 1); 259 #endif 260 acc_pv->pv_size += pv->pv_size; 261 return true; 262 } 263 264 return false; 265 } 266 267 static void 268 add_pages(struct bootmem_info *bmi, pv_addr_t *pv) 269 { 270 pv_addr_t **pvp = &SLIST_FIRST(&bmi->bmi_chunks); 271 while ((*pvp) != NULL && (*pvp)->pv_va <= pv->pv_va) { 272 pv_addr_t * const pv0 = (*pvp); 273 KASSERT(SLIST_NEXT(pv0, pv_list) == NULL || pv0->pv_pa < SLIST_NEXT(pv0, pv_list)->pv_pa); 274 if (concat_pvaddr(pv0, pv)) { 275 #ifdef VERBOSE_INIT_ARM 276 printf("%s: %s pv %p (%#lx..%#lx) to %#lx..%#lx\n", 277 __func__, "appending", pv, 278 pv->pv_pa, pv->pv_pa + pv->pv_size - 1, 279 pv0->pv_pa, pv0->pv_pa + pv0->pv_size - pv->pv_size - 1); 280 #endif 281 pv = SLIST_NEXT(pv0, pv_list); 282 if (pv != NULL && concat_pvaddr(pv0, pv)) { 283 #ifdef VERBOSE_INIT_ARM 284 printf("%s: %s pv %p (%#lx..%#lx) to %#lx..%#lx\n", 285 __func__, "merging", pv, 286 pv->pv_pa, pv->pv_pa + pv->pv_size - 1, 287 pv0->pv_pa, 288 pv0->pv_pa + pv0->pv_size - pv->pv_size - 1); 289 #endif 290 SLIST_REMOVE_AFTER(pv0, pv_list); 291 SLIST_INSERT_HEAD(&bmi->bmi_freechunks, pv, pv_list); 292 } 293 return; 294 } 295 KASSERT(pv->pv_va != (*pvp)->pv_va); 296 pvp = &SLIST_NEXT(*pvp, pv_list); 297 } 298 KASSERT((*pvp) == NULL || pv->pv_va < (*pvp)->pv_va); 299 pv_addr_t * const new_pv = SLIST_FIRST(&bmi->bmi_freechunks); 300 KASSERT(new_pv != NULL); 301 SLIST_REMOVE_HEAD(&bmi->bmi_freechunks, pv_list); 302 *new_pv = *pv; 303 SLIST_NEXT(new_pv, pv_list) = *pvp; 304 (*pvp) = new_pv; 305 #ifdef VERBOSE_INIT_ARM 306 printf("%s: adding pv %p (pa %#lx, va %#lx, %lu pages) ", 307 __func__, new_pv, new_pv->pv_pa, new_pv->pv_va, 308 new_pv->pv_size / PAGE_SIZE); 309 if (SLIST_NEXT(new_pv, pv_list)) 310 printf("before pa %#lx\n", SLIST_NEXT(new_pv, pv_list)->pv_pa); 311 else 312 printf("at tail\n"); 313 #endif 314 } 315 316 static void 317 valloc_pages(struct bootmem_info *bmi, pv_addr_t *pv, size_t npages, 318 int prot, int cache, bool zero_p) 319 { 320 size_t nbytes = npages * PAGE_SIZE; 321 pv_addr_t *free_pv = bmi->bmi_freeblocks; 322 size_t free_idx = 0; 323 static bool l1pt_found; 324 325 KASSERT(npages > 0); 326 327 /* 328 * If we haven't allocated the kernel L1 page table and we are aligned 329 * at a L1 table boundary, alloc the memory for it. 330 */ 331 if (!l1pt_found 332 && (free_pv->pv_pa & (L1_TABLE_SIZE - 1)) == 0 333 && free_pv->pv_size >= L1_TABLE_SIZE) { 334 l1pt_found = true; 335 valloc_pages(bmi, &kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE, 336 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE, true); 337 add_pages(bmi, &kernel_l1pt); 338 } 339 340 while (nbytes > free_pv->pv_size) { 341 free_pv++; 342 free_idx++; 343 if (free_idx == bmi->bmi_nfreeblocks) { 344 panic("%s: could not allocate %zu bytes", 345 __func__, nbytes); 346 } 347 } 348 349 /* 350 * As we allocate the memory, make sure that we don't walk over 351 * our current first level translation table. 352 */ 353 KASSERT((armreg_ttbr_read() & ~(L1_TABLE_SIZE - 1)) != free_pv->pv_pa); 354 355 pv->pv_pa = free_pv->pv_pa; 356 pv->pv_va = free_pv->pv_va; 357 pv->pv_size = nbytes; 358 pv->pv_prot = prot; 359 pv->pv_cache = cache; 360 361 /* 362 * If PTE_PAGETABLE uses the same cache modes as PTE_CACHE 363 * just use PTE_CACHE. 364 */ 365 if (cache == PTE_PAGETABLE 366 && pte_l1_s_cache_mode == pte_l1_s_cache_mode_pt 367 && pte_l2_l_cache_mode == pte_l2_l_cache_mode_pt 368 && pte_l2_s_cache_mode == pte_l2_s_cache_mode_pt) 369 pv->pv_cache = PTE_CACHE; 370 371 free_pv->pv_pa += nbytes; 372 free_pv->pv_va += nbytes; 373 free_pv->pv_size -= nbytes; 374 if (free_pv->pv_size == 0) { 375 --bmi->bmi_nfreeblocks; 376 for (; free_idx < bmi->bmi_nfreeblocks; free_idx++) { 377 free_pv[0] = free_pv[1]; 378 } 379 } 380 381 bmi->bmi_freepages -= npages; 382 383 if (zero_p) 384 memset((void *)pv->pv_va, 0, nbytes); 385 } 386 387 void 388 arm32_kernel_vm_init(vaddr_t kernel_vm_base, vaddr_t vectors, vaddr_t iovbase, 389 const struct pmap_devmap *devmap, bool mapallmem_p) 390 { 391 struct bootmem_info * const bmi = &bootmem_info; 392 #ifdef MULTIPROCESSOR 393 const size_t cpu_num = arm_cpu_max; 394 #else 395 const size_t cpu_num = 1; 396 #endif 397 #ifdef ARM_HAS_VBAR 398 const bool map_vectors_p = false; 399 #elif defined(CPU_ARMV7) || defined(CPU_ARM11) 400 const bool map_vectors_p = vectors == ARM_VECTORS_HIGH 401 || (armreg_pfr1_read() & ARM_PFR1_SEC_MASK) == 0; 402 #else 403 const bool map_vectors_p = true; 404 #endif 405 406 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 407 KASSERT(mapallmem_p); 408 #ifdef ARM_MMU_EXTENDED 409 /* 410 * The direct map VA space ends at the start of the kernel VM space. 411 */ 412 pmap_directlimit = kernel_vm_base; 413 #else 414 KASSERT(kernel_vm_base - KERNEL_BASE >= physical_end - physical_start); 415 #endif /* ARM_MMU_EXTENDED */ 416 #endif /* __HAVE_MM_MD_DIRECT_MAPPED_PHYS */ 417 418 /* 419 * Calculate the number of L2 pages needed for mapping the 420 * kernel + data + stuff. Assume 2 L2 pages for kernel, 1 for vectors, 421 * and 1 for IO 422 */ 423 size_t kernel_size = bmi->bmi_kernelend; 424 kernel_size -= (bmi->bmi_kernelstart & -L2_S_SEGSIZE); 425 kernel_size += L1_TABLE_SIZE_REAL; 426 kernel_size += PAGE_SIZE * KERNEL_L2PT_VMDATA_NUM; 427 if (map_vectors_p) { 428 kernel_size += PAGE_SIZE; /* L2PT for VECTORS */ 429 } 430 if (iovbase) { 431 kernel_size += PAGE_SIZE; /* L2PT for IO */ 432 } 433 kernel_size += 434 cpu_num * (ABT_STACK_SIZE + FIQ_STACK_SIZE + IRQ_STACK_SIZE 435 + UND_STACK_SIZE + UPAGES) * PAGE_SIZE; 436 kernel_size += round_page(MSGBUFSIZE); 437 kernel_size += 0x10000; /* slop */ 438 if (!mapallmem_p) { 439 kernel_size += PAGE_SIZE 440 * ((kernel_size + L2_S_SEGSIZE - 1) / L2_S_SEGSIZE); 441 } 442 kernel_size = round_page(kernel_size); 443 444 /* 445 * Now we know how many L2 pages it will take. 446 */ 447 const size_t KERNEL_L2PT_KERNEL_NUM = 448 round_page(kernel_size + L2_S_SEGSIZE - 1) / L2_S_SEGSIZE; 449 450 #ifdef VERBOSE_INIT_ARM 451 printf("%s: %zu L2 pages are needed to map %#zx kernel bytes\n", 452 __func__, KERNEL_L2PT_KERNEL_NUM, kernel_size); 453 #endif 454 455 KASSERT(KERNEL_L2PT_KERNEL_NUM + KERNEL_L2PT_VMDATA_NUM < __arraycount(bmi->bmi_l2pts)); 456 pv_addr_t * const kernel_l2pt = bmi->bmi_l2pts; 457 pv_addr_t * const vmdata_l2pt = kernel_l2pt + KERNEL_L2PT_KERNEL_NUM; 458 pv_addr_t msgbuf; 459 pv_addr_t text; 460 pv_addr_t data; 461 pv_addr_t chunks[KERNEL_L2PT_KERNEL_NUM+KERNEL_L2PT_VMDATA_NUM+11]; 462 #if ARM_MMU_XSCALE == 1 463 pv_addr_t minidataclean; 464 #endif 465 466 /* 467 * We need to allocate some fixed page tables to get the kernel going. 468 * 469 * We are going to allocate our bootstrap pages from the beginning of 470 * the free space that we just calculated. We allocate one page 471 * directory and a number of page tables and store the physical 472 * addresses in the bmi_l2pts array in bootmem_info. 473 * 474 * The kernel page directory must be on a 16K boundary. The page 475 * tables must be on 4K boundaries. What we do is allocate the 476 * page directory on the first 16K boundary that we encounter, and 477 * the page tables on 4K boundaries otherwise. Since we allocate 478 * at least 3 L2 page tables, we are guaranteed to encounter at 479 * least one 16K aligned region. 480 */ 481 482 #ifdef VERBOSE_INIT_ARM 483 printf("%s: allocating page tables for", __func__); 484 #endif 485 for (size_t i = 0; i < __arraycount(chunks); i++) { 486 SLIST_INSERT_HEAD(&bmi->bmi_freechunks, &chunks[i], pv_list); 487 } 488 489 kernel_l1pt.pv_pa = 0; 490 kernel_l1pt.pv_va = 0; 491 492 /* 493 * Allocate the L2 pages, but if we get to a page that is aligned for 494 * an L1 page table, we will allocate the pages for it first and then 495 * allocate the L2 page. 496 */ 497 498 if (map_vectors_p) { 499 /* 500 * First allocate L2 page for the vectors. 501 */ 502 #ifdef VERBOSE_INIT_ARM 503 printf(" vector"); 504 #endif 505 valloc_pages(bmi, &bmi->bmi_vector_l2pt, 1, 506 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE, true); 507 add_pages(bmi, &bmi->bmi_vector_l2pt); 508 } 509 510 /* 511 * Now allocate L2 pages for the kernel 512 */ 513 #ifdef VERBOSE_INIT_ARM 514 printf(" kernel"); 515 #endif 516 for (size_t idx = 0; idx < KERNEL_L2PT_KERNEL_NUM; ++idx) { 517 valloc_pages(bmi, &kernel_l2pt[idx], 1, 518 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE, true); 519 add_pages(bmi, &kernel_l2pt[idx]); 520 } 521 522 /* 523 * Now allocate L2 pages for the initial kernel VA space. 524 */ 525 #ifdef VERBOSE_INIT_ARM 526 printf(" vm"); 527 #endif 528 for (size_t idx = 0; idx < KERNEL_L2PT_VMDATA_NUM; ++idx) { 529 valloc_pages(bmi, &vmdata_l2pt[idx], 1, 530 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE, true); 531 add_pages(bmi, &vmdata_l2pt[idx]); 532 } 533 534 /* 535 * If someone wanted a L2 page for I/O, allocate it now. 536 */ 537 if (iovbase) { 538 #ifdef VERBOSE_INIT_ARM 539 printf(" io"); 540 #endif 541 valloc_pages(bmi, &bmi->bmi_io_l2pt, 1, 542 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE, true); 543 add_pages(bmi, &bmi->bmi_io_l2pt); 544 } 545 546 #ifdef VERBOSE_INIT_ARM 547 printf("%s: allocating stacks\n", __func__); 548 #endif 549 550 /* Allocate stacks for all modes and CPUs */ 551 valloc_pages(bmi, &abtstack, ABT_STACK_SIZE * cpu_num, 552 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE, true); 553 add_pages(bmi, &abtstack); 554 valloc_pages(bmi, &fiqstack, FIQ_STACK_SIZE * cpu_num, 555 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE, true); 556 add_pages(bmi, &fiqstack); 557 valloc_pages(bmi, &irqstack, IRQ_STACK_SIZE * cpu_num, 558 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE, true); 559 add_pages(bmi, &irqstack); 560 valloc_pages(bmi, &undstack, UND_STACK_SIZE * cpu_num, 561 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE, true); 562 add_pages(bmi, &undstack); 563 valloc_pages(bmi, &idlestack, UPAGES * cpu_num, /* SVC32 */ 564 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE, true); 565 add_pages(bmi, &idlestack); 566 valloc_pages(bmi, &kernelstack, UPAGES, /* SVC32 */ 567 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE, true); 568 add_pages(bmi, &kernelstack); 569 570 /* Allocate the message buffer from the end of memory. */ 571 const size_t msgbuf_pgs = round_page(MSGBUFSIZE) / PAGE_SIZE; 572 valloc_pages(bmi, &msgbuf, msgbuf_pgs, 573 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE, false); 574 add_pages(bmi, &msgbuf); 575 msgbufphys = msgbuf.pv_pa; 576 msgbufaddr = (void *)msgbuf.pv_va; 577 578 if (map_vectors_p) { 579 /* 580 * Allocate a page for the system vector page. 581 * This page will just contain the system vectors and can be 582 * shared by all processes. 583 */ 584 valloc_pages(bmi, &systempage, 1, VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, 585 PTE_CACHE, true); 586 } 587 systempage.pv_va = vectors; 588 589 /* 590 * If the caller needed a few extra pages for some reason, allocate 591 * them now. 592 */ 593 #if ARM_MMU_XSCALE == 1 594 #if (ARM_NMMUS > 1) 595 if (xscale_use_minidata) 596 #endif 597 valloc_pages(bmi, &minidataclean, 1, 598 VM_PROT_READ|VM_PROT_WRITE, 0, true); 599 #endif 600 601 /* 602 * Ok we have allocated physical pages for the primary kernel 603 * page tables and stacks. Let's just confirm that. 604 */ 605 if (kernel_l1pt.pv_va == 0 606 && (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0)) 607 panic("%s: Failed to allocate or align the kernel " 608 "page directory", __func__); 609 610 611 #ifdef VERBOSE_INIT_ARM 612 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 613 #endif 614 615 /* 616 * Now we start construction of the L1 page table 617 * We start by mapping the L2 page tables into the L1. 618 * This means that we can replace L1 mappings later on if necessary 619 */ 620 vaddr_t l1pt_va = kernel_l1pt.pv_va; 621 paddr_t l1pt_pa = kernel_l1pt.pv_pa; 622 623 if (map_vectors_p) { 624 /* Map the L2 pages tables in the L1 page table */ 625 pmap_link_l2pt(l1pt_va, systempage.pv_va & -L2_S_SEGSIZE, 626 &bmi->bmi_vector_l2pt); 627 #ifdef VERBOSE_INIT_ARM 628 printf("%s: adding L2 pt (VA %#lx, PA %#lx) " 629 "for VA %#lx\n (vectors)", 630 __func__, bmi->bmi_vector_l2pt.pv_va, 631 bmi->bmi_vector_l2pt.pv_pa, systempage.pv_va); 632 #endif 633 } 634 635 const vaddr_t kernel_base = 636 KERN_PHYSTOV(bmi, bmi->bmi_kernelstart & -L2_S_SEGSIZE); 637 for (size_t idx = 0; idx < KERNEL_L2PT_KERNEL_NUM; idx++) { 638 pmap_link_l2pt(l1pt_va, kernel_base + idx * L2_S_SEGSIZE, 639 &kernel_l2pt[idx]); 640 #ifdef VERBOSE_INIT_ARM 641 printf("%s: adding L2 pt (VA %#lx, PA %#lx) for VA %#lx (kernel)\n", 642 __func__, kernel_l2pt[idx].pv_va, 643 kernel_l2pt[idx].pv_pa, kernel_base + idx * L2_S_SEGSIZE); 644 #endif 645 } 646 647 for (size_t idx = 0; idx < KERNEL_L2PT_VMDATA_NUM; idx++) { 648 pmap_link_l2pt(l1pt_va, kernel_vm_base + idx * L2_S_SEGSIZE, 649 &vmdata_l2pt[idx]); 650 #ifdef VERBOSE_INIT_ARM 651 printf("%s: adding L2 pt (VA %#lx, PA %#lx) for VA %#lx (vm)\n", 652 __func__, vmdata_l2pt[idx].pv_va, vmdata_l2pt[idx].pv_pa, 653 kernel_vm_base + idx * L2_S_SEGSIZE); 654 #endif 655 } 656 if (iovbase) { 657 pmap_link_l2pt(l1pt_va, iovbase & -L2_S_SEGSIZE, &bmi->bmi_io_l2pt); 658 #ifdef VERBOSE_INIT_ARM 659 printf("%s: adding L2 pt (VA %#lx, PA %#lx) for VA %#lx (io)\n", 660 __func__, bmi->bmi_io_l2pt.pv_va, bmi->bmi_io_l2pt.pv_pa, 661 iovbase & -L2_S_SEGSIZE); 662 #endif 663 } 664 665 /* update the top of the kernel VM */ 666 pmap_curmaxkvaddr = 667 kernel_vm_base + (KERNEL_L2PT_VMDATA_NUM * L2_S_SEGSIZE); 668 669 #ifdef VERBOSE_INIT_ARM 670 printf("Mapping kernel\n"); 671 #endif 672 673 extern char etext[], _end[]; 674 size_t totalsize = bmi->bmi_kernelend - bmi->bmi_kernelstart; 675 size_t textsize = KERN_VTOPHYS(bmi, (uintptr_t)etext) - bmi->bmi_kernelstart; 676 677 textsize = (textsize + PGOFSET) & ~PGOFSET; 678 679 /* start at offset of kernel in RAM */ 680 681 text.pv_pa = bmi->bmi_kernelstart; 682 text.pv_va = KERN_PHYSTOV(bmi, bmi->bmi_kernelstart); 683 text.pv_size = textsize; 684 text.pv_prot = VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE; 685 text.pv_cache = PTE_CACHE; 686 687 #ifdef VERBOSE_INIT_ARM 688 printf("%s: adding chunk for kernel text %#lx..%#lx (VA %#lx)\n", 689 __func__, text.pv_pa, text.pv_pa + text.pv_size - 1, text.pv_va); 690 #endif 691 692 add_pages(bmi, &text); 693 694 data.pv_pa = text.pv_pa + textsize; 695 data.pv_va = text.pv_va + textsize; 696 data.pv_size = totalsize - textsize; 697 data.pv_prot = VM_PROT_READ|VM_PROT_WRITE; 698 data.pv_cache = PTE_CACHE; 699 700 #ifdef VERBOSE_INIT_ARM 701 printf("%s: adding chunk for kernel data/bss %#lx..%#lx (VA %#lx)\n", 702 __func__, data.pv_pa, data.pv_pa + data.pv_size - 1, data.pv_va); 703 #endif 704 705 add_pages(bmi, &data); 706 707 #ifdef VERBOSE_INIT_ARM 708 printf("Listing Chunks\n"); 709 710 pv_addr_t *lpv; 711 SLIST_FOREACH(lpv, &bmi->bmi_chunks, pv_list) { 712 printf("%s: pv %p: chunk VA %#lx..%#lx " 713 "(PA %#lx, prot %d, cache %d)\n", 714 __func__, lpv, lpv->pv_va, lpv->pv_va + lpv->pv_size - 1, 715 lpv->pv_pa, lpv->pv_prot, lpv->pv_cache); 716 } 717 printf("\nMapping Chunks\n"); 718 #endif 719 720 pv_addr_t cur_pv; 721 pv_addr_t *pv = SLIST_FIRST(&bmi->bmi_chunks); 722 if (!mapallmem_p || pv->pv_pa == bmi->bmi_start) { 723 cur_pv = *pv; 724 KASSERTMSG(cur_pv.pv_va >= KERNEL_BASE, "%#lx", cur_pv.pv_va); 725 pv = SLIST_NEXT(pv, pv_list); 726 } else { 727 cur_pv.pv_va = KERNEL_BASE; 728 cur_pv.pv_pa = KERN_VTOPHYS(bmi, cur_pv.pv_va); 729 cur_pv.pv_size = pv->pv_pa - cur_pv.pv_pa; 730 cur_pv.pv_prot = VM_PROT_READ | VM_PROT_WRITE; 731 cur_pv.pv_cache = PTE_CACHE; 732 } 733 while (pv != NULL) { 734 if (mapallmem_p) { 735 if (concat_pvaddr(&cur_pv, pv)) { 736 pv = SLIST_NEXT(pv, pv_list); 737 continue; 738 } 739 if (cur_pv.pv_pa + cur_pv.pv_size < pv->pv_pa) { 740 /* 741 * See if we can extend the current pv to emcompass the 742 * hole, and if so do it and retry the concatenation. 743 */ 744 if (cur_pv.pv_prot == (VM_PROT_READ|VM_PROT_WRITE) 745 && cur_pv.pv_cache == PTE_CACHE) { 746 cur_pv.pv_size = pv->pv_pa - cur_pv.pv_va; 747 continue; 748 } 749 750 /* 751 * We couldn't so emit the current chunk and then 752 */ 753 #ifdef VERBOSE_INIT_ARM 754 printf("%s: mapping chunk VA %#lx..%#lx " 755 "(PA %#lx, prot %d, cache %d)\n", 756 __func__, 757 cur_pv.pv_va, cur_pv.pv_va + cur_pv.pv_size - 1, 758 cur_pv.pv_pa, cur_pv.pv_prot, cur_pv.pv_cache); 759 #endif 760 pmap_map_chunk(l1pt_va, cur_pv.pv_va, cur_pv.pv_pa, 761 cur_pv.pv_size, cur_pv.pv_prot, cur_pv.pv_cache); 762 763 /* 764 * set the current chunk to the hole and try again. 765 */ 766 cur_pv.pv_pa += cur_pv.pv_size; 767 cur_pv.pv_va += cur_pv.pv_size; 768 cur_pv.pv_size = pv->pv_pa - cur_pv.pv_va; 769 cur_pv.pv_prot = VM_PROT_READ | VM_PROT_WRITE; 770 cur_pv.pv_cache = PTE_CACHE; 771 continue; 772 } 773 } 774 775 /* 776 * The new pv didn't concatenate so emit the current one 777 * and use the new pv as the current pv. 778 */ 779 #ifdef VERBOSE_INIT_ARM 780 printf("%s: mapping chunk VA %#lx..%#lx " 781 "(PA %#lx, prot %d, cache %d)\n", 782 __func__, cur_pv.pv_va, cur_pv.pv_va + cur_pv.pv_size - 1, 783 cur_pv.pv_pa, cur_pv.pv_prot, cur_pv.pv_cache); 784 #endif 785 pmap_map_chunk(l1pt_va, cur_pv.pv_va, cur_pv.pv_pa, 786 cur_pv.pv_size, cur_pv.pv_prot, cur_pv.pv_cache); 787 cur_pv = *pv; 788 pv = SLIST_NEXT(pv, pv_list); 789 } 790 791 /* 792 * If we are mapping all of memory, let's map the rest of memory. 793 */ 794 if (mapallmem_p && cur_pv.pv_pa + cur_pv.pv_size < bmi->bmi_end) { 795 if (cur_pv.pv_prot == (VM_PROT_READ | VM_PROT_WRITE) 796 && cur_pv.pv_cache == PTE_CACHE) { 797 cur_pv.pv_size = bmi->bmi_end - cur_pv.pv_pa; 798 } else { 799 KASSERTMSG(cur_pv.pv_va + cur_pv.pv_size <= kernel_vm_base, 800 "%#lx >= %#lx", cur_pv.pv_va + cur_pv.pv_size, 801 kernel_vm_base); 802 #ifdef VERBOSE_INIT_ARM 803 printf("%s: mapping chunk VA %#lx..%#lx " 804 "(PA %#lx, prot %d, cache %d)\n", 805 __func__, cur_pv.pv_va, cur_pv.pv_va + cur_pv.pv_size - 1, 806 cur_pv.pv_pa, cur_pv.pv_prot, cur_pv.pv_cache); 807 #endif 808 pmap_map_chunk(l1pt_va, cur_pv.pv_va, cur_pv.pv_pa, 809 cur_pv.pv_size, cur_pv.pv_prot, cur_pv.pv_cache); 810 cur_pv.pv_pa += cur_pv.pv_size; 811 cur_pv.pv_va += cur_pv.pv_size; 812 cur_pv.pv_size = bmi->bmi_end - cur_pv.pv_pa; 813 cur_pv.pv_prot = VM_PROT_READ | VM_PROT_WRITE; 814 cur_pv.pv_cache = PTE_CACHE; 815 } 816 } 817 818 // The amount we can direct is limited by the start of the 819 // virtual part of the kernel address space. Don't overrun 820 // into it. 821 if (mapallmem_p && cur_pv.pv_va + cur_pv.pv_size > kernel_vm_base) { 822 cur_pv.pv_size = kernel_vm_base - cur_pv.pv_va; 823 } 824 825 /* 826 * Now we map the final chunk. 827 */ 828 #ifdef VERBOSE_INIT_ARM 829 printf("%s: mapping last chunk VA %#lx..%#lx (PA %#lx, prot %d, cache %d)\n", 830 __func__, cur_pv.pv_va, cur_pv.pv_va + cur_pv.pv_size - 1, 831 cur_pv.pv_pa, cur_pv.pv_prot, cur_pv.pv_cache); 832 #endif 833 pmap_map_chunk(l1pt_va, cur_pv.pv_va, cur_pv.pv_pa, 834 cur_pv.pv_size, cur_pv.pv_prot, cur_pv.pv_cache); 835 836 /* 837 * Now we map the stuff that isn't directly after the kernel 838 */ 839 if (map_vectors_p) { 840 /* Map the vector page. */ 841 pmap_map_entry(l1pt_va, systempage.pv_va, systempage.pv_pa, 842 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE); 843 } 844 845 /* Map the Mini-Data cache clean area. */ 846 #if ARM_MMU_XSCALE == 1 847 #if (ARM_NMMUS > 1) 848 if (xscale_use_minidata) 849 #endif 850 xscale_setup_minidata(l1pt_va, minidataclean.pv_va, 851 minidataclean.pv_pa); 852 #endif 853 854 /* 855 * Map integrated peripherals at same address in first level page 856 * table so that we can continue to use console. 857 */ 858 if (devmap) 859 pmap_devmap_bootstrap(l1pt_va, devmap); 860 861 #ifdef VERBOSE_INIT_ARM 862 /* Tell the user about where all the bits and pieces live. */ 863 printf("%22s Physical Virtual Num\n", " "); 864 printf("%22s Starting Ending Starting Ending Pages\n", " "); 865 866 static const char mem_fmt[] = 867 "%20s: 0x%08lx 0x%08lx 0x%08lx 0x%08lx %u\n"; 868 static const char mem_fmt_nov[] = 869 "%20s: 0x%08lx 0x%08lx %zu\n"; 870 871 printf(mem_fmt, "SDRAM", bmi->bmi_start, bmi->bmi_end - 1, 872 KERN_PHYSTOV(bmi, bmi->bmi_start), KERN_PHYSTOV(bmi, bmi->bmi_end - 1), 873 physmem); 874 printf(mem_fmt, "text section", 875 text.pv_pa, text.pv_pa + text.pv_size - 1, 876 text.pv_va, text.pv_va + text.pv_size - 1, 877 (int)(text.pv_size / PAGE_SIZE)); 878 printf(mem_fmt, "data section", 879 KERN_VTOPHYS(bmi, __data_start), KERN_VTOPHYS(bmi, _edata), 880 (vaddr_t)__data_start, (vaddr_t)_edata, 881 (int)((round_page((vaddr_t)_edata) 882 - trunc_page((vaddr_t)__data_start)) / PAGE_SIZE)); 883 printf(mem_fmt, "bss section", 884 KERN_VTOPHYS(bmi, __bss_start), KERN_VTOPHYS(bmi, __bss_end__), 885 (vaddr_t)__bss_start, (vaddr_t)__bss_end__, 886 (int)((round_page((vaddr_t)__bss_end__) 887 - trunc_page((vaddr_t)__bss_start)) / PAGE_SIZE)); 888 printf(mem_fmt, "L1 page directory", 889 kernel_l1pt.pv_pa, kernel_l1pt.pv_pa + L1_TABLE_SIZE - 1, 890 kernel_l1pt.pv_va, kernel_l1pt.pv_va + L1_TABLE_SIZE - 1, 891 L1_TABLE_SIZE / PAGE_SIZE); 892 printf(mem_fmt, "ABT stack (CPU 0)", 893 abtstack.pv_pa, abtstack.pv_pa + (ABT_STACK_SIZE * PAGE_SIZE) - 1, 894 abtstack.pv_va, abtstack.pv_va + (ABT_STACK_SIZE * PAGE_SIZE) - 1, 895 ABT_STACK_SIZE); 896 printf(mem_fmt, "FIQ stack (CPU 0)", 897 fiqstack.pv_pa, fiqstack.pv_pa + (FIQ_STACK_SIZE * PAGE_SIZE) - 1, 898 fiqstack.pv_va, fiqstack.pv_va + (FIQ_STACK_SIZE * PAGE_SIZE) - 1, 899 FIQ_STACK_SIZE); 900 printf(mem_fmt, "IRQ stack (CPU 0)", 901 irqstack.pv_pa, irqstack.pv_pa + (IRQ_STACK_SIZE * PAGE_SIZE) - 1, 902 irqstack.pv_va, irqstack.pv_va + (IRQ_STACK_SIZE * PAGE_SIZE) - 1, 903 IRQ_STACK_SIZE); 904 printf(mem_fmt, "UND stack (CPU 0)", 905 undstack.pv_pa, undstack.pv_pa + (UND_STACK_SIZE * PAGE_SIZE) - 1, 906 undstack.pv_va, undstack.pv_va + (UND_STACK_SIZE * PAGE_SIZE) - 1, 907 UND_STACK_SIZE); 908 printf(mem_fmt, "IDLE stack (CPU 0)", 909 idlestack.pv_pa, idlestack.pv_pa + (UPAGES * PAGE_SIZE) - 1, 910 idlestack.pv_va, idlestack.pv_va + (UPAGES * PAGE_SIZE) - 1, 911 UPAGES); 912 printf(mem_fmt, "SVC stack", 913 kernelstack.pv_pa, kernelstack.pv_pa + (UPAGES * PAGE_SIZE) - 1, 914 kernelstack.pv_va, kernelstack.pv_va + (UPAGES * PAGE_SIZE) - 1, 915 UPAGES); 916 printf(mem_fmt, "Message Buffer", 917 msgbuf.pv_pa, msgbuf.pv_pa + (msgbuf_pgs * PAGE_SIZE) - 1, 918 msgbuf.pv_va, msgbuf.pv_va + (msgbuf_pgs * PAGE_SIZE) - 1, 919 (int)msgbuf_pgs); 920 if (map_vectors_p) { 921 printf(mem_fmt, "Exception Vectors", 922 systempage.pv_pa, systempage.pv_pa + PAGE_SIZE - 1, 923 systempage.pv_va, systempage.pv_va + PAGE_SIZE - 1, 924 1); 925 } 926 for (size_t i = 0; i < bmi->bmi_nfreeblocks; i++) { 927 pv = &bmi->bmi_freeblocks[i]; 928 929 printf(mem_fmt_nov, "Free Memory", 930 pv->pv_pa, pv->pv_pa + pv->pv_size - 1, 931 pv->pv_size / PAGE_SIZE); 932 } 933 #endif 934 /* 935 * Now we have the real page tables in place so we can switch to them. 936 * Once this is done we will be running with the REAL kernel page 937 * tables. 938 */ 939 940 #if defined(VERBOSE_INIT_ARM) 941 printf("TTBR0=%#x", armreg_ttbr_read()); 942 #ifdef _ARM_ARCH_6 943 printf(" TTBR1=%#x TTBCR=%#x CONTEXTIDR=%#x", 944 armreg_ttbr1_read(), armreg_ttbcr_read(), 945 armreg_contextidr_read()); 946 #endif 947 printf("\n"); 948 #endif 949 950 /* Switch tables */ 951 #ifdef VERBOSE_INIT_ARM 952 printf("switching to new L1 page table @%#lx...", l1pt_pa); 953 #endif 954 955 #ifdef ARM_MMU_EXTENDED 956 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) 957 | (DOMAIN_CLIENT << (PMAP_DOMAIN_USER*2))); 958 #else 959 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 960 #endif 961 cpu_idcache_wbinv_all(); 962 #ifdef VERBOSE_INIT_ARM 963 printf(" ttb"); 964 #endif 965 #ifdef ARM_MMU_EXTENDED 966 /* 967 * TTBCR should have been initialized by the MD start code. 968 */ 969 KASSERT((armreg_contextidr_read() & 0xff) == 0); 970 KASSERT(armreg_ttbcr_read() == __SHIFTIN(1, TTBCR_S_N)); 971 /* 972 * Disable lookups via TTBR0 until there is an activated pmap. 973 */ 974 armreg_ttbcr_write(armreg_ttbcr_read() | TTBCR_S_PD0); 975 cpu_setttb(l1pt_pa, KERNEL_PID); 976 arm_isb(); 977 #else 978 cpu_setttb(l1pt_pa, true); 979 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 980 #endif 981 cpu_tlb_flushID(); 982 983 #ifdef VERBOSE_INIT_ARM 984 #ifdef ARM_MMU_EXTENDED 985 printf(" (TTBCR=%#x TTBR0=%#x TTBR1=%#x)", 986 armreg_ttbcr_read(), armreg_ttbr_read(), armreg_ttbr1_read()); 987 #else 988 printf(" (TTBR0=%#x)", armreg_ttbr_read()); 989 #endif 990 #endif 991 992 #ifdef MULTIPROCESSOR 993 /* 994 * Kick the secondaries to load the TTB. After which they'll go 995 * back to sleep to wait for the final kick so they will hatch. 996 */ 997 #ifdef VERBOSE_INIT_ARM 998 printf(" hatchlings"); 999 #endif 1000 cpu_boot_secondary_processors(); 1001 #endif 1002 1003 #ifdef VERBOSE_INIT_ARM 1004 printf(" OK\n"); 1005 #endif 1006 } 1007
Indexes created Sat Sep 27 22:09:54 GMT 2025