irq_dispatch.S revision 1.8
11.8Sthorpej/*	$NetBSD: irq_dispatch.S,v 1.8 2007/03/09 19:21:58 thorpej Exp $	*/
21.1Sthorpej
31.1Sthorpej/*
41.1Sthorpej * Copyright (c) 2002 Fujitsu Component Limited
51.1Sthorpej * Copyright (c) 2002 Genetec Corporation
61.1Sthorpej * All rights reserved.
71.1Sthorpej *
81.1Sthorpej * Redistribution and use in source and binary forms, with or without
91.1Sthorpej * modification, are permitted provided that the following conditions
101.1Sthorpej * are met:
111.1Sthorpej * 1. Redistributions of source code must retain the above copyright
121.1Sthorpej *    notice, this list of conditions and the following disclaimer.
131.1Sthorpej * 2. Redistributions in binary form must reproduce the above copyright
141.1Sthorpej *    notice, this list of conditions and the following disclaimer in the
151.1Sthorpej *    documentation and/or other materials provided with the distribution.
161.1Sthorpej * 3. Neither the name of The Fujitsu Component Limited nor the name of
171.1Sthorpej *    Genetec corporation may not be used to endorse or promote products
181.1Sthorpej *    derived from this software without specific prior written permission.
191.1Sthorpej *
201.1Sthorpej * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
211.1Sthorpej * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
221.1Sthorpej * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
231.1Sthorpej * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
241.1Sthorpej * DISCLAIMED.  IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
251.1Sthorpej * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
261.1Sthorpej * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
271.1Sthorpej * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
281.1Sthorpej * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
291.1Sthorpej * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
301.1Sthorpej * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
311.1Sthorpej * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
321.1Sthorpej * SUCH DAMAGE.
331.1Sthorpej */
341.1Sthorpej
351.1Sthorpej/*
361.1Sthorpej * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
371.1Sthorpej * All rights reserved.
381.1Sthorpej *
391.1Sthorpej * Written by Jason R. Thorpe for Wasabi Systems, Inc.
401.1Sthorpej *
411.1Sthorpej * Redistribution and use in source and binary forms, with or without
421.1Sthorpej * modification, are permitted provided that the following conditions
431.1Sthorpej * are met:
441.1Sthorpej * 1. Redistributions of source code must retain the above copyright
451.1Sthorpej *    notice, this list of conditions and the following disclaimer.
461.1Sthorpej * 2. Redistributions in binary form must reproduce the above copyright
471.1Sthorpej *    notice, this list of conditions and the following disclaimer in the
481.1Sthorpej *    documentation and/or other materials provided with the distribution.
491.1Sthorpej * 3. All advertising materials mentioning features or use of this software
501.1Sthorpej *    must display the following acknowledgement:
511.1Sthorpej *	This product includes software developed for the NetBSD Project by
521.1Sthorpej *	Wasabi Systems, Inc.
531.1Sthorpej * 4. The name of Wasabi Systems, Inc. may not be used to endorse
541.1Sthorpej *    or promote products derived from this software without specific prior
551.1Sthorpej *    written permission.
561.1Sthorpej *
571.1Sthorpej * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
581.1Sthorpej * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
591.1Sthorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
601.1Sthorpej * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
611.1Sthorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
621.1Sthorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
631.1Sthorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
641.1Sthorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
651.1Sthorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
661.1Sthorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
671.1Sthorpej * POSSIBILITY OF SUCH DAMAGE.
681.1Sthorpej */
691.1Sthorpej
701.1Sthorpej#include "assym.h"
711.1Sthorpej
721.1Sthorpej#include <machine/asm.h>
731.1Sthorpej#include <machine/cpu.h>
741.1Sthorpej#include <machine/frame.h>
751.1Sthorpej
761.1Sthorpej#include "opt_arm_intr_impl.h"
771.1Sthorpej#ifdef ARM_INTR_IMPL
781.1Sthorpej#include ARM_INTR_IMPL
791.1Sthorpej#else
801.1Sthorpej#error ARM_INTR_IMPL not defined
811.1Sthorpej#endif
821.1Sthorpej
831.1Sthorpej#ifndef ARM_IRQ_HANDLER
841.1Sthorpej#error ARM_IRQ_HANDLER not defined
851.1Sthorpej#endif
861.1Sthorpej
871.1Sthorpej/*
881.1Sthorpej * irq_entry:
891.1Sthorpej *	Main entry point for the IRQ vector.  This is a generic version
901.1Sthorpej *	which can be used by different platforms.
911.1Sthorpej */
921.1Sthorpej	.text
931.1Sthorpej	.align	0
941.2Sthorpej.Lcurrent_intr_depth:
951.2Sthorpej	.word	_C_LABEL(current_intr_depth)
961.1Sthorpej
971.8SthorpejLOCK_CAS_CHECK_LOCALS
981.8Sthorpej
991.5SscwAST_ALIGNMENT_FAULT_LOCALS
1001.5Sscw
1011.1SthorpejASENTRY_NP(irq_entry)
1021.1Sthorpej	sub	lr, lr, #0x00000004	/* Adjust the lr */
1031.1Sthorpej
1041.1Sthorpej	PUSHFRAMEINSVC			/* Push an interrupt frame */
1051.3Sscw	ENABLE_ALIGNMENT_FAULTS
1061.3Sscw
1071.2Sthorpej	/*
1081.2Sthorpej	 * Increment the interrupt nesting depth and call the interrupt
1091.2Sthorpej	 * dispatch routine.  We've pushed a frame, so we can safely use
1101.2Sthorpej	 * callee-saved regs here.  We use the following registers, which
1111.2Sthorpej	 * we expect to presist:
1121.2Sthorpej	 *
1131.2Sthorpej	 *	r5	address of `current_intr_depth' variable
1141.2Sthorpej	 *	r6	old value of `current_intr_depth'
1151.2Sthorpej	 */
1161.2Sthorpej	ldr	r5, .Lcurrent_intr_depth
1171.2Sthorpej	mov	r0, sp			/* arg for dispatcher */
1181.2Sthorpej	ldr	r6, [r5]
1191.2Sthorpej	add	r1, r6, #1
1201.2Sthorpej	str	r1, [r5]
1211.2Sthorpej
1221.1Sthorpej	bl	ARM_IRQ_HANDLER
1231.1Sthorpej
1241.1Sthorpej	/*
1251.2Sthorpej	 * Restore the old interrupt depth value (which should be the
1261.2Sthorpej	 * same as decrementing it at this point).
1271.2Sthorpej	 */
1281.2Sthorpej	str	r6, [r5]
1291.2Sthorpej
1301.8Sthorpej	LOCK_CAS_CHECK
1311.8Sthorpej
1321.5Sscw	DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
1331.3Sscw	PULLFRAMEFROMSVCANDEXIT
1341.3Sscw	movs	pc, lr			/* Exit */
1351.1Sthorpej
1361.1Sthorpej	.bss
1371.1Sthorpej	.align	0
1381.1Sthorpej
1391.1Sthorpej	.global _C_LABEL(astpending)
1401.1Sthorpej_C_LABEL(astpending):
1411.2Sthorpej	.word	0
1421.2Sthorpej
1431.2Sthorpej	.global _C_LABEL(current_intr_depth)
1441.2Sthorpej_C_LABEL(current_intr_depth):
1451.1Sthorpej	.word	0
146