locore.S revision 1.41
11.41Sskrll/*	$NetBSD: locore.S,v 1.41 2020/07/08 10:18:00 skrll Exp $	*/
21.1Schris
31.1Schris/*
41.1Schris * Copyright (C) 1994-1997 Mark Brinicombe
51.1Schris * Copyright (C) 1994 Brini
61.1Schris * All rights reserved.
71.1Schris *
81.1Schris * Redistribution and use in source and binary forms, with or without
91.1Schris * modification, are permitted provided that the following conditions
101.1Schris * are met:
111.1Schris * 1. Redistributions of source code must retain the above copyright
121.1Schris *    notice, this list of conditions and the following disclaimer.
131.1Schris * 2. Redistributions in binary form must reproduce the above copyright
141.1Schris *    notice, this list of conditions and the following disclaimer in the
151.1Schris *    documentation and/or other materials provided with the distribution.
161.1Schris * 3. All advertising materials mentioning features or use of this software
171.1Schris *    must display the following acknowledgement:
181.1Schris *	This product includes software developed by Brini.
191.1Schris * 4. The name of Brini may not be used to endorse or promote products
201.1Schris *    derived from this software without specific prior written permission.
211.1Schris *
221.1Schris * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR
231.1Schris * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
241.1Schris * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
251.1Schris * IN NO EVENT SHALL BRINI BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
261.1Schris * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
271.1Schris * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
281.1Schris * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
291.1Schris * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
301.1Schris * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
311.1Schris * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
321.1Schris */
331.1Schris
341.39Sskrll#include "opt_arm_debug.h"
351.39Sskrll
361.1Schris#include "assym.h"
371.39Sskrll#include <sys/cdefs.h>
381.1Schris#include <sys/syscall.h>
391.1Schris#include <sys/errno.h>
401.33Smatt#include <arm/asm.h>
411.33Smatt#include <arm/locore.h>
421.1Schris
431.1Schris/* What size should this really be ? It is only used by init_arm() */
441.1Schris#define INIT_ARM_STACK_SIZE	2048
451.1Schris
461.41Sskrll	RCSID("$NetBSD: locore.S,v 1.41 2020/07/08 10:18:00 skrll Exp $")
471.23Smatt
481.1Schris/*
491.1Schris * This is for kvm_mkdb, and should be the address of the beginning
501.1Schris * of the kernel text segment (not necessarily the same as kernbase).
511.1Schris */
521.1Schris
531.2Sthorpej	.text
541.2Sthorpej	.align	0
551.5Sthorpej
561.5SthorpejENTRY_NP(kernel_text)
571.2Sthorpej
581.1SchrisASENTRY_NP(start)
591.29Smatt	mrs	r1, cpsr		/* fetch CPSR value */
601.29Smatt	msr	spsr_sx, r1		/* set SPSR[23:8] to known value */
611.29Smatt
621.38Sskrll	/*
631.38Sskrll	 * Get bss bounds (r1, r2), curlwp or curcpu (r8), and set initial
641.38Sskrll	 * stack.
651.38Sskrll	 */
661.9Sbjh21	adr	r1, .Lstart
671.38Sskrll	ldmia	r1, {r1, r2, r8, sp}
681.25Smatt
691.27Smatt#if defined(TPIDRPRW_IS_CURCPU) || defined(TPIDRPRW_IS_CURLWP)
701.27Smatt	mcr	p15, 0, r8, c13, c0, 4
711.25Smatt#endif
721.28Smatt#if defined(TPIDRPRW_IS_CURLWP)
731.28Smatt	ldr	r8, [r8, #L_CPU]	/* r8 needs curcpu in it */
741.28Smatt#endif
751.25Smatt
761.32Smatt	mov	r4, #0
771.32Smatt#ifdef _ARM_ARCH_DWORD_OK
781.32Smatt	mov	r5, #0
791.32Smatt#endif
801.7Sbriggs.L1:
811.32Smatt#ifdef _ARM_ARCH_DWORD_OK
821.34Sjoerg	strd	r4, r5, [r1], #0x0008	/* Zero the bss */
831.32Smatt#else
841.32Smatt	str	r4, [r1], #0x0004	/* Zero the bss */
851.32Smatt#endif
861.32Smatt	cmp	r1, r2
871.32Smatt	blt	.L1
881.1Schris
891.27Smatt	mrc	p15, 0, r3, c0, c0, 0	/* get our cpuid and save it early */
901.27Smatt	str	r3, [r8, #CI_ARM_CPUID]
911.27Smatt
921.4Sthorpej	mov	fp, #0x00000000		/* trace back starts here */
931.4Sthorpej	bl	_C_LABEL(initarm)	/* Off we go */
941.1Schris
951.40Sskrll	/* initarm will return the new stack pointer. */
961.1Schris	mov	sp, r0
971.1Schris
981.1Schris	mov	fp, #0x00000000		/* trace back starts here */
991.1Schris	mov	ip, sp
1001.33Smatt	push	{fp, ip, lr, pc}
1011.1Schris	sub	fp, ip, #4
1021.1Schris
1031.4Sthorpej	bl	_C_LABEL(main)		/* call main()! */
1041.1Schris
1051.9Sbjh21	adr	r0, .Lmainreturned
1061.4Sthorpej	b	_C_LABEL(panic)
1071.17Spooka	/* NOTREACHED */
1081.1Schris
1091.39SskrllENTRY_NP(uartputc)
1101.39Sskrll#ifdef EARLYCONS
1111.39Sskrll	b	___CONCAT(EARLYCONS, _platform_early_putchar)
1121.39Sskrll#endif
1131.39Sskrll	RET
1141.39SskrllASEND(uartputc)
1151.39Sskrll
1161.7Sbriggs.Lstart:
1171.1Schris	.word	_edata
1181.1Schris	.word	_end
1191.28Smatt#if defined(TPIDRPRW_IS_CURLWP)
1201.27Smatt	.word	_C_LABEL(lwp0)
1211.27Smatt#else
1221.28Smatt	.word	_C_LABEL(cpu_info_store)
1231.27Smatt#endif
1241.41Sskrll#if !defined(__HAVE_GENERIC_START)
1251.39Sskrll	.word	svcstk_end
1261.41Sskrll#else
1271.41Sskrll	.word   start_stacks_top
1281.41Sskrll#endif
1291.4Sthorpej
1301.8Sthorpej.Lmainreturned:
1311.4Sthorpej	.asciz	"main() returned"
1321.4Sthorpej	.align	0
1331.33SmattASEND(start)
1341.1Schris
1351.41Sskrll#if !defined(__HAVE_GENERIC_START)
1361.1Schris	.bss
1371.37Smatt#ifdef __ARM_EABI__
1381.37Smatt	.align	3
1391.37Smatt#endif
1401.1Schrissvcstk:
1411.1Schris	.space	INIT_ARM_STACK_SIZE
1421.39Sskrllsvcstk_end:
1431.41Sskrll#endif
1441.1Schris
1451.1Schris	.text
1461.1Schris	.align	0
1471.1Schris
1481.1Schris#ifndef OFW
1491.1Schris	/* OFW based systems will used OF_boot() */
1501.36Smatt
1511.36Smatt.Lcpufuncs:
1521.1Schris	.word	_C_LABEL(cpufuncs)
1531.1Schris
1541.1SchrisENTRY_NP(cpu_reset)
1551.27Smatt#ifdef _ARM_ARCH_6
1561.27Smatt	cpsid	if, #PSR_SVC32_MODE
1571.27Smatt#else
1581.7Sbriggs	mrs     r2, cpsr
1591.1Schris	bic	r2, r2, #(PSR_MODE)
1601.1Schris	orr     r2, r2, #(PSR_SVC32_MODE)
1611.24Smatt	orr	r2, r2, #(IF32_bits)
1621.22Schris	msr     cpsr_c, r2
1631.27Smatt#endif
1641.1Schris
1651.8Sthorpej	ldr	r0, .Lcpufuncs
1661.10Sbsh	mov	lr, pc
1671.3Sthorpej	ldr	pc, [r0, #CF_IDCACHE_WBINV_ALL]
1681.1Schris
1691.1Schris	/*
1701.26Smatt	 * Load the virutal address of the MD reset function first.
1711.1Schris	 */
1721.26Smatt	ldr	r4, .Lcpu_reset_address
1731.26Smatt	ldr	r4, [r4]
1741.26Smatt	cmp	r4, #0
1751.1Schris
1761.26Smatt	/*
1771.26Smatt	 * If virtual address is NULL, we must be using the physical address
1781.26Smatt	 */
1791.26Smatt	ldreq	r4, .Lcpu_reset_address_paddr
1801.26Smatt	ldreq	r4, [r4]
1811.1Schris
1821.1Schris	/*
1831.1Schris 	 * MMU & IDC off, 32 bit program & data space
1841.1Schris	 * Hurl ourselves into the ROM
1851.1Schris	 */
1861.27Smatt	mrc	p15, 0, r0, c1, c0, 0
1871.30Smatt	bic	r0, r0, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE)
1881.30Smatt	bic	r0, r0, #(CPU_CONTROL_IC_ENABLE)
1891.30Smatt	orr	r0, r0, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE)
1901.27Smatt	mcr	p15, 0, r0, c1, c0, 0
1911.27Smatt	mcreq	p15, 0, r2, c8, c7, 0 	/* nail I+D TLB on ARMv4 and greater */
1921.1Schris	mov     pc, r4
1931.1Schris
1941.1Schris	/*
1951.26Smatt	 * cpu_reset_address contains the address to branch to, to complete
1961.15Swiz	 * the CPU reset after turning the MMU off
1971.1Schris	 * This variable is provided by the hardware specific code
1981.1Schris	 */
1991.8Sthorpej.Lcpu_reset_address:
2001.1Schris	.word	_C_LABEL(cpu_reset_address)
2011.26Smatt.Lcpu_reset_address_paddr:
2021.26Smatt	.word	_C_LABEL(cpu_reset_address_paddr)
2031.33SmattEND(cpu_reset)
2041.1Schris#endif	/* OFW */
2051.1Schris
2061.1Schris/*
2071.1Schris * setjump + longjmp
2081.1Schris */
2091.1SchrisENTRY(setjmp)
2101.1Schris	stmia	r0, {r4-r14}
2111.1Schris	mov	r0, #0x00000000
2121.33Smatt	RET
2131.33SmattEND(setjmp)
2141.1Schris
2151.1SchrisENTRY(longjmp)
2161.1Schris	ldmia	r0, {r4-r14}
2171.1Schris	mov	r0, #0x00000001
2181.33Smatt	RET
2191.33SmattEND(longjmp)
2201.1Schris
2211.1Schris	.data
2221.1Schris	.global _C_LABEL(esym)
2231.1Schris_C_LABEL(esym):	.word	_C_LABEL(end)
2241.1Schris
2251.1SchrisENTRY_NP(abort)
2261.1Schris	b	_C_LABEL(abort)
2271.33SmattEND(abort)
2281.1Schris
2291.19Schris/*
2301.21Sskrll * Part of doing a system dump, we need to save a switchframe onto the
2311.21Sskrll * stack, then save the rest of the registers into the dumppcb.
2321.19Schris */
2331.19SchrisENTRY(dumpsys)
2341.19Schris	/* push registers onto stack */
2351.20Sskrll	mov	ip, sp
2361.33Smatt	push	{r4-r7, ip, lr}
2371.19Schris
2381.19Schris	/* fill in dumppcb */
2391.19Schris	ldr	r0, .Ldumppcb
2401.19Schris
2411.19Schris#ifndef __XSCALE__
2421.19Schris        add     r2, r0, #(PCB_R8)
2431.19Schris        stmia   r2, {r8-r13}
2441.19Schris#else
2451.35Sjoerg        strd    r8, r9, [r0, #(PCB_R8)]
2461.35Sjoerg        strd    r10, r11, [r0, #(PCB_R10)]
2471.35Sjoerg        strd    r12, r13, [r0, #(PCB_R12)]
2481.19Schris#endif
2491.19Schris
2501.19Schris	bl	_C_LABEL(dodumpsys)
2511.19Schris
2521.19Schris	/* unwind the stack */
2531.33Smatt	pop	{r4-r7, ip, pc}
2541.19Schris
2551.19Schris.Ldumppcb:
2561.19Schris	.word	_C_LABEL(dumppcb)
2571.33SmattEND(dumpsys)
2581.1Schris
2591.1Schris/* End of locore.S */
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