spl.S revision 1.5.2.2
1 /* $NetBSD: spl.S,v 1.5.2.2 2008/01/09 01:45:13 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1996-1998 Mark Brinicombe. 5 * Copyright (c) Brini. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Mark Brinicombe 19 * for the NetBSD Project. 20 * 4. The name of the company nor the name of the author may be used to 21 * endorse or promote products derived from this software without specific 22 * prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * spl routines 37 * 38 * Created : 01/03/96 39 */ 40 41 #include "assym.h" 42 #include <arm/arm32/psl.h> 43 #include <machine/asm.h> 44 #include <machine/cpu.h> 45 46 .text 47 .align 0 48 49 .Lcpu_info_store: 50 .word _C_LABEL(cpu_info_store) 51 52 ENTRY(raisespl) 53 mov r3, r0 /* Save the new value */ 54 ldr r1, .Lcpu_info_store /* Get the current spl level */ 55 ldr r0, [r1, #CI_CPL] 56 cmp r3, r0 57 RETc(le) 58 59 stmfd sp!, {r0, r1, r4, lr} /* Preserve registers */ 60 61 /* Disable interrupts */ 62 mrs r4, cpsr_all 63 orr r2, r4, #(I32_bit) 64 msr cpsr_all, r2 65 66 str r3, [r1, #CI_CPL] /* Store the new spl level */ 67 bl _C_LABEL(irq_setmasks) /* Update the actual masks */ 68 msr cpsr_all, r4 /* Restore interrupts */ 69 70 ldmfd sp!, {r0, r1, r4, pc} /* Restore registers */ 71 72 ENTRY(lowerspl) 73 mov r3, r0 /* Save the new value */ 74 ldr r1, .Lcpu_info_store /* Get the current spl level */ 75 ldr r0, [r1, #CI_CPL] 76 cmp r3, r0 77 RETc(ge) 78 79 stmfd sp!, {r0, r1, r4, lr} /* Preserve registers */ 80 81 /* Disable interrupts */ 82 mrs r4, cpsr_all 83 orr r2, r4, #(I32_bit) 84 msr cpsr_all, r2 85 86 str r3, [r1, #CI_CPL] /* Store the new spl level */ 87 88 bl _C_LABEL(irq_setmasks) /* Update the actual masks */ 89 msr cpsr_all, r4 90 #ifdef __HAVE_FAST_SOFTINTS 91 bl _C_LABEL(dosoftints) /* Process any pending soft ints */ 92 #endif 93 ldmfd sp!, {r0, r1, r4, pc} /* restore registers */ 94 95 ENTRY(splx) 96 mov r3, r0 /* Save the new value */ 97 ldr r1, .Lcpu_info_store /* Get the current spl level */ 98 ldr r0, [r1, #CI_CPL] 99 cmp r3, r0 100 RETc(eq) 101 102 stmfd sp!, {r0, r1, r4, lr} 103 /* Disable interrupts */ 104 mrs r4, cpsr_all 105 orr r2, r4, #(I32_bit) 106 msr cpsr_all, r2 107 108 str r3, [r1, #CI_CPL] /* Store the new spl level */ 109 110 bl _C_LABEL(irq_setmasks) /* Update the actual masks */ 111 msr cpsr_all, r4 112 #ifdef __HAVE_FAST_SOFTINTS 113 bl _C_LABEL(dosoftints) /* Process any pending soft ints */ 114 #endif 115 ldmfd sp!, {r0, r1, r4, pc} 116
Indexes created Wed Oct 22 13:09:56 GMT 2025