at91usart.c revision 1.11 1 1.11 tls /* $Id: at91usart.c,v 1.11 2014/08/10 16:44:33 tls Exp $ */
2 1.11 tls /* $NetBSD: at91usart.c,v 1.11 2014/08/10 16:44:33 tls Exp $ */
3 1.2 matt
4 1.2 matt /*
5 1.2 matt * Copyright (c) 2007 Embedtronics Oy. All rights reserved.
6 1.2 matt *
7 1.2 matt * Copyright (c) 1998, 1999, 2001, 2002, 2004 The NetBSD Foundation, Inc.
8 1.2 matt * All rights reserved.
9 1.2 matt *
10 1.2 matt * This code is derived from software contributed to The NetBSD Foundation
11 1.2 matt * by Jesse Off
12 1.2 matt *
13 1.2 matt * This code is derived from software contributed to The NetBSD Foundation
14 1.2 matt * by Ichiro FUKUHARA and Naoto Shimazaki.
15 1.2 matt *
16 1.2 matt * This code is derived from software contributed to The NetBSD Foundation
17 1.2 matt * by IWAMOTO Toshihiro.
18 1.2 matt *
19 1.2 matt * This code is derived from software contributed to The NetBSD Foundation
20 1.2 matt * by Charles M. Hannum.
21 1.2 matt *
22 1.2 matt * Redistribution and use in source and binary forms, with or without
23 1.2 matt * modification, are permitted provided that the following conditions
24 1.2 matt * are met:
25 1.2 matt * 1. Redistributions of source code must retain the above copyright
26 1.2 matt * notice, this list of conditions and the following disclaimer.
27 1.2 matt * 2. Redistributions in binary form must reproduce the above copyright
28 1.2 matt * notice, this list of conditions and the following disclaimer in the
29 1.2 matt * documentation and/or other materials provided with the distribution.
30 1.2 matt *
31 1.2 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
32 1.2 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
33 1.2 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
34 1.2 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
35 1.2 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
36 1.2 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
37 1.2 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
38 1.2 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
39 1.2 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
40 1.2 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
41 1.2 matt * POSSIBILITY OF SUCH DAMAGE.
42 1.2 matt */
43 1.2 matt
44 1.2 matt /*
45 1.2 matt * Copyright (c) 1991 The Regents of the University of California.
46 1.2 matt * All rights reserved.
47 1.2 matt *
48 1.2 matt * Redistribution and use in source and binary forms, with or without
49 1.2 matt * modification, are permitted provided that the following conditions
50 1.2 matt * are met:
51 1.2 matt * 1. Redistributions of source code must retain the above copyright
52 1.2 matt * notice, this list of conditions and the following disclaimer.
53 1.2 matt * 2. Redistributions in binary form must reproduce the above copyright
54 1.2 matt * notice, this list of conditions and the following disclaimer in the
55 1.2 matt * documentation and/or other materials provided with the distribution.
56 1.2 matt * 3. Neither the name of the University nor the names of its contributors
57 1.2 matt * may be used to endorse or promote products derived from this software
58 1.2 matt * without specific prior written permission.
59 1.2 matt *
60 1.2 matt * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
61 1.2 matt * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
62 1.2 matt * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
63 1.2 matt * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
64 1.2 matt * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
65 1.2 matt * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
66 1.2 matt * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
67 1.2 matt * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
68 1.2 matt * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
69 1.2 matt * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
70 1.2 matt * SUCH DAMAGE.
71 1.2 matt *
72 1.2 matt * @(#)com.c 7.5 (Berkeley) 5/16/91
73 1.2 matt */
74 1.2 matt
75 1.2 matt /*
76 1.2 matt * TODO: hardware flow control
77 1.2 matt */
78 1.2 matt
79 1.2 matt #include <sys/cdefs.h>
80 1.11 tls __KERNEL_RCSID(0, "$NetBSD: at91usart.c,v 1.11 2014/08/10 16:44:33 tls Exp $");
81 1.2 matt
82 1.2 matt #include "opt_ddb.h"
83 1.2 matt #include "opt_kgdb.h"
84 1.2 matt
85 1.2 matt #include "rnd.h"
86 1.6 tls #ifdef RND_COM
87 1.2 matt #include <sys/rnd.h>
88 1.2 matt #endif
89 1.2 matt
90 1.2 matt #ifdef NOTYET
91 1.2 matt /*
92 1.2 matt * Override cnmagic(9) macro before including <sys/systm.h>.
93 1.2 matt * We need to know if cn_check_magic triggered debugger, so set a flag.
94 1.2 matt * Callers of cn_check_magic must declare int cn_trapped = 0;
95 1.2 matt * XXX: this is *ugly*!
96 1.2 matt */
97 1.2 matt #define cn_trap() \
98 1.2 matt do { \
99 1.2 matt console_debugger(); \
100 1.2 matt cn_trapped = 1; \
101 1.2 matt } while (/* CONSTCOND */ 0)
102 1.2 matt #endif /* NOTYET */
103 1.2 matt
104 1.2 matt
105 1.2 matt #include <sys/param.h>
106 1.2 matt #include <sys/systm.h>
107 1.2 matt #include <sys/types.h>
108 1.2 matt #include <sys/conf.h>
109 1.2 matt #include <sys/file.h>
110 1.2 matt #include <sys/device.h>
111 1.2 matt #include <sys/kernel.h>
112 1.2 matt #include <sys/tty.h>
113 1.2 matt #include <sys/uio.h>
114 1.2 matt #include <sys/vnode.h>
115 1.2 matt #include <sys/kauth.h>
116 1.2 matt
117 1.2 matt #include <machine/intr.h>
118 1.5 dyoung #include <sys/bus.h>
119 1.2 matt
120 1.2 matt #include <arm/at91/at91reg.h>
121 1.2 matt #include <arm/at91/at91var.h>
122 1.2 matt #include <arm/at91/at91usartreg.h>
123 1.2 matt #include <arm/at91/at91usartvar.h>
124 1.2 matt
125 1.2 matt #include <dev/cons.h>
126 1.2 matt
127 1.2 matt static int at91usart_param(struct tty *, struct termios *);
128 1.2 matt static void at91usart_start(struct tty *);
129 1.2 matt static int at91usart_hwiflow(struct tty *, int);
130 1.2 matt
131 1.2 matt #if 0
132 1.2 matt static u_int cflag2lcrhi(tcflag_t);
133 1.2 matt #endif
134 1.2 matt static void at91usart_set(struct at91usart_softc *);
135 1.2 matt
136 1.2 matt #if NOTYET
137 1.2 matt int at91usart_cn_getc(dev_t);
138 1.2 matt void at91usart_cn_putc(dev_t, int);
139 1.2 matt void at91usart_cn_pollc(dev_t, int);
140 1.2 matt void at91usart_cn_probe(struct consdev *);
141 1.2 matt void at91usart_cn_init(struct consdev *);
142 1.2 matt
143 1.2 matt static struct at91usart_cons_softc {
144 1.2 matt bus_space_tag_t sc_iot;
145 1.2 matt bus_space_handle_t sc_ioh;
146 1.2 matt bus_addr_t sc_hwbase;
147 1.2 matt int sc_ospeed;
148 1.2 matt tcflag_t sc_cflag;
149 1.2 matt int sc_attached;
150 1.2 matt
151 1.8 skrll uint8_t *sc_rx_ptr;
152 1.8 skrll uint8_t sc_rx_fifo[64];
153 1.2 matt } usart_cn_sc;
154 1.2 matt
155 1.2 matt static struct cnm_state at91usart_cnm_state;
156 1.2 matt #endif /* NOTYET */
157 1.2 matt
158 1.2 matt static void at91usart_soft(void* arg);
159 1.2 matt inline static void at91usart_txsoft(struct at91usart_softc *, struct tty *);
160 1.2 matt inline static void at91usart_rxsoft(struct at91usart_softc *, struct tty *, unsigned csr);
161 1.2 matt
162 1.2 matt #define PDC_BLOCK_SIZE 64
163 1.2 matt
164 1.7 chs //CFATTACH_DECL_NEW(at91usart, sizeof(struct at91usart_softc),
165 1.2 matt // at91usart_match, at91usart_attach, NULL, NULL);
166 1.2 matt
167 1.2 matt //#define USART_DEBUG 10
168 1.2 matt
169 1.2 matt #ifdef USART_DEBUG
170 1.2 matt int usart_debug = USART_DEBUG;
171 1.2 matt #define DPRINTFN(n,fmt) if (usart_debug >= (n)) printf fmt
172 1.2 matt #else
173 1.2 matt #define DPRINTFN(n,fmt)
174 1.2 matt #endif
175 1.2 matt
176 1.2 matt extern struct cfdriver at91usart_cd;
177 1.2 matt
178 1.2 matt dev_type_open(at91usart_open);
179 1.2 matt dev_type_close(at91usart_close);
180 1.2 matt dev_type_read(at91usart_read);
181 1.2 matt dev_type_write(at91usart_write);
182 1.2 matt dev_type_ioctl(at91usart_ioctl);
183 1.2 matt dev_type_stop(at91usart_stop);
184 1.2 matt dev_type_tty(at91usart_tty);
185 1.2 matt dev_type_poll(at91usart_poll);
186 1.2 matt
187 1.2 matt const struct cdevsw at91usart_cdevsw = {
188 1.9 dholland .d_open = at91usart_open,
189 1.9 dholland .d_close = at91usart_close,
190 1.9 dholland .d_read = at91usart_read,
191 1.9 dholland .d_write = at91usart_write,
192 1.9 dholland .d_ioctl = at91usart_ioctl,
193 1.9 dholland .d_stop = at91usart_stop,
194 1.9 dholland .d_tty = at91usart_tty,
195 1.9 dholland .d_poll = at91usart_poll,
196 1.9 dholland .d_mmap = nommap,
197 1.9 dholland .d_kqfilter = ttykqfilter,
198 1.10 dholland .d_discard = nodiscard,
199 1.9 dholland .d_flag = D_TTY
200 1.2 matt };
201 1.2 matt
202 1.2 matt #if NOTYET
203 1.2 matt struct consdev at91usart_cons = {
204 1.2 matt at91usart_cn_probe, NULL, at91usart_cn_getc, at91usart_cn_putc, at91usart_cn_pollc, NULL,
205 1.2 matt NULL, NULL, NODEV, CN_REMOTE
206 1.2 matt };
207 1.2 matt #endif /* NOTYET */
208 1.2 matt
209 1.2 matt #ifndef DEFAULT_COMSPEED
210 1.2 matt #define DEFAULT_COMSPEED 115200
211 1.2 matt #endif
212 1.2 matt
213 1.2 matt #define COMUNIT_MASK 0x7ffff
214 1.2 matt #define COMDIALOUT_MASK 0x80000
215 1.2 matt
216 1.2 matt #define COMUNIT(x) (minor(x) & COMUNIT_MASK)
217 1.2 matt #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK)
218 1.2 matt
219 1.2 matt #define COM_ISALIVE(sc) ((sc)->enabled != 0 && device_is_active((sc)->sc_dev))
220 1.2 matt
221 1.2 matt static inline void
222 1.2 matt at91usart_writereg(struct at91usart_softc *sc, int reg, u_int val)
223 1.2 matt {
224 1.2 matt bus_space_write_4(sc->sc_iot, sc->sc_ioh, reg, val);
225 1.2 matt }
226 1.2 matt
227 1.2 matt static inline u_int
228 1.2 matt at91usart_readreg(struct at91usart_softc *sc, int reg)
229 1.2 matt {
230 1.2 matt return bus_space_read_4(sc->sc_iot, sc->sc_ioh, reg);
231 1.2 matt }
232 1.2 matt #if 0
233 1.2 matt static int
234 1.2 matt at91usart_match(device_t parent, cfdata_t cf, void *aux)
235 1.2 matt {
236 1.2 matt if (strcmp(cf->cf_name, "at91usart") == 0)
237 1.2 matt return 1;
238 1.2 matt return 0;
239 1.2 matt }
240 1.2 matt #endif
241 1.2 matt static int at91usart_intr(void* arg);
242 1.2 matt
243 1.2 matt void
244 1.2 matt at91usart_attach_subr(struct at91usart_softc *sc, struct at91bus_attach_args *sa)
245 1.2 matt {
246 1.2 matt struct tty *tp;
247 1.2 matt int err;
248 1.2 matt
249 1.2 matt printf("\n");
250 1.2 matt
251 1.2 matt if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0, &sc->sc_ioh))
252 1.2 matt panic("%s: Cannot map registers", device_xname(sc->sc_dev));
253 1.2 matt
254 1.2 matt sc->sc_iot = sa->sa_iot;
255 1.2 matt sc->sc_hwbase = sa->sa_addr;
256 1.2 matt sc->sc_dmat = sa->sa_dmat;
257 1.2 matt sc->sc_pid = sa->sa_pid;
258 1.2 matt
259 1.2 matt /* allocate fifos */
260 1.2 matt err = at91pdc_alloc_fifo(sc->sc_dmat, &sc->sc_rx_fifo, AT91USART_RING_SIZE, BUS_DMA_READ | BUS_DMA_STREAMING);
261 1.2 matt if (err)
262 1.2 matt panic("%s: cannot allocate rx fifo", device_xname(sc->sc_dev));
263 1.2 matt
264 1.2 matt err = at91pdc_alloc_fifo(sc->sc_dmat, &sc->sc_tx_fifo, AT91USART_RING_SIZE, BUS_DMA_WRITE | BUS_DMA_STREAMING);
265 1.2 matt if (err)
266 1.2 matt panic("%s: cannot allocate tx fifo", device_xname(sc->sc_dev));
267 1.2 matt
268 1.2 matt /* initialize uart */
269 1.2 matt at91_peripheral_clock(sc->sc_pid, 1);
270 1.2 matt
271 1.2 matt at91usart_writereg(sc, US_IDR, -1);
272 1.2 matt at91usart_writereg(sc, US_RTOR, 12); // 12-bit timeout
273 1.2 matt at91usart_writereg(sc, US_PDC + PDC_PTCR, PDC_PTCR_TXTDIS | PDC_PTCR_RXTDIS);
274 1.2 matt at91_intr_establish(sa->sa_pid, IPL_TTY, INTR_HIGH_LEVEL, at91usart_intr, sc);
275 1.2 matt USART_INIT(sc, 115200U);
276 1.2 matt
277 1.2 matt #ifdef NOTYET
278 1.2 matt if (sc->sc_iot == usart_cn_sc.sc_iot
279 1.2 matt && sc->sc_hwbase == usart_cn_sc.sc_hwbase) {
280 1.2 matt usart_cn_sc.sc_attached = 1;
281 1.2 matt /* Make sure the console is always "hardwired". */
282 1.2 matt delay(10000); /* wait for output to finish */
283 1.2 matt SET(sc->sc_hwflags, COM_HW_CONSOLE);
284 1.2 matt SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
285 1.2 matt SET(sc->sc_ier, USART_INT_RXRDY);
286 1.2 matt USARTREG(USART_IER) = USART_INT_RXRDY; // @@@@@
287 1.2 matt }
288 1.2 matt #endif // NOTYET
289 1.2 matt
290 1.4 rmind tp = tty_alloc();
291 1.2 matt tp->t_oproc = at91usart_start;
292 1.2 matt tp->t_param = at91usart_param;
293 1.2 matt tp->t_hwiflow = at91usart_hwiflow;
294 1.2 matt
295 1.2 matt sc->sc_tty = tp;
296 1.2 matt
297 1.2 matt tty_attach(tp);
298 1.2 matt
299 1.2 matt #if NOTYET
300 1.2 matt if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
301 1.2 matt int maj;
302 1.2 matt
303 1.2 matt /* locate the major number */
304 1.2 matt maj = cdevsw_lookup_major(&at91usart_cdevsw);
305 1.2 matt
306 1.2 matt cn_tab->cn_dev = makedev(maj, device_unit(sc->sc_dev));
307 1.2 matt
308 1.2 matt aprint_normal("%s: console (maj %u min %u cn_dev %u)\n",
309 1.2 matt device_xname(sc->sc_dev), maj, device_unit(sc->sc_dev),
310 1.2 matt cn_tab->cn_dev);
311 1.2 matt }
312 1.2 matt #endif /* NOTYET */
313 1.2 matt
314 1.2 matt sc->sc_si = softint_establish(SOFTINT_SERIAL, at91usart_soft, sc);
315 1.2 matt
316 1.6 tls #ifdef RND_COM
317 1.2 matt rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev),
318 1.11 tls RND_TYPE_TTY, RND_FLAG_DEFAULT);
319 1.2 matt #endif
320 1.2 matt
321 1.2 matt /* if there are no enable/disable functions, assume the device
322 1.2 matt is always enabled */
323 1.2 matt if (!sc->enable)
324 1.2 matt sc->enabled = 1;
325 1.2 matt
326 1.2 matt /* XXX configure register */
327 1.2 matt /* xxx_config(sc) */
328 1.2 matt
329 1.2 matt SET(sc->sc_hwflags, COM_HW_DEV_OK);
330 1.2 matt }
331 1.2 matt
332 1.2 matt static int
333 1.2 matt at91usart_param(struct tty *tp, struct termios *t)
334 1.2 matt {
335 1.2 matt struct at91usart_softc *sc
336 1.2 matt = device_lookup_private(&at91usart_cd, COMUNIT(tp->t_dev));
337 1.2 matt int s;
338 1.2 matt
339 1.2 matt if (COM_ISALIVE(sc) == 0)
340 1.2 matt return (EIO);
341 1.2 matt
342 1.2 matt if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
343 1.2 matt return (EINVAL);
344 1.2 matt
345 1.2 matt /*
346 1.2 matt * For the console, always force CLOCAL and !HUPCL, so that the port
347 1.2 matt * is always active.
348 1.2 matt */
349 1.2 matt if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
350 1.2 matt ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
351 1.2 matt SET(t->c_cflag, CLOCAL);
352 1.2 matt CLR(t->c_cflag, HUPCL);
353 1.2 matt }
354 1.2 matt
355 1.2 matt /*
356 1.2 matt * If there were no changes, don't do anything. This avoids dropping
357 1.2 matt * input and improves performance when all we did was frob things like
358 1.2 matt * VMIN and VTIME.
359 1.2 matt */
360 1.2 matt if (tp->t_ospeed == t->c_ospeed &&
361 1.2 matt tp->t_cflag == t->c_cflag)
362 1.2 matt return (0);
363 1.2 matt
364 1.2 matt s = spltty();
365 1.2 matt
366 1.2 matt sc->sc_brgr = (AT91_MSTCLK / 16 + t->c_ospeed / 2) / t->c_ospeed;
367 1.2 matt
368 1.2 matt /* And copy to tty. */
369 1.2 matt tp->t_ispeed = 0;
370 1.2 matt tp->t_ospeed = t->c_ospeed;
371 1.2 matt tp->t_cflag = t->c_cflag;
372 1.2 matt at91usart_set(sc);
373 1.2 matt
374 1.2 matt splx(s);
375 1.2 matt
376 1.2 matt /*
377 1.2 matt * Update the tty layer's idea of the carrier bit.
378 1.2 matt * We tell tty the carrier is always on.
379 1.2 matt */
380 1.2 matt (void) (*tp->t_linesw->l_modem)(tp, 1);
381 1.2 matt
382 1.2 matt #ifdef COM_DEBUG
383 1.2 matt if (com_debug)
384 1.2 matt comstatus(sc, "comparam ");
385 1.2 matt #endif
386 1.2 matt
387 1.2 matt /* tell the upper layer about hwflow.. */
388 1.2 matt if (sc->hwflow)
389 1.2 matt (*sc->hwflow)(sc, t->c_cflag);
390 1.2 matt
391 1.2 matt return (0);
392 1.2 matt }
393 1.2 matt
394 1.2 matt static int
395 1.2 matt at91usart_hwiflow(struct tty *tp, int block)
396 1.2 matt {
397 1.2 matt if (block) {
398 1.2 matt /* tty discipline wants to block */
399 1.2 matt } else {
400 1.2 matt /* tty discipline wants to unblock */
401 1.2 matt }
402 1.2 matt return (0);
403 1.2 matt }
404 1.2 matt
405 1.2 matt static __inline void
406 1.2 matt at91usart_start_tx(struct at91usart_softc *sc)
407 1.2 matt {
408 1.2 matt if (!sc->start_tx)
409 1.2 matt at91usart_writereg(sc, US_PDC + PDC_PTCR, PDC_PTCR_TXTEN);
410 1.2 matt else
411 1.2 matt (*sc->start_tx)(sc);
412 1.2 matt }
413 1.2 matt
414 1.2 matt static __inline void
415 1.2 matt at91usart_stop_tx(struct at91usart_softc *sc)
416 1.2 matt {
417 1.2 matt if (!sc->stop_tx)
418 1.2 matt at91usart_writereg(sc, US_PDC + PDC_PTCR, PDC_PTCR_TXTDIS);
419 1.2 matt else
420 1.2 matt (*sc->stop_tx)(sc);
421 1.2 matt }
422 1.2 matt
423 1.2 matt static __inline void
424 1.2 matt at91usart_rx_started(struct at91usart_softc *sc)
425 1.2 matt {
426 1.2 matt if (sc->rx_started)
427 1.2 matt (*sc->rx_started)(sc);
428 1.2 matt }
429 1.2 matt
430 1.2 matt static __inline void
431 1.2 matt at91usart_rx_stopped(struct at91usart_softc *sc)
432 1.2 matt {
433 1.2 matt if (sc->rx_stopped)
434 1.2 matt (*sc->rx_stopped)(sc);
435 1.2 matt }
436 1.2 matt
437 1.2 matt static __inline void
438 1.2 matt at91usart_rx_rts_ctl(struct at91usart_softc *sc, int enabled)
439 1.2 matt {
440 1.2 matt if (sc->rx_rts_ctl)
441 1.2 matt (*sc->rx_rts_ctl)(sc, enabled);
442 1.2 matt }
443 1.2 matt
444 1.2 matt static void
445 1.2 matt at91usart_filltx(struct at91usart_softc *sc)
446 1.2 matt {
447 1.2 matt struct tty *tp = sc->sc_tty;
448 1.2 matt int len;
449 1.2 matt void *dst;
450 1.2 matt
451 1.2 matt // post write handler
452 1.2 matt AT91PDC_FIFO_POSTWRITE(sc->sc_iot, sc->sc_ioh, sc->sc_dmat, US_PDC,
453 1.2 matt &sc->sc_tx_fifo);
454 1.2 matt
455 1.2 matt // copy more data to fifo:
456 1.2 matt if (sc->sc_tbc > 0
457 1.2 matt && (dst = AT91PDC_FIFO_WRPTR(&sc->sc_tx_fifo, &len)) != NULL) {
458 1.2 matt // copy data to fifo
459 1.2 matt if (len > sc->sc_tbc)
460 1.2 matt len = sc->sc_tbc;
461 1.2 matt memcpy(dst, sc->sc_tba, len);
462 1.2 matt sc->sc_tba += len;
463 1.2 matt if ((sc->sc_tbc -= len) <= 0)
464 1.2 matt CLR(tp->t_state, TS_BUSY);
465 1.2 matt // update fifo
466 1.2 matt AT91PDC_FIFO_WRITTEN(&sc->sc_tx_fifo, len);
467 1.2 matt // tell tty interface we've sent some bytes
468 1.2 matt ndflush(&tp->t_outq, len);
469 1.2 matt }
470 1.2 matt
471 1.2 matt // start sending data...
472 1.2 matt if (AT91PDC_FIFO_PREWRITE(sc->sc_iot, sc->sc_ioh, sc->sc_dmat,
473 1.2 matt US_PDC, &sc->sc_tx_fifo, PDC_BLOCK_SIZE)) {
474 1.2 matt at91usart_start_tx(sc);
475 1.2 matt SET(sc->sc_ier, US_CSR_TXEMPTY | US_CSR_ENDTX);
476 1.2 matt } else {
477 1.2 matt CLR(sc->sc_ier, US_CSR_ENDTX);
478 1.2 matt }
479 1.2 matt }
480 1.2 matt
481 1.2 matt static void
482 1.2 matt at91usart_start(struct tty *tp)
483 1.2 matt {
484 1.2 matt struct at91usart_softc *sc
485 1.2 matt = device_lookup_private(&at91usart_cd, COMUNIT(tp->t_dev));
486 1.2 matt int s;
487 1.2 matt
488 1.2 matt if (COM_ISALIVE(sc) == 0) {
489 1.2 matt DPRINTFN(5, ("%s: %s / COM_ISALIVE == 0\n", device_xname(sc->sc_dev), __FUNCTION__));
490 1.2 matt return;
491 1.2 matt }
492 1.2 matt
493 1.2 matt s = spltty();
494 1.2 matt if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) {
495 1.2 matt DPRINTFN(5, ("%s: %s: TS_BUSY || TS_TIMEOUT || TS_TTSTOP\n", device_xname(sc->sc_dev), __FUNCTION__));
496 1.2 matt goto out;
497 1.2 matt }
498 1.2 matt
499 1.2 matt if (!ttypull(tp))
500 1.2 matt goto out;
501 1.2 matt
502 1.2 matt /* Grab the first contiguous region of buffer space. */
503 1.2 matt {
504 1.2 matt u_char *tba;
505 1.2 matt int tbc;
506 1.2 matt
507 1.2 matt tba = tp->t_outq.c_cf;
508 1.2 matt tbc = ndqb(&tp->t_outq, 0);
509 1.2 matt
510 1.2 matt sc->sc_tba = tba;
511 1.2 matt sc->sc_tbc = tbc;
512 1.2 matt }
513 1.2 matt
514 1.2 matt SET(tp->t_state, TS_BUSY);
515 1.2 matt
516 1.2 matt /* Output the first chunk of the contiguous buffer. */
517 1.2 matt at91usart_filltx(sc);
518 1.2 matt at91usart_writereg(sc, US_IER, sc->sc_ier);
519 1.2 matt DPRINTFN(5, ("%s: %s, ier=%08x (csr=%08x)\n", device_xname(sc->sc_dev), __FUNCTION__, sc->sc_ier, at91usart_readreg(sc, US_CSR)));
520 1.2 matt
521 1.2 matt out:
522 1.2 matt splx(s);
523 1.2 matt
524 1.2 matt return;
525 1.2 matt }
526 1.2 matt
527 1.2 matt static __inline__ void
528 1.2 matt at91usart_break(struct at91usart_softc *sc, int onoff)
529 1.2 matt {
530 1.2 matt at91usart_writereg(sc, US_CR, onoff ? US_CR_STTBRK : US_CR_STPBRK);
531 1.2 matt }
532 1.2 matt
533 1.2 matt static void
534 1.2 matt at91usart_shutdown(struct at91usart_softc *sc)
535 1.2 matt {
536 1.2 matt int s;
537 1.2 matt
538 1.2 matt s = spltty();
539 1.2 matt
540 1.2 matt /* turn of dma */
541 1.2 matt at91usart_writereg(sc, US_PDC + PDC_PTCR, PDC_PTCR_TXTDIS | PDC_PTCR_RXTDIS);
542 1.2 matt at91usart_writereg(sc, US_PDC + PDC_TNCR, 0);
543 1.2 matt at91usart_writereg(sc, US_PDC + PDC_TCR, 0);
544 1.2 matt at91usart_writereg(sc, US_PDC + PDC_RNCR, 0);
545 1.2 matt at91usart_writereg(sc, US_PDC + PDC_RCR, 0);
546 1.2 matt
547 1.2 matt /* Turn off interrupts. */
548 1.2 matt at91usart_writereg(sc, US_IDR, -1);
549 1.2 matt
550 1.2 matt /* Clear any break condition set with TIOCSBRK. */
551 1.2 matt at91usart_break(sc, 0);
552 1.2 matt at91usart_set(sc);
553 1.2 matt
554 1.2 matt if (sc->disable) {
555 1.2 matt #ifdef DIAGNOSTIC
556 1.2 matt if (!sc->enabled)
557 1.2 matt panic("at91usart_shutdown: not enabled?");
558 1.2 matt #endif
559 1.2 matt (*sc->disable)(sc);
560 1.2 matt sc->enabled = 0;
561 1.2 matt }
562 1.2 matt splx(s);
563 1.2 matt }
564 1.2 matt
565 1.2 matt int
566 1.2 matt at91usart_open(dev_t dev, int flag, int mode, struct lwp *l)
567 1.2 matt {
568 1.2 matt struct at91usart_softc *sc;
569 1.2 matt struct tty *tp;
570 1.2 matt int s;
571 1.2 matt int error;
572 1.2 matt
573 1.2 matt sc = device_lookup_private(&at91usart_cd, COMUNIT(dev));
574 1.2 matt if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK))
575 1.2 matt return (ENXIO);
576 1.2 matt
577 1.2 matt if (!device_is_active(sc->sc_dev))
578 1.2 matt return (ENXIO);
579 1.2 matt
580 1.2 matt #ifdef KGDB
581 1.2 matt /*
582 1.2 matt * If this is the kgdb port, no other use is permitted.
583 1.2 matt */
584 1.2 matt if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
585 1.2 matt return (EBUSY);
586 1.2 matt #endif
587 1.2 matt
588 1.2 matt tp = sc->sc_tty;
589 1.2 matt
590 1.2 matt if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
591 1.2 matt return (EBUSY);
592 1.2 matt
593 1.2 matt s = spltty();
594 1.2 matt
595 1.2 matt /*
596 1.2 matt * Do the following iff this is a first open.
597 1.2 matt */
598 1.2 matt if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
599 1.2 matt struct termios t;
600 1.2 matt
601 1.2 matt tp->t_dev = dev;
602 1.2 matt
603 1.2 matt if (sc->enable) {
604 1.2 matt if ((*sc->enable)(sc)) {
605 1.2 matt splx(s);
606 1.2 matt printf("%s: device enable failed\n",
607 1.2 matt device_xname(sc->sc_dev));
608 1.2 matt return (EIO);
609 1.2 matt }
610 1.2 matt sc->enabled = 1;
611 1.2 matt #if 0
612 1.2 matt /* XXXXXXXXXXXXXXX */
613 1.2 matt com_config(sc);
614 1.2 matt #endif
615 1.2 matt }
616 1.2 matt
617 1.2 matt /* reset fifos: */
618 1.2 matt AT91PDC_RESET_FIFO(sc->sc_iot, sc->sc_ioh, sc->sc_dmat, US_PDC, &sc->sc_rx_fifo, 0);
619 1.2 matt AT91PDC_RESET_FIFO(sc->sc_iot, sc->sc_ioh, sc->sc_dmat, US_PDC, &sc->sc_tx_fifo, 1);
620 1.2 matt
621 1.2 matt /* reset receive */
622 1.2 matt at91usart_writereg(sc, US_CR, US_CR_RSTSTA | US_CR_STTTO);
623 1.2 matt
624 1.2 matt /* Turn on interrupts. */
625 1.2 matt sc->sc_ier = US_CSR_ENDRX|US_CSR_RXBUFF|US_CSR_TIMEOUT|US_CSR_RXBRK;
626 1.2 matt at91usart_writereg(sc, US_IER, sc->sc_ier);
627 1.2 matt
628 1.2 matt /* enable DMA: */
629 1.2 matt at91usart_writereg(sc, US_PDC + PDC_PTCR, PDC_PTCR_RXTEN);
630 1.2 matt
631 1.2 matt /*
632 1.2 matt * Initialize the termios status to the defaults. Add in the
633 1.2 matt * sticky bits from TIOCSFLAGS.
634 1.2 matt */
635 1.2 matt t.c_ispeed = 0;
636 1.2 matt /* if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
637 1.2 matt t.c_ospeed = usart_cn_sc.sc_ospeed;
638 1.2 matt t.c_cflag = usart_cn_sc.sc_cflag;
639 1.2 matt } else*/ {
640 1.2 matt t.c_ospeed = TTYDEF_SPEED;
641 1.2 matt t.c_cflag = TTYDEF_CFLAG;
642 1.2 matt }
643 1.2 matt if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
644 1.2 matt SET(t.c_cflag, CLOCAL);
645 1.2 matt if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
646 1.2 matt SET(t.c_cflag, CRTSCTS);
647 1.2 matt if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
648 1.2 matt SET(t.c_cflag, MDMBUF);
649 1.2 matt
650 1.2 matt /* Make sure at91usart_param() will do something. */
651 1.2 matt tp->t_ospeed = 0;
652 1.2 matt (void) at91usart_param(tp, &t);
653 1.2 matt tp->t_iflag = TTYDEF_IFLAG;
654 1.2 matt tp->t_oflag = TTYDEF_OFLAG;
655 1.2 matt tp->t_lflag = TTYDEF_LFLAG;
656 1.2 matt ttychars(tp);
657 1.2 matt ttsetwater(tp);
658 1.2 matt
659 1.2 matt /* and unblock. */
660 1.2 matt CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
661 1.2 matt
662 1.2 matt #ifdef COM_DEBUG
663 1.2 matt if (at91usart_debug)
664 1.2 matt comstatus(sc, "at91usart_open ");
665 1.2 matt #endif
666 1.2 matt
667 1.2 matt }
668 1.2 matt
669 1.2 matt splx(s);
670 1.2 matt
671 1.2 matt error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK));
672 1.2 matt if (error)
673 1.2 matt goto bad;
674 1.2 matt
675 1.2 matt error = (*tp->t_linesw->l_open)(dev, tp);
676 1.2 matt if (error)
677 1.2 matt goto bad;
678 1.2 matt
679 1.2 matt return (0);
680 1.2 matt
681 1.2 matt bad:
682 1.2 matt if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
683 1.2 matt /*
684 1.2 matt * We failed to open the device, and nobody else had it opened.
685 1.2 matt * Clean up the state as appropriate.
686 1.2 matt */
687 1.2 matt at91usart_shutdown(sc);
688 1.2 matt }
689 1.2 matt
690 1.2 matt return (error);
691 1.2 matt }
692 1.2 matt
693 1.2 matt int
694 1.2 matt at91usart_close(dev_t dev, int flag, int mode, struct lwp *l)
695 1.2 matt {
696 1.2 matt struct at91usart_softc *sc = device_lookup_private(&at91usart_cd, COMUNIT(dev));
697 1.2 matt struct tty *tp = sc->sc_tty;
698 1.2 matt
699 1.2 matt /* XXX This is for cons.c. */
700 1.2 matt if (!ISSET(tp->t_state, TS_ISOPEN))
701 1.2 matt return (0);
702 1.2 matt
703 1.2 matt (*tp->t_linesw->l_close)(tp, flag);
704 1.2 matt ttyclose(tp);
705 1.2 matt
706 1.2 matt if (COM_ISALIVE(sc) == 0)
707 1.2 matt return (0);
708 1.2 matt
709 1.2 matt if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
710 1.2 matt /*
711 1.2 matt * Although we got a last close, the device may still be in
712 1.2 matt * use; e.g. if this was the dialout node, and there are still
713 1.2 matt * processes waiting for carrier on the non-dialout node.
714 1.2 matt */
715 1.2 matt at91usart_shutdown(sc);
716 1.2 matt }
717 1.2 matt
718 1.2 matt return (0);
719 1.2 matt }
720 1.2 matt
721 1.2 matt int
722 1.2 matt at91usart_read(dev_t dev, struct uio *uio, int flag)
723 1.2 matt {
724 1.2 matt struct at91usart_softc *sc = device_lookup_private(&at91usart_cd, COMUNIT(dev));
725 1.2 matt struct tty *tp = sc->sc_tty;
726 1.2 matt
727 1.2 matt if (COM_ISALIVE(sc) == 0)
728 1.2 matt return (EIO);
729 1.2 matt
730 1.2 matt return ((*tp->t_linesw->l_read)(tp, uio, flag));
731 1.2 matt }
732 1.2 matt
733 1.2 matt int
734 1.2 matt at91usart_write(dev_t dev, struct uio *uio, int flag)
735 1.2 matt {
736 1.2 matt struct at91usart_softc *sc = device_lookup_private(&at91usart_cd, COMUNIT(dev));
737 1.2 matt struct tty *tp = sc->sc_tty;
738 1.2 matt
739 1.2 matt if (COM_ISALIVE(sc) == 0)
740 1.2 matt return (EIO);
741 1.2 matt
742 1.2 matt return ((*tp->t_linesw->l_write)(tp, uio, flag));
743 1.2 matt }
744 1.2 matt
745 1.2 matt int
746 1.2 matt at91usart_poll(dev_t dev, int events, struct lwp *l)
747 1.2 matt {
748 1.2 matt struct at91usart_softc *sc = device_lookup_private(&at91usart_cd, COMUNIT(dev));
749 1.2 matt struct tty *tp = sc->sc_tty;
750 1.2 matt
751 1.2 matt if (COM_ISALIVE(sc) == 0)
752 1.2 matt return (EIO);
753 1.2 matt
754 1.2 matt return ((*tp->t_linesw->l_poll)(tp, events, l));
755 1.2 matt }
756 1.2 matt
757 1.2 matt struct tty *
758 1.2 matt at91usart_tty(dev_t dev)
759 1.2 matt {
760 1.2 matt struct at91usart_softc *sc = device_lookup_private(&at91usart_cd, COMUNIT(dev));
761 1.2 matt struct tty *tp = sc->sc_tty;
762 1.2 matt
763 1.2 matt return (tp);
764 1.2 matt }
765 1.2 matt
766 1.2 matt int
767 1.2 matt at91usart_ioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
768 1.2 matt {
769 1.2 matt struct at91usart_softc *sc = device_lookup_private(&at91usart_cd, COMUNIT(dev));
770 1.2 matt struct tty *tp = sc->sc_tty;
771 1.2 matt int error;
772 1.2 matt int s;
773 1.2 matt
774 1.2 matt if (COM_ISALIVE(sc) == 0)
775 1.2 matt return (EIO);
776 1.2 matt
777 1.2 matt error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
778 1.2 matt if (error != EPASSTHROUGH)
779 1.2 matt return (error);
780 1.2 matt
781 1.2 matt error = ttioctl(tp, cmd, data, flag, l);
782 1.2 matt if (error != EPASSTHROUGH)
783 1.2 matt return (error);
784 1.2 matt
785 1.2 matt error = 0;
786 1.2 matt
787 1.2 matt s = spltty();
788 1.2 matt
789 1.2 matt switch (cmd) {
790 1.2 matt case TIOCSBRK:
791 1.2 matt at91usart_break(sc, 1);
792 1.2 matt break;
793 1.2 matt
794 1.2 matt case TIOCCBRK:
795 1.2 matt at91usart_break(sc, 0);
796 1.2 matt break;
797 1.2 matt
798 1.2 matt case TIOCGFLAGS:
799 1.2 matt *(int *)data = sc->sc_swflags;
800 1.2 matt break;
801 1.2 matt
802 1.2 matt case TIOCSFLAGS:
803 1.2 matt error = kauth_authorize_device_tty(l->l_cred,
804 1.2 matt KAUTH_DEVICE_TTY_PRIVSET, tp);
805 1.2 matt if (error)
806 1.2 matt break;
807 1.2 matt sc->sc_swflags = *(int *)data;
808 1.2 matt break;
809 1.2 matt
810 1.2 matt default:
811 1.2 matt error = EPASSTHROUGH;
812 1.2 matt break;
813 1.2 matt }
814 1.2 matt
815 1.2 matt splx(s);
816 1.2 matt
817 1.2 matt return (error);
818 1.2 matt }
819 1.2 matt
820 1.2 matt /*
821 1.2 matt * Stop output on a line.
822 1.2 matt */
823 1.2 matt void
824 1.2 matt at91usart_stop(struct tty *tp, int flag)
825 1.2 matt {
826 1.2 matt struct at91usart_softc *sc
827 1.2 matt = device_lookup_private(&at91usart_cd, COMUNIT(tp->t_dev));
828 1.2 matt int s;
829 1.2 matt
830 1.2 matt s = spltty();
831 1.2 matt if (ISSET(tp->t_state, TS_BUSY)) {
832 1.2 matt /* Stop transmitting at the next chunk. */
833 1.2 matt sc->sc_tbc = 0;
834 1.2 matt if (!ISSET(tp->t_state, TS_TTSTOP))
835 1.2 matt SET(tp->t_state, TS_FLUSH);
836 1.2 matt }
837 1.2 matt splx(s);
838 1.2 matt }
839 1.2 matt
840 1.2 matt #if 0
841 1.2 matt static u_int
842 1.2 matt cflag2lcrhi(tcflag_t cflag)
843 1.2 matt {
844 1.8 skrll uint32_t mr;
845 1.2 matt
846 1.2 matt switch (cflag & CSIZE) {
847 1.2 matt default:
848 1.2 matt mr = 0x0;
849 1.2 matt break;
850 1.2 matt }
851 1.2 matt #if 0
852 1.2 matt mr |= (cflag & PARENB) ? LinCtrlHigh_PEN : 0;
853 1.2 matt mr |= (cflag & PARODD) ? 0 : LinCtrlHigh_EPS;
854 1.2 matt mr |= (cflag & CSTOPB) ? LinCtrlHigh_STP2 : 0;
855 1.2 matt mr |= LinCtrlHigh_FEN; /* FIFO always enabled */
856 1.2 matt #endif
857 1.2 matt mr |= USART_MR_PAR_NONE;
858 1.2 matt return (mr);
859 1.2 matt }
860 1.2 matt #endif
861 1.2 matt
862 1.2 matt
863 1.2 matt static void
864 1.2 matt at91usart_set(struct at91usart_softc *sc)
865 1.2 matt {
866 1.2 matt at91usart_writereg(sc, US_MR, US_MR_CHRL_8 | US_MR_PAR_NONE | US_MR_NBSTOP_1);
867 1.2 matt at91usart_writereg(sc, US_BRGR, sc->sc_brgr);
868 1.2 matt at91usart_writereg(sc, US_CR, US_CR_TXEN | US_CR_RXEN); // @@@ just in case
869 1.2 matt }
870 1.2 matt
871 1.2 matt #if NOTYET
872 1.2 matt int
873 1.2 matt at91usart_cn_attach(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t ioh,
874 1.8 skrll uint32_t mstclk, int ospeed, tcflag_t cflag)
875 1.2 matt {
876 1.2 matt cn_tab = &at91usart_cons;
877 1.2 matt cn_init_magic(&at91usart_cnm_state);
878 1.2 matt cn_set_magic("\047\001");
879 1.2 matt
880 1.2 matt usart_cn_sc.sc_iot = iot;
881 1.2 matt usart_cn_sc.sc_ioh = ioh;
882 1.2 matt usart_cn_sc.sc_hwbase = iobase;
883 1.2 matt usart_cn_sc.sc_ospeed = ospeed;
884 1.2 matt usart_cn_sc.sc_cflag = cflag;
885 1.2 matt
886 1.2 matt USART_INIT(mstclk, ospeed);
887 1.2 matt
888 1.2 matt return (0);
889 1.2 matt }
890 1.2 matt
891 1.2 matt void
892 1.2 matt at91usart_cn_probe(struct consdev *cp)
893 1.2 matt {
894 1.2 matt cp->cn_pri = CN_REMOTE;
895 1.2 matt }
896 1.2 matt
897 1.2 matt void
898 1.2 matt at91usart_cn_pollc(dev_t dev, int on)
899 1.2 matt {
900 1.2 matt if (on) {
901 1.2 matt // enable polling mode
902 1.2 matt USARTREG(US_IDR) = USART_INT_RXRDY;
903 1.2 matt } else {
904 1.2 matt // disable polling mode
905 1.2 matt USARTREG(US_IER) = USART_INT_RXRDY;
906 1.2 matt }
907 1.2 matt }
908 1.2 matt
909 1.2 matt void
910 1.2 matt at91usart_cn_putc(dev_t dev, int c)
911 1.2 matt {
912 1.2 matt int s;
913 1.2 matt #if 0
914 1.2 matt bus_space_tag_t iot = usart_cn_sc.sc_iot;
915 1.2 matt bus_space_handle_t ioh = usart_cn_sc.sc_ioh;
916 1.2 matt #endif
917 1.2 matt s = spltty();
918 1.2 matt
919 1.2 matt USART_PUTC(c);
920 1.2 matt
921 1.2 matt #ifdef DEBUG
922 1.2 matt if (c == '\r') {
923 1.2 matt while((USARTREG(USART_SR) & USART_SR_TXEMPTY) == 0)
924 1.2 matt ;
925 1.2 matt }
926 1.2 matt #endif
927 1.2 matt
928 1.2 matt splx(s);
929 1.2 matt }
930 1.2 matt
931 1.2 matt int
932 1.2 matt at91usart_cn_getc(dev_t dev)
933 1.2 matt {
934 1.2 matt int c, sr;
935 1.2 matt int s;
936 1.2 matt #if 0
937 1.2 matt bus_space_tag_t iot = usart_cn_sc.sc_iot;
938 1.2 matt bus_space_handle_t ioh = usart_cn_sc.sc_ioh;
939 1.2 matt #endif
940 1.2 matt
941 1.2 matt s = spltty();
942 1.2 matt
943 1.2 matt while ((c = USART_PEEKC()) == -1) {
944 1.2 matt splx(s);
945 1.2 matt s = spltty();
946 1.2 matt }
947 1.2 matt ;
948 1.2 matt sr = USARTREG(USART_SR);
949 1.2 matt if (ISSET(sr, USART_SR_FRAME) && c == 0) {
950 1.2 matt USARTREG(USART_CR) = USART_CR_RSTSTA; // reset status bits
951 1.2 matt c = CNC_BREAK;
952 1.2 matt }
953 1.2 matt #ifdef DDB
954 1.2 matt extern int db_active;
955 1.2 matt if (!db_active)
956 1.2 matt #endif
957 1.2 matt {
958 1.2 matt int cn_trapped = 0; /* unused */
959 1.2 matt
960 1.2 matt cn_check_magic(dev, c, at91usart_cnm_state);
961 1.2 matt }
962 1.2 matt splx(s);
963 1.2 matt
964 1.2 matt c &= 0xff;
965 1.2 matt
966 1.2 matt return (c);
967 1.2 matt }
968 1.2 matt #endif /* NOTYET */
969 1.2 matt
970 1.2 matt inline static void
971 1.2 matt at91usart_rxsoft(struct at91usart_softc *sc, struct tty *tp, unsigned csr)
972 1.2 matt {
973 1.2 matt u_char *start, *get, *end;
974 1.2 matt int cc;
975 1.2 matt
976 1.2 matt AT91PDC_FIFO_POSTREAD(sc->sc_iot, sc->sc_ioh, sc->sc_dmat, US_PDC,
977 1.2 matt &sc->sc_rx_fifo);
978 1.2 matt
979 1.2 matt if (ISSET(csr, US_CSR_TIMEOUT | US_CSR_RXBRK))
980 1.2 matt at91usart_rx_stopped(sc);
981 1.2 matt
982 1.2 matt while ((start = AT91PDC_FIFO_RDPTR(&sc->sc_rx_fifo, &cc)) != NULL) {
983 1.2 matt int (*rint)(int, struct tty *) = tp->t_linesw->l_rint;
984 1.2 matt int code;
985 1.2 matt
986 1.2 matt if (!ISSET(csr, US_CSR_TIMEOUT | US_CSR_RXBRK))
987 1.2 matt at91usart_rx_started(sc);
988 1.2 matt
989 1.2 matt for (get = start, end = start + cc; get < end; get++) {
990 1.2 matt code = *get;
991 1.2 matt if ((*rint)(code, tp) == -1) {
992 1.2 matt /*
993 1.2 matt * The line discipline's buffer is out of space.
994 1.2 matt */
995 1.2 matt if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
996 1.2 matt /*
997 1.2 matt * We're either not using flow control, or the
998 1.2 matt * line discipline didn't tell us to block for
999 1.2 matt * some reason. Either way, we have no way to
1000 1.2 matt * know when there's more space available, so
1001 1.2 matt * just drop the rest of the data.
1002 1.2 matt */
1003 1.2 matt get = end;
1004 1.2 matt printf("%s: receive missing data!\n",
1005 1.2 matt device_xname(sc->sc_dev));
1006 1.2 matt } else {
1007 1.2 matt /*
1008 1.2 matt * Don't schedule any more receive processing
1009 1.2 matt * until the line discipline tells us there's
1010 1.2 matt * space available (through comhwiflow()).
1011 1.2 matt * Leave the rest of the data in the input
1012 1.2 matt * buffer.
1013 1.2 matt */
1014 1.2 matt SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1015 1.2 matt }
1016 1.2 matt break;
1017 1.2 matt }
1018 1.2 matt }
1019 1.2 matt
1020 1.2 matt // tell we've read some bytes...
1021 1.2 matt AT91PDC_FIFO_READ(&sc->sc_rx_fifo, get - start);
1022 1.2 matt
1023 1.2 matt if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED))
1024 1.2 matt break;
1025 1.2 matt }
1026 1.2 matt
1027 1.2 matt // h/w flow control hook:
1028 1.2 matt if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
1029 1.2 matt at91usart_rx_rts_ctl(sc, (AT91PDC_FIFO_SPACE(&sc->sc_rx_fifo) > PDC_BLOCK_SIZE * 2));
1030 1.2 matt
1031 1.2 matt // write next pointer if USART is ready:
1032 1.2 matt if (AT91PDC_FIFO_PREREAD(sc->sc_iot, sc->sc_ioh, sc->sc_dmat, US_PDC,
1033 1.2 matt &sc->sc_rx_fifo, PDC_BLOCK_SIZE)) {
1034 1.2 matt SET(sc->sc_ier, US_CSR_ENDRX | US_CSR_RXBUFF | US_CSR_TIMEOUT | US_CSR_RXBRK);
1035 1.2 matt } else {
1036 1.2 matt CLR(sc->sc_ier, US_CSR_ENDRX | US_CSR_RXBUFF | US_CSR_TIMEOUT | US_CSR_RXBRK);
1037 1.2 matt }
1038 1.2 matt }
1039 1.2 matt
1040 1.2 matt inline static void
1041 1.2 matt at91usart_txsoft(struct at91usart_softc *sc, struct tty *tp)
1042 1.2 matt {
1043 1.2 matt at91usart_filltx(sc);
1044 1.2 matt if (!ISSET(tp->t_state, TS_BUSY))
1045 1.2 matt (*tp->t_linesw->l_start)(tp);
1046 1.2 matt }
1047 1.2 matt
1048 1.2 matt
1049 1.2 matt static void
1050 1.2 matt at91usart_soft(void* arg)
1051 1.2 matt {
1052 1.2 matt struct at91usart_softc *sc = arg;
1053 1.2 matt int s;
1054 1.2 matt u_int csr;
1055 1.2 matt
1056 1.2 matt if (COM_ISALIVE(sc) == 0)
1057 1.2 matt return;
1058 1.2 matt
1059 1.2 matt s = spltty();
1060 1.2 matt csr = sc->sc_csr;
1061 1.2 matt while (csr != 0) {
1062 1.2 matt if ((csr &= sc->sc_ier) == 0)
1063 1.2 matt break;
1064 1.2 matt // splx(s);
1065 1.2 matt DPRINTFN(5, ("%s: %s / csr = 0x%08x\n", device_xname(sc->sc_dev), __FUNCTION__, csr));
1066 1.2 matt if (ISSET(csr, US_CSR_ENDRX | US_CSR_RXBUFF | US_CSR_TIMEOUT | US_CSR_RXBRK)) {
1067 1.2 matt /* receive interrupt */
1068 1.2 matt if (ISSET(csr, US_CSR_RXBRK)) {
1069 1.2 matt // break received!
1070 1.2 matt at91usart_writereg(sc, US_CR, US_CR_RSTSTA | US_CR_STTTO);
1071 1.2 matt } else if (ISSET(csr, US_CSR_TIMEOUT)) {
1072 1.2 matt // timeout received
1073 1.2 matt at91usart_writereg(sc, US_CR, US_CR_STTTO);
1074 1.2 matt }
1075 1.2 matt at91usart_rxsoft(sc, sc->sc_tty, csr);
1076 1.2 matt }
1077 1.2 matt if (ISSET(csr, US_CSR_TXEMPTY)) {
1078 1.2 matt at91usart_stop_tx(sc);
1079 1.2 matt CLR(sc->sc_ier, US_CSR_TXEMPTY);
1080 1.2 matt if (AT91PDC_FIFO_EMPTY(&sc->sc_tx_fifo)) {
1081 1.2 matt // everything sent!
1082 1.2 matt if (ISSET(sc->sc_tty->t_state, TS_FLUSH))
1083 1.2 matt CLR(sc->sc_tty->t_state, TS_FLUSH);
1084 1.2 matt }
1085 1.2 matt }
1086 1.2 matt if (ISSET(csr, US_CSR_TXEMPTY | US_CSR_ENDTX)) {
1087 1.2 matt /* transmit interrupt! */
1088 1.2 matt at91usart_txsoft(sc, sc->sc_tty);
1089 1.2 matt }
1090 1.2 matt // s = spltty();
1091 1.2 matt csr = at91usart_readreg(sc, US_CSR);
1092 1.2 matt }
1093 1.2 matt sc->sc_csr = 0;
1094 1.2 matt at91usart_writereg(sc, US_IER, sc->sc_ier); // re-enable interrupts
1095 1.2 matt splx(s);
1096 1.2 matt }
1097 1.2 matt
1098 1.2 matt
1099 1.2 matt static int
1100 1.2 matt at91usart_intr(void* arg)
1101 1.2 matt {
1102 1.2 matt struct at91usart_softc *sc = arg;
1103 1.2 matt u_int csr, imr;
1104 1.2 matt
1105 1.2 matt // get out if interrupts are not enabled
1106 1.2 matt imr = at91usart_readreg(sc, US_IMR);
1107 1.2 matt if (!imr)
1108 1.2 matt return 0;
1109 1.2 matt // get out if pending interrupt is not enabled
1110 1.2 matt csr = at91usart_readreg(sc, US_CSR);
1111 1.2 matt DPRINTFN(6,("%s: csr=%08X imr=%08X\n", device_xname(sc->sc_dev), csr, imr));
1112 1.2 matt if (!ISSET(csr, imr))
1113 1.2 matt return 0;
1114 1.2 matt
1115 1.2 matt // ok, we DO have some interrupts to serve! let softint do it
1116 1.2 matt sc->sc_csr = csr;
1117 1.2 matt at91usart_writereg(sc, US_IDR, -1);
1118 1.2 matt
1119 1.2 matt /* Wake up the poller. */
1120 1.2 matt softint_schedule(sc->sc_si);
1121 1.2 matt
1122 1.2 matt /* we're done for now */
1123 1.2 matt return (1);
1124 1.2 matt
1125 1.2 matt }
1126