bcm2835_bsc.c revision 1.11
1 /* $NetBSD: bcm2835_bsc.c,v 1.11 2018/05/09 02:53:00 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2012 Jonathan A. Kollasch 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 20 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 26 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: bcm2835_bsc.c,v 1.11 2018/05/09 02:53:00 thorpej Exp $"); 31 32 #if defined(_KERNEL_OPT) 33 #include "opt_kernhist.h" 34 #endif 35 36 #include <sys/param.h> 37 #include <sys/bus.h> 38 #include <sys/device.h> 39 #include <sys/kernhist.h> 40 #include <sys/intr.h> 41 #include <sys/mutex.h> 42 #include <sys/once.h> 43 #include <sys/systm.h> 44 45 #include <dev/i2c/i2cvar.h> 46 47 #include <arm/broadcom/bcm2835reg.h> 48 #include <arm/broadcom/bcm2835_bscreg.h> 49 50 #include <dev/fdt/fdtvar.h> 51 52 KERNHIST_DEFINE(bsciichist); 53 54 struct bsciic_softc { 55 device_t sc_dev; 56 bus_space_tag_t sc_iot; 57 bus_space_handle_t sc_ioh; 58 struct i2c_controller sc_i2c; 59 kmutex_t sc_buslock; 60 void *sc_inth; 61 62 struct clk *sc_clk; 63 u_int sc_frequency; 64 u_int sc_clkrate; 65 }; 66 67 static int bsciic_match(device_t, cfdata_t, void *); 68 static void bsciic_attach(device_t, device_t, void *); 69 70 void bsciic_dump_regs(struct bsciic_softc * const); 71 72 static int bsciic_acquire_bus(void *, int); 73 static void bsciic_release_bus(void *, int); 74 static int bsciic_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t, 75 void *, size_t, int); 76 77 CFATTACH_DECL_NEW(bsciic, sizeof(struct bsciic_softc), 78 bsciic_match, bsciic_attach, NULL, NULL); 79 80 static int 81 bsciic_init(void) 82 { 83 84 KERNHIST_INIT(bsciichist, 512); 85 86 return 0; 87 } 88 89 static int 90 bsciic_match(device_t parent, cfdata_t match, void *aux) 91 { 92 const char * const compatible[] = { "brcm,bcm2835-i2c", NULL }; 93 struct fdt_attach_args * const faa = aux; 94 95 return of_match_compatible(faa->faa_phandle, compatible); 96 } 97 98 static void 99 bsciic_attach(device_t parent, device_t self, void *aux) 100 { 101 struct bsciic_softc * const sc = device_private(self); 102 struct fdt_attach_args * const faa = aux; 103 const int phandle = faa->faa_phandle; 104 prop_dictionary_t prop = device_properties(self); 105 prop_dictionary_t devs; 106 uint32_t address_cells; 107 struct i2cbus_attach_args iba; 108 bool disable = false; 109 110 static ONCE_DECL(control); 111 RUN_ONCE(&control, bsciic_init); 112 113 bus_addr_t addr; 114 bus_size_t size; 115 116 sc->sc_dev = self; 117 sc->sc_iot = faa->faa_bst; 118 119 int error = fdtbus_get_reg(phandle, 0, &addr, &size); 120 if (error) { 121 aprint_error(": unable to get device registers\n"); 122 return; 123 } 124 125 prop_dictionary_get_bool(prop, "disable", &disable); 126 if (disable) { 127 aprint_naive(": disabled\n"); 128 aprint_normal(": disabled\n"); 129 return; 130 } 131 132 /* Enable clock */ 133 sc->sc_clk = fdtbus_clock_get_index(phandle, 0); 134 if (sc->sc_clk == NULL) { 135 aprint_error(": couldn't acquire clock\n"); 136 return; 137 } 138 139 if (clk_enable(sc->sc_clk) != 0) { 140 aprint_error(": failed to enable clock\n"); 141 return; 142 } 143 144 sc->sc_frequency = clk_get_rate(sc->sc_clk); 145 146 if (of_getprop_uint32(phandle, "clock-frequency", 147 &sc->sc_clkrate) != 0) { 148 sc->sc_clkrate = 100000; 149 } 150 151 if (bus_space_map(sc->sc_iot, addr, size, 0, &sc->sc_ioh)) { 152 aprint_error_dev(sc->sc_dev, "unable to map device\n"); 153 return; 154 } 155 156 aprint_naive("\n"); 157 aprint_normal(": Broadcom Serial Controller\n"); 158 159 mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE); 160 161 /* clear FIFO, disable controller */ 162 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_C, BSC_C_CLEAR_CLEAR); 163 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_S, BSC_S_CLKT | 164 BSC_S_ERR | BSC_S_DONE); 165 166 u_int divider = howmany(sc->sc_frequency, sc->sc_clkrate); 167 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_DIV, 168 __SHIFTIN(divider, BSC_DIV_CDIV)); 169 170 sc->sc_i2c.ic_cookie = sc; 171 sc->sc_i2c.ic_acquire_bus = bsciic_acquire_bus; 172 sc->sc_i2c.ic_release_bus = bsciic_release_bus; 173 sc->sc_i2c.ic_exec = bsciic_exec; 174 175 devs = prop_dictionary_create(); 176 if (of_getprop_uint32(phandle, "#address-cells", &address_cells)) 177 address_cells = 1; 178 179 of_enter_i2c_devs(devs, phandle, address_cells * 4, 0); 180 181 memset(&iba, 0, sizeof(iba)); 182 iba.iba_tag = &sc->sc_i2c; 183 iba.iba_child_devices = prop_dictionary_get(devs, "i2c-child-devices"); 184 if (iba.iba_child_devices) 185 prop_object_retain(iba.iba_child_devices); 186 prop_object_release(devs); 187 188 config_found_ia(self, "i2cbus", &iba, iicbus_print); 189 } 190 191 void 192 bsciic_dump_regs(struct bsciic_softc * const sc) 193 { 194 KERNHIST_FUNC(__func__); 195 KERNHIST_CALLED(bsciichist); 196 197 KERNHIST_LOG(bsciichist, "C %08jx S %08jx D %08jx A %08jx", 198 bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_C), 199 bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_S), 200 bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_DLEN), 201 bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_A) 202 ); 203 } 204 205 static int 206 bsciic_acquire_bus(void *v, int flags) 207 { 208 struct bsciic_softc * const sc = v; 209 uint32_t s __diagused; 210 211 mutex_enter(&sc->sc_buslock); 212 213 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_S, BSC_S_CLKT | 214 BSC_S_ERR | BSC_S_DONE); 215 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_C, BSC_C_I2CEN | 216 BSC_C_CLEAR_CLEAR); 217 s = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_S); 218 KASSERT((s & BSC_S_TA) == 0); 219 220 return 0; 221 } 222 223 static void 224 bsciic_release_bus(void *v, int flags) 225 { 226 struct bsciic_softc * const sc = v; 227 228 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_C, BSC_C_CLEAR_CLEAR); 229 230 mutex_exit(&sc->sc_buslock); 231 } 232 233 static int 234 bsciic_exec(void *v, i2c_op_t op, i2c_addr_t addr, const void *cmdbuf, 235 size_t cmdlen, void *databuf, size_t datalen, int flags) 236 { 237 KERNHIST_FUNC(__func__); KERNHIST_CALLED(bsciichist); 238 struct bsciic_softc * const sc = v; 239 uint32_t c, s, dlen, a; 240 uint32_t j; 241 uint8_t *buf; 242 size_t len; 243 size_t pos; 244 int error = 0; 245 const bool isread = I2C_OP_READ_P(op); 246 247 flags |= I2C_F_POLL; 248 249 #if 0 250 device_printf(sc->sc_dev, "exec: op %d, addr 0x%x, cmdbuf %p, " 251 "cmdlen %zu, databuf %p, datalen %zu, flags 0x%x\n", 252 op, addr, cmdbuf, cmdlen, databuf, datalen, flags); 253 #endif 254 255 a = __SHIFTIN(addr, BSC_A_ADDR); 256 c = BSC_C_I2CEN | BSC_C_CLEAR_CLEAR; 257 #if notyet 258 c |= BSC_C_INTR | BSC_C_INTT | BSC_C_INTD; 259 #endif 260 261 if (isread && cmdlen == 0) 262 goto only_read; 263 264 buf = __UNCONST(cmdbuf); 265 len = cmdlen; 266 267 if (isread) 268 dlen = cmdlen; 269 else 270 dlen = cmdlen + datalen; 271 dlen = __SHIFTIN(dlen, BSC_DLEN_DLEN); 272 273 s = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_S); 274 if ((s & BSC_S_TA) != 0) 275 bsciic_dump_regs(sc); 276 KASSERT((s & BSC_S_TA) == 0); 277 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_DLEN, dlen); 278 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_A, a); 279 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_C, c | BSC_C_ST); 280 281 do { 282 s = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_S); 283 } while ((s & BSC_S_TA) == 0); 284 285 flood_again: 286 KERNHIST_LOG(bsciichist, "flood top %#jx %ju", 287 (uintptr_t)buf, len, 0, 0); 288 j = 10000000; 289 for (pos = 0; pos < len; ) { 290 if (--j == 0) 291 return -1; 292 s = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_S); 293 KERNHIST_LOG(bsciichist, "w s %08jx", s, 0, 0, 0); 294 if ((s & BSC_S_CLKT) != 0) { 295 error = EIO; 296 goto done; 297 } 298 if ((s & BSC_S_ERR) != 0) { 299 error = EIO; 300 goto done; 301 } 302 if ((s & BSC_S_DONE) != 0) 303 break; 304 if ((s & BSC_S_TXD) == 0) 305 continue; 306 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_FIFO, buf[pos]); 307 KERNHIST_LOG(bsciichist, "w %#jx %#jx %02jx", 308 (uintptr_t)buf, (uintptr_t)&buf[pos], 309 buf[pos], 0); 310 pos++; 311 } 312 KERNHIST_LOG(bsciichist, "flood bot %#jx %ju", 313 (uintptr_t)buf, len, 0, 0); 314 315 if (buf == cmdbuf && !isread) { 316 buf = databuf; 317 len = datalen; 318 goto flood_again; 319 } 320 321 do { 322 s = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_S); 323 } while ((s & BSC_S_TA) != 0); 324 325 s = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_S); 326 s &= BSC_S_CLKT|BSC_S_ERR|BSC_S_DONE; 327 KASSERT((s & BSC_S_DONE) != 0); 328 if (s != 0) 329 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_S, s); 330 331 if (error == 0 && (s & (BSC_S_CLKT|BSC_S_ERR)) != 0) 332 error = EIO; 333 334 if (!isread) 335 goto done; 336 337 only_read: 338 c |= BSC_C_READ; 339 340 buf = databuf; 341 len = datalen; 342 dlen = datalen; 343 344 dlen = __SHIFTIN(dlen, BSC_DLEN_DLEN); 345 #if 0 346 KASSERT(dlen >= 1); 347 #endif 348 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_DLEN, dlen); 349 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_A, a); 350 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_C, c | BSC_C_ST); 351 352 do { 353 s = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_S); 354 } while ((s & BSC_S_TA) == 0); 355 356 KERNHIST_LOG(bsciichist, "drain top %#jx %ju", 357 (uintptr_t)buf, len, 0, 0); 358 j = 10000000; 359 for (pos = 0; pos < len; ) { 360 if (--j == 0) 361 return -1; 362 s = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_S); 363 KERNHIST_LOG(bsciichist, "r s %08jx", s, 0, 0, 0); 364 if ((s & BSC_S_CLKT) != 0) { 365 error = EIO; 366 goto done; 367 } 368 if ((s & BSC_S_ERR) != 0) { 369 error = EIO; 370 goto done; 371 } 372 if ((s & BSC_S_DONE) != 0) 373 break; 374 if ((s & BSC_S_RXD) == 0) 375 continue; 376 j = 10000000; 377 buf[pos] = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_FIFO); 378 KERNHIST_LOG(bsciichist, "r %#jx %#jx %02jx", 379 (uintptr_t)buf, (uintptr_t)&buf[pos], 380 buf[pos], 0); 381 pos++; 382 } 383 KERNHIST_LOG(bsciichist, "drain bot %#jx %ju", (uintptr_t)buf, len, 384 0, 0); 385 386 do { 387 s = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_S); 388 } while ((s & BSC_S_TA) != 0); 389 390 s = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_S); 391 s &= BSC_S_CLKT|BSC_S_ERR|BSC_S_DONE; 392 KASSERT((s & BSC_S_DONE) != 0); 393 if (s != 0) 394 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_S, s); 395 396 done: 397 bsciic_dump_regs(sc); 398 399 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_DLEN, 0); 400 401 do { 402 s = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_S); 403 } while ((s & BSC_S_TA) != 0); 404 405 bsciic_dump_regs(sc); 406 407 s = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BSC_S); 408 s &= BSC_S_CLKT|BSC_S_ERR|BSC_S_DONE; 409 if (s != 0) 410 bus_space_write_4(sc->sc_iot, sc->sc_ioh, BSC_S, s); 411 412 bsciic_dump_regs(sc); 413 414 if (error == 0 && (s & (BSC_S_CLKT|BSC_S_ERR)) != 0) 415 error = EIO; 416 417 return error; 418 } 419
Indexes created Tue Oct 21 16:10:11 GMT 2025