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      1 /*	$NetBSD: epwdogreg.h,v 1.1 2005/11/12 05:33:23 hamajima Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2005 HAMAJIMA Katsuomi. All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  *
     15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     25  * SUCH DAMAGE.
     26  */
     27 
     28 /*	Cirrus Logic EP9315
     29 	Watchdog Timer register
     30 	http://www.cirrus.com/jp/pubs/manual/EP9315_Users_Guide.pdf	*/
     31 
     32 #ifndef	_EPWDOGREG_H_
     33 #define	_EPWDOGREG_H_
     34 
     35 #define	EP93XX_WDOG_Ctrl	0x00	/* Control Register */
     36 		/* read */
     37 #define	 EP93XX_WDOG_PLSDSN	(1<<6)
     38 #define	 EP93XX_WDOG_OVRID	(1<<5)
     39 #define	 EP93XX_WDOG_SWDIS	(1<<4)
     40 #define	 EP93XX_WDOG_HWDIS	(1<<3)
     41 #define	 EP93XX_WDOG_URST	(1<<2)
     42 #define	 EP93XX_WDOG_K3RST	(1<<1)
     43 #define	 EP93XX_WDOG_WD		(1<<0)
     44 		/* write */
     45 #define	 EP93XX_WDOG_RESTART	0x5555
     46 #define	 EP93XX_WDOG_DISABLE	0xaa55
     47 #define	 EP93XX_WDOG_ENABLE	0xaaaa
     48 
     49 #define	EP93XX_WDOG_Status	0x04	/* Status Register (R/W) */
     50 #define	 EP93XX_WDOG_STAT_MASK	0x0000007f
     51 
     52 #endif	/* _EPWDOGREG_H_ */
     53