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a9ptmr_fdt.c revision 1.6 
      1 /* $NetBSD: a9ptmr_fdt.c,v 1.6 2022/11/01 11:05:18 jmcneill Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2019 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Nick Hudson
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include <sys/cdefs.h>
     33 __KERNEL_RCSID(0, "$NetBSD: a9ptmr_fdt.c,v 1.6 2022/11/01 11:05:18 jmcneill Exp $");
     34 
     35 #include <sys/param.h>
     36 #include <sys/bus.h>
     37 
     38 #include <sys/device.h>
     39 #include <sys/intr.h>
     40 
     41 #include <arm/cortex/mpcore_var.h>
     42 #include <arm/cortex/a9ptmr_var.h>
     43 
     44 #include <arm/armreg.h>
     45 
     46 #include <dev/fdt/fdtvar.h>
     47 #include <arm/fdt/arm_fdtvar.h>
     48 
     49 static int	a9ptmr_fdt_match(device_t, cfdata_t, void *);
     50 static void	a9ptmr_fdt_attach(device_t, device_t, void *);
     51 
     52 static void	a9ptmr_fdt_cpu_hatch(void *, struct cpu_info *);
     53 
     54 struct a9ptmr_fdt_softc {
     55 	device_t	sc_dev;
     56 	struct clk	*sc_clk;
     57 };
     58 
     59 CFATTACH_DECL_NEW(a9ptmr_fdt, sizeof(struct a9ptmr_fdt_softc),
     60     a9ptmr_fdt_match, a9ptmr_fdt_attach, NULL, NULL);
     61 
     62 static const struct device_compatible_entry compat_data[] = {
     63 	{ .compat = "arm,cortex-a9-twd-timer" },
     64 	{ .compat = "arm,cortex-a5-twd-timer" },
     65 	DEVICE_COMPAT_EOL
     66 };
     67 
     68 static int
     69 a9ptmr_fdt_match(device_t parent, cfdata_t cf, void *aux)
     70 {
     71 	struct fdt_attach_args * const faa = aux;
     72 
     73 	return of_compatible_match(faa->faa_phandle, compat_data);
     74 }
     75 
     76 static void
     77 a9ptmr_fdt_attach(device_t parent, device_t self, void *aux)
     78 {
     79 	struct a9ptmr_fdt_softc * const sc = device_private(self);
     80 	struct fdt_attach_args * const faa = aux;
     81 	const int phandle = faa->faa_phandle;
     82 	bus_space_handle_t bsh;
     83 	uint32_t mpidr;
     84 	bool is_hardclock;
     85 
     86 	sc->sc_dev = self;
     87 	sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
     88 	if (sc->sc_clk == NULL) {
     89 		aprint_error(": couldn't get clock\n");
     90 		return;
     91 	}
     92 	if (clk_enable(sc->sc_clk) != 0) {
     93 		aprint_error(": couldn't enable clock\n");
     94 		return;
     95 	}
     96 
     97 	uint32_t rate = clk_get_rate(sc->sc_clk);
     98 	prop_dictionary_t dict = device_properties(self);
     99 	prop_dictionary_set_uint32(dict, "frequency", rate);
    100 
    101 	char intrstr[128];
    102 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
    103 		aprint_error(": failed to decode interrupt\n");
    104 		return;
    105 	}
    106 
    107 	aprint_naive("\n");
    108 	aprint_normal("\n");
    109 
    110 	mpidr = armreg_mpidr_read();
    111 	is_hardclock = (mpidr & MPIDR_U) == 0;	/* Use private timer for SMP */
    112 
    113 	if (is_hardclock) {
    114 		void *ih = fdtbus_intr_establish_xname(phandle, 0, IPL_CLOCK,
    115 		    FDT_INTR_MPSAFE, a9ptmr_intr, NULL, device_xname(self));
    116 		if (ih == NULL) {
    117 			aprint_error_dev(self, "couldn't install interrupt handler\n");
    118 			return;
    119 		}
    120 		aprint_normal_dev(self, "interrupting on %s\n", intrstr);
    121 	}
    122 
    123 	bus_addr_t addr;
    124 	bus_size_t size;
    125 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
    126 		aprint_error(": couldn't get registers\n");
    127 		return;
    128 	}
    129 	if (bus_space_map(faa->faa_bst, addr, size, 0, &bsh)) {
    130 		aprint_error(": couldn't map registers\n");
    131 		return;
    132 	}
    133 
    134 	struct mpcore_attach_args mpcaa = {
    135 		.mpcaa_name = "arma9ptmr",
    136 		.mpcaa_memt = faa->faa_bst,
    137 		.mpcaa_memh = bsh,
    138 		.mpcaa_irq = -1,
    139 	};
    140 
    141 	config_found(self, &mpcaa, NULL, CFARGS_NONE);
    142 
    143 	if (is_hardclock) {
    144 		arm_fdt_cpu_hatch_register(self, a9ptmr_fdt_cpu_hatch);
    145 		arm_fdt_timer_register(a9ptmr_cpu_initclocks);
    146 	}
    147 }
    148 
    149 static void
    150 a9ptmr_fdt_cpu_hatch(void *priv, struct cpu_info *ci)
    151 {
    152 	a9ptmr_init_cpu_clock(ci);
    153 }
    154