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gemini_gpio.c revision 1.2.2.2
      1  1.2.2.2  mjf /*	$NetBSD: gemini_gpio.c,v 1.2.2.2 2009/01/17 13:27:52 mjf Exp $	*/
      2  1.2.2.2  mjf 
      3  1.2.2.2  mjf /* adapted from
      4  1.2.2.2  mjf  *	$NetBSD: omap2_gpio.c,v 1.6 2008/11/19 06:26:27 matt Exp
      5  1.2.2.2  mjf  */
      6  1.2.2.2  mjf 
      7  1.2.2.2  mjf /*-
      8  1.2.2.2  mjf  * Copyright (c) 2007 The NetBSD Foundation, Inc.
      9  1.2.2.2  mjf  * All rights reserved.
     10  1.2.2.2  mjf  *
     11  1.2.2.2  mjf  * This code is derived from software contributed to The NetBSD Foundation
     12  1.2.2.2  mjf  * by Matt Thomas
     13  1.2.2.2  mjf  *
     14  1.2.2.2  mjf  * Redistribution and use in source and binary forms, with or without
     15  1.2.2.2  mjf  * modification, are permitted provided that the following conditions
     16  1.2.2.2  mjf  * are met:
     17  1.2.2.2  mjf  * 1. Redistributions of source code must retain the above copyright
     18  1.2.2.2  mjf  *    notice, this list of conditions and the following disclaimer.
     19  1.2.2.2  mjf  * 2. Redistributions in binary form must reproduce the above copyright
     20  1.2.2.2  mjf  *    notice, this list of conditions and the following disclaimer in the
     21  1.2.2.2  mjf  *    documentation and/or other materials provided with the distribution.
     22  1.2.2.2  mjf  *
     23  1.2.2.2  mjf  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     24  1.2.2.2  mjf  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     25  1.2.2.2  mjf  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     26  1.2.2.2  mjf  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     27  1.2.2.2  mjf  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     28  1.2.2.2  mjf  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     29  1.2.2.2  mjf  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     30  1.2.2.2  mjf  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     31  1.2.2.2  mjf  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     32  1.2.2.2  mjf  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     33  1.2.2.2  mjf  * POSSIBILITY OF SUCH DAMAGE.
     34  1.2.2.2  mjf  */
     35  1.2.2.2  mjf #include <sys/cdefs.h>
     36  1.2.2.2  mjf __KERNEL_RCSID(0, "$NetBSD: gemini_gpio.c,v 1.2.2.2 2009/01/17 13:27:52 mjf Exp $");
     37  1.2.2.2  mjf 
     38  1.2.2.2  mjf #define _INTR_PRIVATE
     39  1.2.2.2  mjf 
     40  1.2.2.2  mjf #include "locators.h"
     41  1.2.2.2  mjf #include "gpio.h"
     42  1.2.2.2  mjf #include "geminigmac.h"
     43  1.2.2.2  mjf #include "opt_gemini.h"
     44  1.2.2.2  mjf 
     45  1.2.2.2  mjf #include <sys/param.h>
     46  1.2.2.2  mjf #include <sys/evcnt.h>
     47  1.2.2.2  mjf #include <sys/atomic.h>
     48  1.2.2.2  mjf 
     49  1.2.2.2  mjf #include <uvm/uvm_extern.h>
     50  1.2.2.2  mjf 
     51  1.2.2.2  mjf #include <machine/intr.h>
     52  1.2.2.2  mjf 
     53  1.2.2.2  mjf #include <arm/cpu.h>
     54  1.2.2.2  mjf #include <arm/armreg.h>
     55  1.2.2.2  mjf #include <arm/cpufunc.h>
     56  1.2.2.2  mjf 
     57  1.2.2.2  mjf #include <machine/bus.h>
     58  1.2.2.2  mjf 
     59  1.2.2.2  mjf #include <arm/gemini/gemini_reg.h>
     60  1.2.2.2  mjf #include <arm/gemini/gemini_obiovar.h>
     61  1.2.2.2  mjf #include <arm/gemini/gemini_gpiovar.h>
     62  1.2.2.2  mjf #include <arm/pic/picvar.h>
     63  1.2.2.2  mjf 
     64  1.2.2.2  mjf #if NGPIO > 0
     65  1.2.2.2  mjf #include <sys/gpio.h>
     66  1.2.2.2  mjf #include <dev/gpio/gpiovar.h>
     67  1.2.2.2  mjf #endif
     68  1.2.2.2  mjf 
     69  1.2.2.2  mjf static void gpio_pic_block_irqs(struct pic_softc *, size_t, uint32_t);
     70  1.2.2.2  mjf static void gpio_pic_unblock_irqs(struct pic_softc *, size_t, uint32_t);
     71  1.2.2.2  mjf static int gpio_pic_find_pending_irqs(struct pic_softc *);
     72  1.2.2.2  mjf static void gpio_pic_establish_irq(struct pic_softc *, struct intrsource *);
     73  1.2.2.2  mjf 
     74  1.2.2.2  mjf const struct pic_ops gpio_pic_ops = {
     75  1.2.2.2  mjf 	.pic_block_irqs = gpio_pic_block_irqs,
     76  1.2.2.2  mjf 	.pic_unblock_irqs = gpio_pic_unblock_irqs,
     77  1.2.2.2  mjf 	.pic_find_pending_irqs = gpio_pic_find_pending_irqs,
     78  1.2.2.2  mjf 	.pic_establish_irq = gpio_pic_establish_irq,
     79  1.2.2.2  mjf };
     80  1.2.2.2  mjf 
     81  1.2.2.2  mjf struct gpio_softc {
     82  1.2.2.2  mjf 	device_t gpio_dev;
     83  1.2.2.2  mjf 	struct pic_softc gpio_pic;
     84  1.2.2.2  mjf 	struct intrsource *gpio_is;
     85  1.2.2.2  mjf 	bus_space_tag_t gpio_memt;
     86  1.2.2.2  mjf 	bus_space_handle_t gpio_memh;
     87  1.2.2.2  mjf 	uint32_t gpio_enable_mask;
     88  1.2.2.2  mjf 	uint32_t gpio_edge_mask;
     89  1.2.2.2  mjf 	uint32_t gpio_edge_falling_mask;
     90  1.2.2.2  mjf 	uint32_t gpio_edge_rising_mask;
     91  1.2.2.2  mjf 	uint32_t gpio_level_mask;
     92  1.2.2.2  mjf 	uint32_t gpio_level_hi_mask;
     93  1.2.2.2  mjf 	uint32_t gpio_level_lo_mask;
     94  1.2.2.2  mjf 	uint32_t gpio_inuse_mask;
     95  1.2.2.2  mjf #if NGPIO > 0
     96  1.2.2.2  mjf 	struct gpio_chipset_tag gpio_chipset;
     97  1.2.2.2  mjf 	gpio_pin_t gpio_pins[32];
     98  1.2.2.2  mjf #endif
     99  1.2.2.2  mjf };
    100  1.2.2.2  mjf 
    101  1.2.2.2  mjf #define	PIC_TO_SOFTC(pic) \
    102  1.2.2.2  mjf 	((struct gpio_softc *)((char *)(pic) - \
    103  1.2.2.2  mjf 		offsetof(struct gpio_softc, gpio_pic)))
    104  1.2.2.2  mjf 
    105  1.2.2.2  mjf #define	GPIO_READ(gpio, reg) \
    106  1.2.2.2  mjf 	bus_space_read_4((gpio)->gpio_memt, (gpio)->gpio_memh, (reg))
    107  1.2.2.2  mjf #define	GPIO_WRITE(gpio, reg, val) \
    108  1.2.2.2  mjf 	bus_space_write_4((gpio)->gpio_memt, (gpio)->gpio_memh, (reg), (val))
    109  1.2.2.2  mjf 
    110  1.2.2.2  mjf void
    111  1.2.2.2  mjf gpio_pic_unblock_irqs(struct pic_softc *pic, size_t irq_base, uint32_t irq_mask)
    112  1.2.2.2  mjf {
    113  1.2.2.2  mjf 	struct gpio_softc * const gpio = PIC_TO_SOFTC(pic);
    114  1.2.2.2  mjf 	KASSERT(irq_base == 0);
    115  1.2.2.2  mjf 
    116  1.2.2.2  mjf 	gpio->gpio_enable_mask |= irq_mask;
    117  1.2.2.2  mjf 	/*
    118  1.2.2.2  mjf 	 * If this a level source, ack it now.  If it's still asserted
    119  1.2.2.2  mjf 	 * it'll come back.
    120  1.2.2.2  mjf 	 */
    121  1.2.2.2  mjf 	GPIO_WRITE(gpio, GEMINI_GPIO_INTRENB, gpio->gpio_enable_mask);
    122  1.2.2.2  mjf 	if (irq_mask & gpio->gpio_level_mask)
    123  1.2.2.2  mjf 		GPIO_WRITE(gpio, GEMINI_GPIO_INTRCLR,
    124  1.2.2.2  mjf 		    irq_mask & gpio->gpio_level_mask);
    125  1.2.2.2  mjf }
    126  1.2.2.2  mjf 
    127  1.2.2.2  mjf void
    128  1.2.2.2  mjf gpio_pic_block_irqs(struct pic_softc *pic, size_t irq_base, uint32_t irq_mask)
    129  1.2.2.2  mjf {
    130  1.2.2.2  mjf 	struct gpio_softc * const gpio = PIC_TO_SOFTC(pic);
    131  1.2.2.2  mjf 	KASSERT(irq_base == 0);
    132  1.2.2.2  mjf 
    133  1.2.2.2  mjf 	gpio->gpio_enable_mask &= ~irq_mask;
    134  1.2.2.2  mjf 	GPIO_WRITE(gpio, GEMINI_GPIO_INTRENB, ~irq_mask);
    135  1.2.2.2  mjf 	/*
    136  1.2.2.2  mjf 	 * If any of the sources are edge triggered, ack them now so
    137  1.2.2.2  mjf 	 * we won't lose them.
    138  1.2.2.2  mjf 	 */
    139  1.2.2.2  mjf 	if (irq_mask & gpio->gpio_edge_mask)
    140  1.2.2.2  mjf 		GPIO_WRITE(gpio, GEMINI_GPIO_INTRCLR,
    141  1.2.2.2  mjf 		    irq_mask & gpio->gpio_edge_mask);
    142  1.2.2.2  mjf }
    143  1.2.2.2  mjf 
    144  1.2.2.2  mjf int
    145  1.2.2.2  mjf gpio_pic_find_pending_irqs(struct pic_softc *pic)
    146  1.2.2.2  mjf {
    147  1.2.2.2  mjf 	struct gpio_softc * const gpio = PIC_TO_SOFTC(pic);
    148  1.2.2.2  mjf 	uint32_t pending;
    149  1.2.2.2  mjf 
    150  1.2.2.2  mjf 	pending = GPIO_READ(gpio, GEMINI_GPIO_INTRMSKSTATE);
    151  1.2.2.2  mjf 	KASSERT((pending & ~gpio->gpio_enable_mask) == 0);
    152  1.2.2.2  mjf 	if (pending == 0)
    153  1.2.2.2  mjf 		return 0;
    154  1.2.2.2  mjf 
    155  1.2.2.2  mjf 	/*
    156  1.2.2.2  mjf 	 * Now find all the pending bits and mark them as pending.
    157  1.2.2.2  mjf 	 */
    158  1.2.2.2  mjf 	(void) pic_mark_pending_sources(&gpio->gpio_pic, 0, pending);
    159  1.2.2.2  mjf 
    160  1.2.2.2  mjf 	return 1;
    161  1.2.2.2  mjf }
    162  1.2.2.2  mjf 
    163  1.2.2.2  mjf void
    164  1.2.2.2  mjf gpio_pic_establish_irq(struct pic_softc *pic, struct intrsource *is)
    165  1.2.2.2  mjf {
    166  1.2.2.2  mjf 	struct gpio_softc * const gpio = PIC_TO_SOFTC(pic);
    167  1.2.2.2  mjf 	KASSERT(is->is_irq < 32);
    168  1.2.2.2  mjf 	uint32_t irq_mask = __BIT(is->is_irq);
    169  1.2.2.2  mjf 	uint32_t v;
    170  1.2.2.2  mjf #if 0
    171  1.2.2.2  mjf 	unsigned int i;
    172  1.2.2.2  mjf 	struct intrsource *maybe_is;
    173  1.2.2.2  mjf #endif
    174  1.2.2.2  mjf 
    175  1.2.2.2  mjf 	/*
    176  1.2.2.2  mjf 	 * Make sure the irq isn't enabled and not asserting.
    177  1.2.2.2  mjf 	 */
    178  1.2.2.2  mjf 	gpio->gpio_enable_mask &= ~irq_mask;
    179  1.2.2.2  mjf 	GPIO_WRITE(gpio, GEMINI_GPIO_INTRENB, gpio->gpio_enable_mask);
    180  1.2.2.2  mjf 	GPIO_WRITE(gpio, GEMINI_GPIO_INTRCLR, irq_mask);
    181  1.2.2.2  mjf 
    182  1.2.2.2  mjf 	/*
    183  1.2.2.2  mjf 	 * Convert the type to a gpio type and figure out which bits in what
    184  1.2.2.2  mjf 	 * register we have to tweak.
    185  1.2.2.2  mjf 	 */
    186  1.2.2.2  mjf 	gpio->gpio_edge_rising_mask &= ~irq_mask;
    187  1.2.2.2  mjf 	gpio->gpio_edge_falling_mask &= ~irq_mask;
    188  1.2.2.2  mjf 	gpio->gpio_level_hi_mask &= ~irq_mask;
    189  1.2.2.2  mjf 	gpio->gpio_level_lo_mask &= ~irq_mask;
    190  1.2.2.2  mjf 	switch (is->is_type) {
    191  1.2.2.2  mjf 	case IST_LEVEL_LOW: gpio->gpio_level_lo_mask |= irq_mask; break;
    192  1.2.2.2  mjf 	case IST_LEVEL_HIGH: gpio->gpio_level_hi_mask |= irq_mask; break;
    193  1.2.2.2  mjf 	case IST_EDGE_FALLING: gpio->gpio_edge_falling_mask |= irq_mask; break;
    194  1.2.2.2  mjf 	case IST_EDGE_RISING: gpio->gpio_edge_rising_mask |= irq_mask; break;
    195  1.2.2.2  mjf 	case IST_EDGE_BOTH:
    196  1.2.2.2  mjf 		gpio->gpio_edge_rising_mask |= irq_mask;
    197  1.2.2.2  mjf 		gpio->gpio_edge_falling_mask |= irq_mask;
    198  1.2.2.2  mjf 		break;
    199  1.2.2.2  mjf 	default:
    200  1.2.2.2  mjf 		panic("%s: unknown is_type %d\n", __FUNCTION__, is->is_type);
    201  1.2.2.2  mjf 	}
    202  1.2.2.2  mjf 	gpio->gpio_edge_mask =
    203  1.2.2.2  mjf 	    gpio->gpio_edge_rising_mask | gpio->gpio_edge_falling_mask;
    204  1.2.2.2  mjf 	gpio->gpio_level_mask =
    205  1.2.2.2  mjf 	    gpio->gpio_level_hi_mask|gpio->gpio_level_lo_mask;
    206  1.2.2.2  mjf 	gpio->gpio_inuse_mask |= irq_mask;
    207  1.2.2.2  mjf 
    208  1.2.2.2  mjf 	/*
    209  1.2.2.2  mjf 	 * Set the interrupt type.
    210  1.2.2.2  mjf 	 */
    211  1.2.2.2  mjf 	GPIO_WRITE(gpio, GEMINI_GPIO_INTRTRIG, gpio->gpio_level_mask);
    212  1.2.2.2  mjf 	GPIO_WRITE(gpio, GEMINI_GPIO_INTREDGEBOTH,
    213  1.2.2.2  mjf 		gpio->gpio_edge_rising_mask & gpio->gpio_edge_falling_mask);
    214  1.2.2.2  mjf 	GPIO_WRITE(gpio, GEMINI_GPIO_INTRDIR,
    215  1.2.2.2  mjf 		gpio->gpio_edge_falling_mask | gpio->gpio_level_lo_mask);
    216  1.2.2.2  mjf 
    217  1.2.2.2  mjf 	/*
    218  1.2.2.2  mjf 	 * Mark it as input by clearning bit(s) in PINDIR reg
    219  1.2.2.2  mjf 	 */
    220  1.2.2.2  mjf 	v = GPIO_READ(gpio, GEMINI_GPIO_PINDIR);
    221  1.2.2.2  mjf 	v &= ~irq_mask;
    222  1.2.2.2  mjf 	GPIO_WRITE(gpio, GEMINI_GPIO_PINDIR, v);
    223  1.2.2.2  mjf #if 0
    224  1.2.2.2  mjf 	for (i = 0, maybe_is = NULL; i < 32; i++) {
    225  1.2.2.2  mjf 		if ((is = pic->pic_sources[i]) != NULL) {
    226  1.2.2.2  mjf 			if (maybe_is == NULL || is->is_ipl > maybe_is->is_ipl)
    227  1.2.2.2  mjf 				maybe_is = is;
    228  1.2.2.2  mjf 		}
    229  1.2.2.2  mjf 	}
    230  1.2.2.2  mjf 	if (maybe_is != NULL) {
    231  1.2.2.2  mjf 		is = gpio->gpio_is;
    232  1.2.2.2  mjf 		KASSERT(is != NULL);
    233  1.2.2.2  mjf 		is->is_ipl = maybe_is->is_ipl;
    234  1.2.2.2  mjf 		(*is->is_pic->pic_ops->pic_establish_irq)(is->is_pic, is);
    235  1.2.2.2  mjf 	}
    236  1.2.2.2  mjf #endif
    237  1.2.2.2  mjf }
    238  1.2.2.2  mjf 
    239  1.2.2.2  mjf static int gpio_match(device_t, cfdata_t, void *);
    240  1.2.2.2  mjf static void gpio_attach(device_t, device_t, void *);
    241  1.2.2.2  mjf 
    242  1.2.2.2  mjf CFATTACH_DECL_NEW(geminigpio,
    243  1.2.2.2  mjf 	sizeof(struct gpio_softc),
    244  1.2.2.2  mjf 	gpio_match, gpio_attach,
    245  1.2.2.2  mjf 	NULL, NULL);
    246  1.2.2.2  mjf 
    247  1.2.2.2  mjf #if NGPIO > 0 || NGEMINIGMAC > 0
    248  1.2.2.2  mjf 
    249  1.2.2.2  mjf int
    250  1.2.2.2  mjf geminigpio_pin_read(void *arg, int pin)
    251  1.2.2.2  mjf {
    252  1.2.2.2  mjf 	struct gpio_softc * const gpio = device_private(arg);
    253  1.2.2.2  mjf 
    254  1.2.2.2  mjf 	return (GPIO_READ(gpio, GEMINI_GPIO_DATAIN) >> pin) & 1;
    255  1.2.2.2  mjf }
    256  1.2.2.2  mjf 
    257  1.2.2.2  mjf void
    258  1.2.2.2  mjf geminigpio_pin_write(void *arg, int pin, int value)
    259  1.2.2.2  mjf {
    260  1.2.2.2  mjf 	struct gpio_softc * const gpio = device_private(arg);
    261  1.2.2.2  mjf 	uint32_t mask = 1 << pin;
    262  1.2.2.2  mjf 
    263  1.2.2.2  mjf 	if (value)
    264  1.2.2.2  mjf 		GPIO_WRITE(gpio, GEMINI_GPIO_DATASET, mask);
    265  1.2.2.2  mjf 	else
    266  1.2.2.2  mjf 		GPIO_WRITE(gpio, GEMINI_GPIO_DATACLR, mask);
    267  1.2.2.2  mjf }
    268  1.2.2.2  mjf 
    269  1.2.2.2  mjf void
    270  1.2.2.2  mjf geminigpio_pin_ctl(void *arg, int pin, int flags)
    271  1.2.2.2  mjf {
    272  1.2.2.2  mjf 	struct gpio_softc * const gpio = device_private(arg);
    273  1.2.2.2  mjf 	uint32_t mask = 1 << pin;
    274  1.2.2.2  mjf 	uint32_t old, new;
    275  1.2.2.2  mjf 
    276  1.2.2.2  mjf 	old = GPIO_READ(gpio, GEMINI_GPIO_PINDIR);
    277  1.2.2.2  mjf 	new = old;
    278  1.2.2.2  mjf 	switch (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
    279  1.2.2.2  mjf 	case GPIO_PIN_INPUT:	new &= ~mask; break;
    280  1.2.2.2  mjf 	case GPIO_PIN_OUTPUT:	new |=  mask; break;
    281  1.2.2.2  mjf 	default:		return;
    282  1.2.2.2  mjf 	}
    283  1.2.2.2  mjf 	if (old != new)
    284  1.2.2.2  mjf 		GPIO_WRITE(gpio, GEMINI_GPIO_PINDIR, new);
    285  1.2.2.2  mjf }
    286  1.2.2.2  mjf 
    287  1.2.2.2  mjf static void
    288  1.2.2.2  mjf gpio_defer(device_t self)
    289  1.2.2.2  mjf {
    290  1.2.2.2  mjf 	struct gpio_softc * const gpio = device_private(self);
    291  1.2.2.2  mjf 	struct gpio_chipset_tag * const gp = &gpio->gpio_chipset;
    292  1.2.2.2  mjf 	struct gpiobus_attach_args gba;
    293  1.2.2.2  mjf 	gpio_pin_t *pins;
    294  1.2.2.2  mjf 	uint32_t mask, dir, valueout, valuein;
    295  1.2.2.2  mjf 	int pin;
    296  1.2.2.2  mjf 
    297  1.2.2.2  mjf 	gp->gp_cookie = gpio->gpio_dev;
    298  1.2.2.2  mjf 	gp->gp_pin_read = geminigpio_pin_read;
    299  1.2.2.2  mjf 	gp->gp_pin_write = geminigpio_pin_write;
    300  1.2.2.2  mjf 	gp->gp_pin_ctl = geminigpio_pin_ctl;
    301  1.2.2.2  mjf 
    302  1.2.2.2  mjf 	gba.gba_gc = gp;
    303  1.2.2.2  mjf 	gba.gba_pins = gpio->gpio_pins;
    304  1.2.2.2  mjf 	gba.gba_npins = __arraycount(gpio->gpio_pins);
    305  1.2.2.2  mjf 
    306  1.2.2.2  mjf 	dir = GPIO_READ(gpio, GEMINI_GPIO_PINDIR);
    307  1.2.2.2  mjf 	valueout = GPIO_READ(gpio, GEMINI_GPIO_DATAOUT);
    308  1.2.2.2  mjf 	valuein = GPIO_READ(gpio, GEMINI_GPIO_DATAIN);
    309  1.2.2.2  mjf 	for (pin = 0, mask = 1, pins = gpio->gpio_pins;
    310  1.2.2.2  mjf 	     pin < 32; pin++, mask <<= 1, pins++) {
    311  1.2.2.2  mjf 		pins->pin_num = pin;
    312  1.2.2.2  mjf 		if (gpio->gpio_inuse_mask & mask)
    313  1.2.2.2  mjf 			pins->pin_caps = GPIO_PIN_INPUT;
    314  1.2.2.2  mjf 		else
    315  1.2.2.2  mjf 			pins->pin_caps = GPIO_PIN_INPUT|GPIO_PIN_OUTPUT;
    316  1.2.2.2  mjf 		pins->pin_flags =
    317  1.2.2.2  mjf 		    (dir & mask) ? GPIO_PIN_OUTPUT : GPIO_PIN_INPUT;
    318  1.2.2.2  mjf 		pins->pin_state =
    319  1.2.2.2  mjf 		    (((dir & mask) ? valueout : valuein) & mask)
    320  1.2.2.2  mjf 			? GPIO_PIN_HIGH
    321  1.2.2.2  mjf 			: GPIO_PIN_LOW;
    322  1.2.2.2  mjf 	}
    323  1.2.2.2  mjf 
    324  1.2.2.2  mjf 	config_found_ia(self, "gpiobus", &gba, gpiobus_print);
    325  1.2.2.2  mjf }
    326  1.2.2.2  mjf #endif /* NGPIO > 0 */
    327  1.2.2.2  mjf 
    328  1.2.2.2  mjf int
    329  1.2.2.2  mjf gpio_match(device_t parent, cfdata_t cfdata, void *aux)
    330  1.2.2.2  mjf {
    331  1.2.2.2  mjf 	struct obio_attach_args *oa = aux;
    332  1.2.2.2  mjf 
    333  1.2.2.2  mjf 	if (oa->obio_addr == GEMINI_GPIO0_BASE
    334  1.2.2.2  mjf 	    || oa->obio_addr == GEMINI_GPIO1_BASE
    335  1.2.2.2  mjf 	    || oa->obio_addr == GEMINI_GPIO2_BASE)
    336  1.2.2.2  mjf 		return 1;
    337  1.2.2.2  mjf 
    338  1.2.2.2  mjf 	return 0;
    339  1.2.2.2  mjf }
    340  1.2.2.2  mjf 
    341  1.2.2.2  mjf void
    342  1.2.2.2  mjf gpio_attach(device_t parent, device_t self, void *aux)
    343  1.2.2.2  mjf {
    344  1.2.2.2  mjf 	struct obio_attach_args * const oa = aux;
    345  1.2.2.2  mjf 	struct gpio_softc * const gpio = device_private(self);
    346  1.2.2.2  mjf 	int error;
    347  1.2.2.2  mjf 
    348  1.2.2.2  mjf 	if (oa->obio_intr == OBIOCF_INTR_DEFAULT)
    349  1.2.2.2  mjf 		panic("\n%s: no intr assigned", device_xname(self));
    350  1.2.2.2  mjf 
    351  1.2.2.2  mjf 	if (oa->obio_size == OBIOCF_SIZE_DEFAULT)
    352  1.2.2.2  mjf 		oa->obio_size = GEMINI_GPIO_SIZE;
    353  1.2.2.2  mjf 
    354  1.2.2.2  mjf 	gpio->gpio_dev = self;
    355  1.2.2.2  mjf 	gpio->gpio_memt = oa->obio_iot;
    356  1.2.2.2  mjf 	error = bus_space_map(oa->obio_iot, oa->obio_addr, oa->obio_size,
    357  1.2.2.2  mjf 	    0, &gpio->gpio_memh);
    358  1.2.2.2  mjf 
    359  1.2.2.2  mjf 	if (error) {
    360  1.2.2.2  mjf 		aprint_error(": failed to map register %#lx@%#lx: %d\n",
    361  1.2.2.2  mjf 		    oa->obio_size, oa->obio_addr, error);
    362  1.2.2.2  mjf 		return;
    363  1.2.2.2  mjf 	}
    364  1.2.2.2  mjf 
    365  1.2.2.2  mjf 	if (oa->obio_intrbase != OBIOCF_INTRBASE_DEFAULT) {
    366  1.2.2.2  mjf 		gpio->gpio_pic.pic_ops = &gpio_pic_ops;
    367  1.2.2.2  mjf 		strlcpy(gpio->gpio_pic.pic_name, device_xname(self),
    368  1.2.2.2  mjf 		    sizeof(gpio->gpio_pic.pic_name));
    369  1.2.2.2  mjf 		gpio->gpio_pic.pic_maxsources = 32;
    370  1.2.2.2  mjf 		pic_add(&gpio->gpio_pic, oa->obio_intrbase);
    371  1.2.2.2  mjf 		aprint_normal(": interrupts %d..%d",
    372  1.2.2.2  mjf 		    oa->obio_intrbase, oa->obio_intrbase + 31);
    373  1.2.2.2  mjf 		gpio->gpio_is = intr_establish(oa->obio_intr,
    374  1.2.2.2  mjf 		    IPL_HIGH, IST_LEVEL_HIGH, pic_handle_intr, &gpio->gpio_pic);
    375  1.2.2.2  mjf 		KASSERT(gpio->gpio_is != NULL);
    376  1.2.2.2  mjf 		aprint_normal(", intr %d", oa->obio_intr);
    377  1.2.2.2  mjf 	}
    378  1.2.2.2  mjf 	aprint_normal("\n");
    379  1.2.2.2  mjf #if NGPIO > 0
    380  1.2.2.2  mjf 	config_interrupts(self, gpio_defer);
    381  1.2.2.2  mjf #endif
    382  1.2.2.2  mjf }
    383