1 /* $Id: imx23_usbphy.c,v 1.1 2013/10/07 17:36:40 matt Exp $ */ 2 3 /* 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Petri Laakso. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/param.h> 33 #include <sys/types.h> 34 #include <sys/bus.h> 35 #include <sys/cdefs.h> 36 #include <sys/device.h> 37 #include <sys/errno.h> 38 39 #include <arm/imx/imx23_usbphyreg.h> 40 #include <arm/imx/imx23var.h> 41 42 typedef struct usbphy_softc { 43 device_t sc_dev; 44 bus_space_tag_t sc_iot; 45 bus_space_handle_t sc_hdl; 46 } *usbphy_softc_t; 47 48 static int usbphy_match(device_t, cfdata_t, void *); 49 static void usbphy_attach(device_t, device_t, void *); 50 static int usbphy_activate(device_t, enum devact); 51 52 static void usbphy_reset(struct usbphy_softc *); 53 static void usbphy_init(struct usbphy_softc *); 54 55 CFATTACH_DECL3_NEW(usbphy, 56 sizeof(struct usbphy_softc), 57 usbphy_match, 58 usbphy_attach, 59 NULL, 60 usbphy_activate, 61 NULL, 62 NULL, 63 0 64 ); 65 66 #define PHY_RD(sc, reg) \ 67 bus_space_read_4(sc->sc_iot, sc->sc_hdl, (reg)) 68 #define PHY_WR(sc, reg, val) \ 69 bus_space_write_4(sc->sc_iot, sc->sc_hdl, (reg), (val)) 70 71 #define USBPHY_SOFT_RST_LOOP 455 /* At least 1 us ... */ 72 73 static int 74 usbphy_match(device_t parent, cfdata_t match, void *aux) 75 { 76 struct apb_attach_args *aa = aux; 77 78 if ((aa->aa_addr == HW_USBPHY_BASE) && (aa->aa_size == HW_USBPHY_SIZE)) 79 return 1; 80 81 return 0; 82 } 83 84 static void 85 usbphy_attach(device_t parent, device_t self, void *aux) 86 { 87 struct usbphy_softc *sc = device_private(self); 88 struct apb_attach_args *aa = aux; 89 static int usbphy_attached = 0; 90 uint32_t phy_version; 91 92 sc->sc_dev = self; 93 sc->sc_iot = aa->aa_iot; 94 95 if (usbphy_attached) { 96 aprint_error_dev(sc->sc_dev, "already attached\n"); 97 return; 98 } 99 100 if (bus_space_map(sc->sc_iot, aa->aa_addr, aa->aa_size, 0, 101 &sc->sc_hdl)) 102 { 103 aprint_error_dev(sc->sc_dev, "Unable to map bus space\n"); 104 return; 105 } 106 107 usbphy_reset(sc); 108 usbphy_init(sc); 109 110 phy_version = PHY_RD(sc, HW_USBPHY_VERSION); 111 aprint_normal(": USB PHY v%" __PRIuBIT ".%" __PRIuBIT "\n", 112 __SHIFTOUT(phy_version, HW_USBPHY_VERSION_MAJOR), 113 __SHIFTOUT(phy_version, HW_USBPHY_VERSION_MINOR)); 114 115 usbphy_attached = 1; 116 117 return; 118 } 119 120 static int 121 usbphy_activate(device_t self, enum devact act) 122 { 123 124 return EOPNOTSUPP; 125 } 126 127 /* 128 * Reset the USB PHY. 129 * 130 * Inspired by i.MX23 RM "39.3.10 Correct Way to Soft Reset a Block" 131 */ 132 static void 133 usbphy_reset(struct usbphy_softc *sc) 134 { 135 unsigned int loop; 136 137 /* Prepare for soft-reset by making sure that SFTRST is not currently 138 * asserted. Also clear CLKGATE so we can wait for its assertion below. 139 */ 140 PHY_WR(sc, HW_USBPHY_CTRL_CLR, HW_USBPHY_CTRL_SFTRST); 141 142 /* Wait at least a microsecond for SFTRST to deassert. */ 143 loop = 0; 144 while ((PHY_RD(sc, HW_USBPHY_CTRL) & HW_USBPHY_CTRL_SFTRST) || 145 (loop < USBPHY_SOFT_RST_LOOP)) 146 loop++; 147 148 /* Clear CLKGATE so we can wait for its assertion below. */ 149 PHY_WR(sc, HW_USBPHY_CTRL_CLR, HW_USBPHY_CTRL_CLKGATE); 150 151 /* Soft-reset the block. */ 152 PHY_WR(sc, HW_USBPHY_CTRL_SET, HW_USBPHY_CTRL_SFTRST); 153 154 /* Wait until clock is in the gated state. */ 155 while (!(PHY_RD(sc, HW_USBPHY_CTRL) & HW_USBPHY_CTRL_CLKGATE)); 156 157 /* Bring block out of reset. */ 158 PHY_WR(sc, HW_USBPHY_CTRL_CLR, HW_USBPHY_CTRL_SFTRST); 159 160 loop = 0; 161 while ((PHY_RD(sc, HW_USBPHY_CTRL) & HW_USBPHY_CTRL_SFTRST) || 162 (loop < USBPHY_SOFT_RST_LOOP)) 163 loop++; 164 165 PHY_WR(sc, HW_USBPHY_CTRL_CLR, HW_USBPHY_CTRL_CLKGATE); 166 167 /* Wait until clock is in the NON-gated state. */ 168 while (PHY_RD(sc, HW_USBPHY_CTRL) & HW_USBPHY_CTRL_CLKGATE); 169 170 return; 171 } 172 173 /* 174 * Enable USB PHY. 175 */ 176 static void 177 usbphy_init(struct usbphy_softc *sc) 178 { 179 /* Disable power down bits. */ 180 PHY_WR(sc, HW_USBPHY_PWD_CLR, 181 HW_USBPHY_PWD_RXPWDRX | 182 HW_USBPHY_PWD_RXPWDDIFF | 183 HW_USBPHY_PWD_RXPWD1PT1 | 184 HW_USBPHY_PWD_RXPWDENV | 185 HW_USBPHY_PWD_TXPWDV2I | 186 HW_USBPHY_PWD_TXPWDIBIAS | 187 HW_USBPHY_PWD_TXPWDFS 188 ); 189 190 /* USB PLL Power on. */ 191 PHY_WR(sc, HW_USBPHY_IP_SET, 192 HW_USBPHY_IP_PLL_POWER); 193 194 /* Wait PLL to lock to 480MHz. */ 195 delay(10); 196 197 PHY_WR(sc, HW_USBPHY_IP_SET, HW_USBPHY_IP_PLL_LOCKED); 198 199 /* Ungate PLL clock to USB PHY. */ 200 PHY_WR(sc, HW_USBPHY_IP_SET, HW_USBPHY_IP_EN_USB_CLKS); 201 202 return; 203 } 204
Indexes created Sat Sep 20 22:09:52 GMT 2025