imxsnvs.c revision 1.1.2.2
1 1.1.2.2 skrll /* $NetBSD: imxsnvs.c,v 1.1.2.2 2016/05/29 08:44:16 skrll Exp $ */ 2 1.1.2.2 skrll 3 1.1.2.2 skrll /* 4 1.1.2.2 skrll * Copyright (c) 2014 Ryo Shimizu <ryo (at) nerv.org> 5 1.1.2.2 skrll * All rights reserved. 6 1.1.2.2 skrll * 7 1.1.2.2 skrll * Redistribution and use in source and binary forms, with or without 8 1.1.2.2 skrll * modification, are permitted provided that the following conditions 9 1.1.2.2 skrll * are met: 10 1.1.2.2 skrll * 1. Redistributions of source code must retain the above copyright 11 1.1.2.2 skrll * notice, this list of conditions and the following disclaimer. 12 1.1.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 13 1.1.2.2 skrll * notice, this list of conditions and the following disclaimer in the 14 1.1.2.2 skrll * documentation and/or other materials provided with the distribution. 15 1.1.2.2 skrll * 16 1.1.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.1.2.2 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18 1.1.2.2 skrll * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 1.1.2.2 skrll * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 20 1.1.2.2 skrll * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 1.1.2.2 skrll * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 1.1.2.2 skrll * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 1.1.2.2 skrll * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 1.1.2.2 skrll * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 25 1.1.2.2 skrll * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 1.1.2.2 skrll * POSSIBILITY OF SUCH DAMAGE. 27 1.1.2.2 skrll */ 28 1.1.2.2 skrll 29 1.1.2.2 skrll /* 30 1.1.2.2 skrll * i.MX6,7 Secure Non-Volatile Storage 31 1.1.2.2 skrll */ 32 1.1.2.2 skrll #include <sys/cdefs.h> 33 1.1.2.2 skrll __KERNEL_RCSID(0, "$NetBSD: imxsnvs.c,v 1.1.2.2 2016/05/29 08:44:16 skrll Exp $"); 34 1.1.2.2 skrll 35 1.1.2.2 skrll #include "locators.h" 36 1.1.2.2 skrll #include <sys/bus.h> 37 1.1.2.2 skrll #include <sys/device.h> 38 1.1.2.2 skrll #include <sys/param.h> 39 1.1.2.2 skrll #include <dev/clock_subr.h> 40 1.1.2.2 skrll 41 1.1.2.2 skrll #include <arm/imx/imxsnvsreg.h> 42 1.1.2.2 skrll #include <arm/imx/imxsnvsvar.h> 43 1.1.2.2 skrll 44 1.1.2.2 skrll struct imxsnvs_softc { 45 1.1.2.2 skrll device_t sc_dev; 46 1.1.2.2 skrll bus_space_tag_t sc_iot; 47 1.1.2.2 skrll bus_space_handle_t sc_ioh; 48 1.1.2.2 skrll struct todr_chip_handle sc_todr; 49 1.1.2.2 skrll }; 50 1.1.2.2 skrll 51 1.1.2.2 skrll #define SNVS_READ(sc, reg) \ 52 1.1.2.2 skrll bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, reg) 53 1.1.2.2 skrll 54 1.1.2.2 skrll #define SNVS_WRITE(sc, reg, val) \ 55 1.1.2.2 skrll bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, reg, val) 56 1.1.2.2 skrll 57 1.1.2.2 skrll static int imxsnvs_rtc_enable(struct imxsnvs_softc *); 58 1.1.2.2 skrll static int imxsnvs_rtc_disable(struct imxsnvs_softc *); 59 1.1.2.2 skrll static int imxsnvs_gettime(todr_chip_handle_t, struct timeval *); 60 1.1.2.2 skrll static int imxsnvs_settime(todr_chip_handle_t, struct timeval *); 61 1.1.2.2 skrll 62 1.1.2.2 skrll 63 1.1.2.2 skrll CFATTACH_DECL_NEW(imxsnvs, sizeof(struct imxsnvs_softc), 64 1.1.2.2 skrll imxsnvs_match, imxsnvs_attach, NULL, NULL); 65 1.1.2.2 skrll 66 1.1.2.2 skrll /* ARGSUSED */ 67 1.1.2.2 skrll int 68 1.1.2.2 skrll imxsnvs_attach_common(device_t parent __unused, device_t self, 69 1.1.2.2 skrll bus_space_tag_t iot, paddr_t iobase, size_t size, 70 1.1.2.2 skrll int intr __unused, int flags __unused) 71 1.1.2.2 skrll { 72 1.1.2.2 skrll struct imxsnvs_softc *sc; 73 1.1.2.2 skrll uint32_t v1, v2; 74 1.1.2.2 skrll 75 1.1.2.2 skrll sc = device_private(self); 76 1.1.2.2 skrll sc->sc_dev = self; 77 1.1.2.2 skrll sc->sc_iot = iot; 78 1.1.2.2 skrll 79 1.1.2.2 skrll aprint_naive("\n"); 80 1.1.2.2 skrll aprint_normal(": Secure Non-Volatile Storage\n"); 81 1.1.2.2 skrll if (bus_space_map(sc->sc_iot, iobase, size, 0, 82 1.1.2.2 skrll &sc->sc_ioh)) { 83 1.1.2.2 skrll aprint_error_dev(self, "Cannot map registers\n"); 84 1.1.2.2 skrll return 1; 85 1.1.2.2 skrll } 86 1.1.2.2 skrll 87 1.1.2.2 skrll v1 = SNVS_READ(sc, SNVS_HPVIDR1); 88 1.1.2.2 skrll v2 = SNVS_READ(sc, SNVS_HPVIDR2); 89 1.1.2.2 skrll aprint_verbose_dev(self, "id=0x%llx, ver=%lld.%lld, ip_era=0x%llx, " 90 1.1.2.2 skrll "intg_opt=0x%llx, eco_rev=0x%llx, config_opt=0x%llx\n", 91 1.1.2.2 skrll __SHIFTOUT(v1, SNVS_HPVIDR1_IP_ID), 92 1.1.2.2 skrll __SHIFTOUT(v1, SNVS_HPVIDR1_MAJOR_REV), 93 1.1.2.2 skrll __SHIFTOUT(v1, SNVS_HPVIDR1_MINOR_REV), 94 1.1.2.2 skrll __SHIFTOUT(v2, SNVS_HPVIDR2_IP_ERA), 95 1.1.2.2 skrll __SHIFTOUT(v2, SNVS_HPVIDR2_INTG_OPT), 96 1.1.2.2 skrll __SHIFTOUT(v2, SNVS_HPVIDR2_ECO_REV), 97 1.1.2.2 skrll __SHIFTOUT(v2, SNVS_HPVIDR2_CONFIG_OPT)); 98 1.1.2.2 skrll 99 1.1.2.2 skrll if (imxsnvs_rtc_enable(sc) != 0) { 100 1.1.2.2 skrll aprint_error_dev(self, "cannot enable RTC\n"); 101 1.1.2.2 skrll return 1; 102 1.1.2.2 skrll } 103 1.1.2.2 skrll 104 1.1.2.2 skrll sc->sc_todr.todr_gettime = imxsnvs_gettime; 105 1.1.2.2 skrll sc->sc_todr.todr_settime = imxsnvs_settime; 106 1.1.2.2 skrll sc->sc_todr.cookie = sc; 107 1.1.2.2 skrll todr_attach(&sc->sc_todr); 108 1.1.2.2 skrll 109 1.1.2.2 skrll return 0; 110 1.1.2.2 skrll } 111 1.1.2.2 skrll 112 1.1.2.2 skrll static int 113 1.1.2.2 skrll imxsnvs_rtc_enable(struct imxsnvs_softc *sc) 114 1.1.2.2 skrll { 115 1.1.2.2 skrll uint32_t v; 116 1.1.2.2 skrll int timeout; 117 1.1.2.2 skrll 118 1.1.2.2 skrll /* enable SRTC */ 119 1.1.2.2 skrll v = SNVS_READ(sc, SNVS_LPCR); 120 1.1.2.2 skrll SNVS_WRITE(sc, SNVS_LPCR, v | SNVS_LPCR_SRTC_ENV); 121 1.1.2.2 skrll for (timeout = 10000; timeout > 0; timeout--) { 122 1.1.2.2 skrll if (SNVS_READ(sc, SNVS_LPCR) & SNVS_LPCR_SRTC_ENV) 123 1.1.2.2 skrll break; 124 1.1.2.2 skrll } 125 1.1.2.2 skrll if (timeout == 0) 126 1.1.2.2 skrll return ETIMEDOUT; 127 1.1.2.2 skrll 128 1.1.2.2 skrll return 0; 129 1.1.2.2 skrll } 130 1.1.2.2 skrll 131 1.1.2.2 skrll static int 132 1.1.2.2 skrll imxsnvs_rtc_disable(struct imxsnvs_softc *sc) 133 1.1.2.2 skrll { 134 1.1.2.2 skrll uint32_t v; 135 1.1.2.2 skrll int timeout; 136 1.1.2.2 skrll 137 1.1.2.2 skrll /* disable SRTC */ 138 1.1.2.2 skrll v = SNVS_READ(sc, SNVS_LPCR); 139 1.1.2.2 skrll SNVS_WRITE(sc, SNVS_LPCR, v & ~SNVS_LPCR_SRTC_ENV); 140 1.1.2.2 skrll for (timeout = 10000; timeout > 0; timeout--) { 141 1.1.2.2 skrll if (!(SNVS_READ(sc, SNVS_LPCR) & SNVS_LPCR_SRTC_ENV)) 142 1.1.2.2 skrll break; 143 1.1.2.2 skrll } 144 1.1.2.2 skrll if (timeout == 0) 145 1.1.2.2 skrll return ETIMEDOUT; 146 1.1.2.2 skrll 147 1.1.2.2 skrll return 0; 148 1.1.2.2 skrll } 149 1.1.2.2 skrll 150 1.1.2.2 skrll static int 151 1.1.2.2 skrll imxsnvs_gettime(todr_chip_handle_t tch, struct timeval *tvp) 152 1.1.2.2 skrll { 153 1.1.2.2 skrll struct imxsnvs_softc *sc; 154 1.1.2.2 skrll uint64_t c1, c2; 155 1.1.2.2 skrll 156 1.1.2.2 skrll sc = tch->cookie; 157 1.1.2.2 skrll 158 1.1.2.2 skrll c2 = ((uint64_t)SNVS_READ(sc, SNVS_LPSRTCMR) << 32) + 159 1.1.2.2 skrll SNVS_READ(sc, SNVS_LPSRTCLR); 160 1.1.2.2 skrll do { 161 1.1.2.2 skrll c1 = c2; 162 1.1.2.2 skrll c2 = ((uint64_t)SNVS_READ(sc, SNVS_LPSRTCMR) << 32) + 163 1.1.2.2 skrll SNVS_READ(sc, SNVS_LPSRTCLR); 164 1.1.2.2 skrll } while (c1 != c2); 165 1.1.2.2 skrll 166 1.1.2.2 skrll tvp->tv_sec = c1 >> SVNS_COUNTER_SHIFT; 167 1.1.2.2 skrll tvp->tv_usec = (c1 % SVNS_COUNTER_HZ) * 1000000 / SVNS_COUNTER_HZ; 168 1.1.2.2 skrll 169 1.1.2.2 skrll return 0; 170 1.1.2.2 skrll } 171 1.1.2.2 skrll 172 1.1.2.2 skrll static int 173 1.1.2.2 skrll imxsnvs_settime(todr_chip_handle_t tch, struct timeval *tvp) 174 1.1.2.2 skrll { 175 1.1.2.2 skrll struct imxsnvs_softc *sc; 176 1.1.2.2 skrll uint64_t c, h, l; 177 1.1.2.2 skrll int rv; 178 1.1.2.2 skrll 179 1.1.2.2 skrll c = (uint64_t)tvp->tv_sec * SVNS_COUNTER_HZ + 180 1.1.2.2 skrll (uint64_t)tvp->tv_usec * SVNS_COUNTER_HZ / 1000000; 181 1.1.2.2 skrll h = __SHIFTIN((c >> 32) & SNVS_LPSRTCMR_SRTC, SNVS_LPSRTCMR_SRTC); 182 1.1.2.2 skrll l = c & 0xffffffff; 183 1.1.2.2 skrll 184 1.1.2.2 skrll sc = tch->cookie; 185 1.1.2.2 skrll if ((rv = imxsnvs_rtc_disable(sc)) != 0) 186 1.1.2.2 skrll return rv; 187 1.1.2.2 skrll 188 1.1.2.2 skrll SNVS_WRITE(sc, SNVS_LPSRTCMR, h); 189 1.1.2.2 skrll SNVS_WRITE(sc, SNVS_LPSRTCLR, l); 190 1.1.2.2 skrll 191 1.1.2.2 skrll if ((rv = imxsnvs_rtc_enable(sc)) != 0) 192 1.1.2.2 skrll return rv; 193 1.1.2.2 skrll 194 1.1.2.2 skrll return 0; 195 1.1.2.2 skrll } 196
Indexes created Fri Oct 03 02:09:57 GMT 2025