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cpuconf.h revision 1.1 
      1 /*	$NetBSD: cpuconf.h,v 1.1 2002/04/12 18:50:29 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c 2002 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed for the NetBSD Project by
     20  *	Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 #ifndef _ARM_CPUCONF_H_
     39 #define	_ARM_CPUCONF_H_
     40 
     41 #if defined(_KERNEL_OPT)
     42 #include "opt_cputypes.h"
     43 #endif /* _KERNEL_OPT */
     44 
     45 /*
     46  * Step 1: Count the number of CPU types configured into the kernel.
     47  */
     48 #if defined(_KERNEL_OPT)
     49 #define	CPU_NTYPES	(defined(CPU_ARM2) + defined(CPU_ARM250) +	\
     50 			 defined(CPU_ARM3) +				\
     51 			 defined(CPU_ARM6) + defined(CPU_ARM7) +	\
     52 			 defined(CPU_ARM7TDMI) +			\
     53 			 defined(CPU_ARM8) + defined(CPU_ARM9) +	\
     54 			 defined(CPU_SA110) + defined(CPU_SA1100) +	\
     55 			 defined(CPU_SA1110) +				\
     56 			 defined(CPU_XSCALE_80200) +			\
     57 			 defined(CPU_XSCALE_80321))
     58 #else
     59 #define	CPU_NTYPES	2
     60 #endif /* _KERNEL_OPT */
     61 
     62 /*
     63  * Step 2: Determine which ARM architecture versions are configured.
     64  */
     65 #if !defined(_KERNEL_OPT) ||						\
     66     (defined(CPU_ARM2) || defined(CPU_ARM250) || defined(CPU_ARM3))
     67 #define	ARM_ARCH_2	1
     68 #else
     69 #define	ARM_ARCH_2	0
     70 #endif
     71 
     72 #if !defined(_KERNEL_OPT) ||						\
     73     (defined(CPU_ARM6) || defined(CPU_ARM7))
     74 #define	ARM_ARCH_3	1
     75 #else
     76 #define	ARM_ARCH_3	0
     77 #endif
     78 
     79 #if !defined(_KERNEL_OPT) ||						\
     80     (defined(CPU_ARM7TDMI) || defined(CPU_ARM8) || defined(CPU_ARM9) ||	\
     81      defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110))
     82 #define	ARM_ARCH_4	1
     83 #else
     84 #define	ARM_ARCH_4	0
     85 #endif
     86 
     87 #if !defined(_KERNEL_OPT) ||						\
     88     (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321))
     89 #define	ARM_ARCH_5	1
     90 #else
     91 #define	ARM_ARCH_5	0
     92 #endif
     93 
     94 #define	ARM_NARCH	(ARM_ARCH_2 + ARM_ARCH_3 + ARM_ARCH_4 + ARM_ARCH_5)
     95 #if ARM_NARCH == 0
     96 #error ARM_NARCH is 0
     97 #endif
     98 
     99 /*
    100  * Step 3: Define which MMU classes are configured:
    101  *
    102  *	ARM_MMU_MEMC		Prehistoric, external memory controller
    103  *				and MMU for ARMv2 CPUs.
    104  *
    105  *	ARM_MMU_GENERIC		Generic ARM MMU, compatible with ARM6.
    106  *
    107  *	ARM_MMU_XSCALE		XScale MMU.  Compatible with generic ARM
    108  *				MMU, but also has several extensions which
    109  *				require different PTE layout to use.
    110  */
    111 #if !defined(_KERNEL_OPT) ||						\
    112     (defined(CPU_ARM2) || defined(CPU_ARM250) || defined(CPU_ARM3))
    113 #define	ARM_MMU_MEMC		1
    114 #else
    115 #define	ARM_MMU_MEMC		0
    116 #endif
    117 
    118 #if !defined(_KERNEL_OPT) ||						\
    119     (defined(CPU_ARM6) || defined(CPU_ARM7) || defined(CPU_ARM7TDMI) ||	\
    120      defined(CPU_ARM8) || defined(CPU_ARM9) || defined(CPU_SA110) ||	\
    121      defined(CPU_SA1100) || defined(CPU_SA1110))
    122 #define	ARM_MMU_GENERIC		1
    123 #else
    124 #define	ARM_MMU_GENERIC		0
    125 #endif
    126 
    127 #if !defined(_KERNEL_OPT) ||						\
    128     (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321))
    129 #define	ARM_MMU_XSCALE		1
    130 #else
    131 #define	ARM_MMU_XSCALE		0
    132 #endif
    133 
    134 #define	ARM_NMMUS		(ARM_MMU_MEMC + ARM_MMU_GENERIC +	\
    135 				 ARM_MMU_XSCALE)
    136 #if ARM_NMMUS == 0
    137 #error ARM_NMMUS is 0
    138 #endif
    139 
    140 #endif /* _ARM_CPUCONF_H_ */
    141