locore.h revision 1.2
1 /* cpu.h,v 1.45.4.7 2008/01/28 18:20:39 matt Exp */ 2 3 /* 4 * Copyright (c) 1994-1996 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpu.h 40 * 41 * CPU specific symbols 42 * 43 * Created : 18/09/94 44 * 45 * Based on kate/katelib/arm6.h 46 */ 47 48 #ifndef _ARM_LOCORE_H_ 49 #define _ARM_LOCORE_H_ 50 51 #ifdef _KERNEL_OPT 52 #include "opt_cpuoptions.h" 53 #include "opt_cputypes.h" 54 #endif 55 56 #include <arm/cpuconf.h> 57 #include <arm/armreg.h> 58 59 #include <machine/frame.h> 60 61 #ifdef _LOCORE 62 63 #if defined(_ARM_ARCH_6) 64 #define IRQdisable cpsid i 65 #define IRQenable cpsie i 66 #elif defined(__PROG32) 67 #define IRQdisable \ 68 stmfd sp!, {r0} ; \ 69 mrs r0, cpsr ; \ 70 orr r0, r0, #(I32_bit) ; \ 71 msr cpsr_c, r0 ; \ 72 ldmfd sp!, {r0} 73 74 #define IRQenable \ 75 stmfd sp!, {r0} ; \ 76 mrs r0, cpsr ; \ 77 bic r0, r0, #(I32_bit) ; \ 78 msr cpsr_c, r0 ; \ 79 ldmfd sp!, {r0} 80 #else 81 /* Not yet used in 26-bit code */ 82 #endif 83 84 #if defined (TPIDRPRW_IS_CURCPU) 85 #define GET_CURCPU(rX) mrc p15, 0, rX, c13, c0, 4 86 #define GET_CURLWP(rX) GET_CURCPU(rX); ldr rX, [rX, #CI_CURLWP] 87 #elif defined (TPIDRPRW_IS_CURLWP) 88 #define GET_CURLWP(rX) mrc p15, 0, rX, c13, c0, 4 89 #define GET_CURCPU(rX) GET_CURLWP(rX); ldr rX, [rX, #L_CPU] 90 #elif !defined(MULTIPROCESSOR) 91 #define GET_CURCPU(rX) ldr rX, =_C_LABEL(cpu_info_store) 92 #define GET_CURLWP(rX) GET_CURCPU(rX); ldr rX, [rX, #CI_CURLWP] 93 #endif 94 #define GET_CURPCB(rX) GET_CURLWP(rX); ldr rX, [rX, #L_PCB] 95 96 #else /* !_LOCORE */ 97 98 #ifdef __PROG32 99 #define IRQdisable __set_cpsr_c(I32_bit, I32_bit); 100 #define IRQenable __set_cpsr_c(I32_bit, 0); 101 #else 102 #define IRQdisable set_r15(R15_IRQ_DISABLE, R15_IRQ_DISABLE); 103 #define IRQenable set_r15(R15_IRQ_DISABLE, 0); 104 #endif 105 106 /* 107 * Validate a PC or PSR for a user process. Used by various system calls 108 * that take a context passed by the user and restore it. 109 */ 110 111 #ifdef __PROG32 112 #define VALID_R15_PSR(r15,psr) \ 113 (((psr) & PSR_MODE) == PSR_USR32_MODE && \ 114 ((psr) & (I32_bit | F32_bit)) == 0) 115 #else 116 #define VALID_R15_PSR(r15,psr) \ 117 (((r15) & R15_MODE) == R15_MODE_USR && \ 118 ((r15) & (R15_IRQ_DISABLE | R15_FIQ_DISABLE)) == 0) 119 #endif 120 121 122 123 /* The address of the vector page. */ 124 extern vaddr_t vector_page; 125 #ifdef __PROG32 126 void arm32_vector_init(vaddr_t, int); 127 128 #define ARM_VEC_RESET (1 << 0) 129 #define ARM_VEC_UNDEFINED (1 << 1) 130 #define ARM_VEC_SWI (1 << 2) 131 #define ARM_VEC_PREFETCH_ABORT (1 << 3) 132 #define ARM_VEC_DATA_ABORT (1 << 4) 133 #define ARM_VEC_ADDRESS_EXCEPTION (1 << 5) 134 #define ARM_VEC_IRQ (1 << 6) 135 #define ARM_VEC_FIQ (1 << 7) 136 137 #define ARM_NVEC 8 138 #define ARM_VEC_ALL 0xffffffff 139 #endif /* __PROG32 */ 140 141 #ifndef acorn26 142 /* 143 * cpu device glue (belongs in cpuvar.h) 144 */ 145 void cpu_attach(device_t, cpuid_t); 146 #endif 147 148 /* 1 == use cpu_sleep(), 0 == don't */ 149 extern int cpu_do_powersave; 150 extern int cpu_fpu_present; 151 152 #if !defined(CPU_ARMV7) 153 #define CPU_IS_ARMV7_P() false 154 #elif defined(CPU_ARMV6) || defined(CPU_PRE_ARMV6) 155 extern bool cpu_armv7_p; 156 #define CPU_IS_ARMV7_P() (cpu_armv7_p) 157 #else 158 #define CPU_IS_ARMV7_P() true 159 #endif 160 161 /* 162 * Random cruft 163 */ 164 165 struct lwp; 166 167 /* locore.S */ 168 void atomic_set_bit(u_int *, u_int); 169 void atomic_clear_bit(u_int *, u_int); 170 171 /* cpuswitch.S */ 172 struct pcb; 173 void savectx(struct pcb *); 174 175 /* ast.c */ 176 void userret(struct lwp *); 177 178 /* *_machdep.c */ 179 void bootsync(void); 180 181 /* fault.c */ 182 int badaddr_read(void *, size_t, void *); 183 184 /* syscall.c */ 185 void swi_handler(trapframe_t *); 186 187 /* arm_machdep.c */ 188 void ucas_ras_check(trapframe_t *); 189 190 /* vfp_init.c */ 191 void vfp_attach(void); 192 void vfp_discardcontext(void); 193 void vfp_savecontext(void); 194 void vfp_kernel_acquire(void); 195 void vfp_kernel_release(void); 196 extern const pcu_ops_t arm_vfp_ops; 197 198 #endif /* !_LOCORE */ 199 200 #endif /* !_ARM_LOCORE_H_ */ 201
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