| History log of /src/sys/arch/arm/include/locore.h |
| Revision | | Date | Author | Comments |
| 1.40 |
| 07-Oct-2025 |
skrll | Provide new assembly macros
INTERRUPT_{DISABLE,ENABLE}
which mask/unmask both IRQs and FIQs
|
| 1.39 |
| 07-Oct-2025 |
skrll | Retire the locore.h assembly versions of IRQ{enable,disable} in favour of
the "experimental" cpuswitch.S versions, but rename them
IRQ_{DISABLE,ENABLE}
and have them take a temporary register which is only used for < armv6.
|
| 1.38 |
| 06-Oct-2025 |
skrll | #define<tab> consistency
|
| 1.37 |
| 31-Oct-2021 |
skrll | Rework Arm (32bit and 64bit) AP startup so that cpu_hatch doesn't sleep.
The AP initialisation code in cpu_init_secondary_processor will read and
initialise the required system registers and state for the BP to attach
and report.
Rework the interrupt handler code for this new sequence. Thankfully,
this removes a bunch of code for bcm2836mp.
The VFP detection handler on <= armv7 relies on the global undefined
handler being in place until the BP attaches vfp. That is, after the
APs have been spun up.
gicv3_its.c has a serialisation issue which is protected against in
the gicv3_its_cpu_init, which is called from cpu_hatch, with a spin
lock. The serialisation issue needs addressing more completely.
Tested on RPI3, Apple M1, QEMU, and lx2k
Fixes PR port-arm/56264:
diagnostic assertion "l->l_stat == LSONPROC" failed on RPI3
|
| 1.36 |
| 01-Feb-2021 |
skrll | G/C some old code that was for acorn26
|
| 1.35 |
| 01-Dec-2020 |
rin | Fix confusions related to encoding of instructions.
For __ARMEB__ in BE8 mode, instructions are encoded in little-endian.
Therefore, we need to swap bytes against these in native byte order.
In other cases, i.e., __ARMEL__ and __ARMEB__ in BE32 mode, instructions
are in native byte order, and we don't need to swap them.
|
| 1.34 |
| 30-Oct-2020 |
skrll | branches: 1.34.2;
Retire arm_[di]sb in favour of the isb() and dsb(sy) macro invocations.
|
| 1.33 |
| 14-Aug-2020 |
skrll | Mirror the changes to aarch64 and
- Switch to TPIDRPRW_IS_CURLWP, because curlwp is accessed much more often
by MI code. It also makes curlwp preemption safe,
- Make ASTs operate per-LWP rather than per-CPU, otherwise sometimes LWPs
can see spurious ASTs (which doesn't cause a problem, it just means some
time may be wasted).
- Make sure ASTs are always set on the same CPU as the target LWP, and
delivered via IPI if posted from a remote CPU so that they are resolved
quickly.
- Add some cache line padding to struct cpu_info.
- Add a memory barrier in a couple of places where ci_curlwp is set. This
is needed whenever an LWP that is resuming on the CPU could hold an
adaptive mutex. The barrier needs to drain the CPU's store buffer, so
that the update to ci_curlwp becomes globally visible before the LWP can
resume and call mutex_exit().
|
| 1.32 |
| 15-Feb-2020 |
skrll | Various updates and improvements to cpu start up on arm/aarch64
- start sharing more code around the AP startup messaging.
- call arm_cpu_topology_set early so that ci_core_id is available for
drivers, e.g. bcm2835_intr.c
- both arm and aarch64 now have
- a static cpu_info_store array
- the same arm_cpu_{hatched,mbox}
|
| 1.31 |
| 06-Apr-2019 |
thorpej | branches: 1.31.6;
Overhaul the API used to fetch and store individual memory cells in
userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms. The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).
Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.
Welcome to NetBSD 8.99.37.
|
| 1.30 |
| 01-Apr-2018 |
ryo | branches: 1.30.2;
Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)
- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
|
| 1.29 |
| 24-Jan-2018 |
skrll | branches: 1.29.2;
Remove port-acorn26
OK core@
|
| 1.28 |
| 24-Aug-2017 |
jmcneill | Do runtime detection of MP extensions to allow using a MULTIPROCESSOR
kernel on CPUs without the MP extensions feature (like Cortex-A8).
|
| 1.27 |
| 16-Mar-2017 |
chs | allow pcu_save() and pcu_discard() to be called on other threads,
ptrace needs to use it that way.
|
| 1.26 |
| 09-Jun-2015 |
skrll | branches: 1.26.2; 1.26.4;
KNF a comment
|
| 1.25 |
| 09-Jun-2015 |
skrll | Trailing whitespace.
|
| 1.24 |
| 09-Jun-2015 |
skrll | Use TTBR_[UM]PATTR in a9_mpsubr.S as well as cpufunc_asm_armv7
Prompted by matt@
|
| 1.23 |
| 28-May-2015 |
matt | Appease clang's integrated assembler and have separate thumb2 and arm asm's
for ldrht
|
| 1.22 |
| 28-May-2015 |
matt | Fix ldrht
|
| 1.21 |
| 30-Mar-2015 |
matt | #include <sys/pcu.h>
|
| 1.20 |
| 29-Mar-2015 |
matt | If using TPIDRPRW_IS_CURLWP and !MP and ARMV7, use movw/movt to load address
of cpu_info_store
|
| 1.19 |
| 25-Feb-2015 |
joerg | Improve inline asm around dsb/dmb/isb:
- always use volatile and mark them as memory barrier
- use the common version from locore.h in all places not included from
userland
|
| 1.18 |
| 07-Nov-2014 |
martin | branches: 1.18.2;
Guard a few inline functions by #ifndef _RUMPKERNEL, to allow including
this file in rump builds.
|
| 1.17 |
| 13-Aug-2014 |
matt | branches: 1.17.2;
Add __NO_FIQ to prevent testing of the PSR FIQ bit
Use VALID_R15_PSR(pc, spsr) instead of testing explicitly
|
| 1.16 |
| 28-Mar-2014 |
matt | branches: 1.16.4; 1.16.6;
Various MP changes.
|
| 1.15 |
| 18-Mar-2014 |
matt | defflag VERBOSE_INIT_ARM
|
| 1.14 |
| 03-Mar-2014 |
matt | Add most of the cpu_* variables to <arm/locore.h>
Add and initialize cpu_synchprim_present
|
| 1.13 |
| 26-Feb-2014 |
matt | Add arm_cpu_max
|
| 1.12 |
| 01-Feb-2014 |
joerg | branches: 1.12.2;
Typos.
|
| 1.11 |
| 01-Feb-2014 |
joerg | Fix RCS ID.
|
| 1.10 |
| 01-Feb-2014 |
joerg | Be nice to LLVM and use an explicit immediate.
|
| 1.9 |
| 30-Jan-2014 |
matt | ldrht is v6t2 or later so use ldrt and extract the right halfword.
|
| 1.8 |
| 29-Jan-2014 |
matt | Add read_insn and read_thumb_insn inlines to hide the endianness of
instructions and use them as appropriate.
|
| 1.7 |
| 11-Jan-2014 |
matt | Add hw.printfataltraps sysctl. Always print fatal traps for init. For all
other processes, only do so if cpu_printfataltraps is true.
|
| 1.6 |
| 20-Dec-2013 |
matt | Add CPU_IS_ARMV6_P() macro
|
| 1.5 |
| 07-Sep-2013 |
matt | Add a machdep.hwdiv_present sysctl (cortex A7 and A15 have hwdiv instructions)
|
| 1.4 |
| 23-Aug-2013 |
matt | branches: 1.4.2;
Reap LWP_VFPUSED and use PCU internal tracking.
Add bool vfp_used_p(void);
|
| 1.3 |
| 18-Aug-2013 |
matt | Include <arm/cpufunc.h> if !_LOCORE
|
| 1.2 |
| 18-Aug-2013 |
matt | Add a CPU_IS_ARMV7_P() macro (nonv7 evals to false, v7 only true, otherwise
cpu_armv7_p is checked (and is set by cpuconf for cortex and pj4b).
|
| 1.1 |
| 18-Aug-2013 |
matt | Move the MD parts of <arm/cpu.h> to here.
|
| 1.4.2.3 |
| 18-May-2014 |
rmind | sync with head
|
| 1.4.2.2 |
| 28-Aug-2013 |
rmind | sync with head
|
| 1.4.2.1 |
| 23-Aug-2013 |
rmind | file locore.h was added on branch rmind-smpnet on 2013-08-28 23:59:12 +0000
|
| 1.12.2.2 |
| 15-Feb-2014 |
matt | Merge armv7 support from HEAD, specifically support for the BCM5301X
and BCM56340 evbarm kernels.
|
| 1.12.2.1 |
| 01-Feb-2014 |
matt | file locore.h was added on branch matt-nb5-mips64 on 2014-02-15 16:18:36 +0000
|
| 1.16.6.2 |
| 27-May-2015 |
msaitoh | Pull up following revision(s) (requested by skrll in ticket #805):
sys/arch/arm/include/arm32/pmap.h: revision 1.138
sys/arch/arm/arm/cpufunc.c: revision 1.151
sys/arch/arm/arm32/bus_dma.c: revision 1.90
sys/arch/arm/broadcom/bcm53xx_pax.c: revision 1.14
sys/arch/arm/arm32/bus_dma.c: revision 1.91
sys/arch/arm/samsung/exynos_space.c: revision 1.2
sys/arch/arm/arm32/db_machdep.c: revision 1.23
sys/arch/arm/allwinner/awin_space.c: revision 1.4
sys/arch/arm/include/rwlock.h: revision 1.9
sys/arch/arm/amlogic/amlogic_space.c: revision 1.2
sys/arch/arm/zynq/zynq_space.c: revision 1.2
sys/arch/arm/broadcom/bcm2835_space.c: revision 1.7
sys/arch/arm/arm32/pmap.c: revision 1.317
sys/arch/arm/include/locore.h: revision 1.19
sys/arch/arm/include/mutex.h: revision 1.20
sys/arch/arm/include/lock.h: revision 1.31
sys/arch/arm/include/lock.h: revision 1.32
sys/arch/arm/broadcom/bcmgen_space.c: revision 1.5
- Kill redundant semicolons.
- Indentation.
- Improve inline asm around dsb/dmb/isb:
- always use volatile and mark them as memory barrier
- use the common version from locore.h in all places not included from
userland
|
| 1.16.6.1 |
| 15-Nov-2014 |
martin | Pull up following revision(s) (requested by skrll in ticket #240):
sys/arch/arm/include/locore.h: revision 1.18
Guard a few inline functions by #ifndef _RUMPKERNEL, to allow including
this file in rump builds.
|
| 1.16.4.2 |
| 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.16.4.1 |
| 28-Mar-2014 |
yamt | file locore.h was added on branch yamt-pagecache on 2014-05-22 11:39:32 +0000
|
| 1.17.2.3 |
| 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.17.2.2 |
| 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.17.2.1 |
| 13-Aug-2014 |
tls | file locore.h was added on branch tls-maxphys on 2014-08-20 00:02:46 +0000
|
| 1.18.2.4 |
| 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.18.2.3 |
| 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.18.2.2 |
| 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.18.2.1 |
| 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.26.4.1 |
| 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.26.2.1 |
| 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.29.2.1 |
| 07-Apr-2018 |
pgoyette | Sync with HEAD. 77 conflicts resolved - all of them $NetBSD$
|
| 1.30.2.2 |
| 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.30.2.1 |
| 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.31.6.1 |
| 29-Feb-2020 |
ad | Sync with head.
|
| 1.34.2.2 |
| 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.34.2.1 |
| 14-Dec-2020 |
thorpej | Sync w/ HEAD.
|
