vfpreg.h revision 1.1.10.2
1 /* $NetBSD: vfpreg.h,v 1.1.10.2 2008/04/03 12:42:12 mjf Exp $ */ 2 3 /* 4 * Copyright (c) 2008 ARM Ltd 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company may not be used to endorse or promote 16 * products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY 23 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 25 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 28 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 29 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _VFPREG_H 33 #define _VFPREG_H 34 35 /* FPSID regsiter */ 36 37 #define VFP_FPSID_IMP_MSK 0xff000000 /* Implementer */ 38 #define VFP_FPSID_IMP_ARM 0x41000000 /* Implementer: ARM */ 39 #define VFP_FPSID_SW 0x00800000 /* VFP implemented in SW */ 40 #define VFP_FPSID_FMT_MSK 0x00600000 /* FLDMX/FSTMX Format */ 41 #define VFP_FPSID_FMT_1 0x00000000 /* Standard format 1 */ 42 #define VFP_FPSID_FMT_2 0x00200000 /* Standard format 2 */ 43 #define VFP_FPSID_FMT_WEIRD 0x00600000 /* Non-standard format */ 44 #define VFP_FPSID_SP 0x00100000 /* Only single precision */ 45 #define VFP_FPSID_ARCH_MSK 0x000f0000 /* Architecture */ 46 #define VFP_FPSID_ARCH_V1 0x00000000 /* Arch VFPv1 */ 47 #define VFP_FPSID_ARCH_V2 0x00010000 /* Arch VFPv2 */ 48 #define VFP_FPSID_PART_MSK 0x0000ff00 /* Part number */ 49 #define VFP_FPSID_PART_VFP10 0x00001000 /* VFP10 */ 50 #define VFP_FPSID_VAR_MSK 0x000000f0 /* Variant */ 51 #define VFP_FPSID_VAR_ARM10 0x000000a0 /* Variant ARM10 */ 52 #define VFP_FPSID_REV_MSK 0x0000000f /* Revision */ 53 54 #define VFP_FPEXC_EX 0x80000000 /* Exception status bit */ 55 #define VFP_FPEXC_EN 0x40000000 /* Enable bit */ 56 57 #define VFP_FPSCR_DN 0x02000000 /* Default NaN mode */ 58 #define VFP_FPSCR_FZ 0x01000000 /* Flush-to-zero mode */ 59 60 61 #define FPU_VFP10_ARM10E 0x410001a0 /* Really a VFPv2 part */ 62 #define FPU_VFP11_ARM11 0x410120b0 63 64 #endif /* _VFPREG_H */ 65
Indexes created Wed Oct 22 13:09:56 GMT 2025