iomd_irq.S revision 1.8.2.1
1 /* $NetBSD: iomd_irq.S,v 1.8.2.1 2008/02/18 21:04:23 mjf Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Mark Brinicombe 21 * for the NetBSD Project. 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 28 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 30 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 31 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 35 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Low level irq and fiq handlers 38 * 39 * Created : 27/09/94 40 */ 41 42 #include "opt_irqstats.h" 43 44 #include "assym.h" 45 #include <machine/asm.h> 46 #include <machine/cpu.h> 47 #include <machine/frame.h> 48 #include <arm/iomd/iomdreg.h> 49 50 .text 51 .align 0 52 /* 53 * ffs table used for servicing irq's quickly must be here otherwise adr can't 54 * reach it 55 * The algorithm for ffs was devised by D. Seal and posted to 56 * comp.sys.arm on 16 Feb 1994. 57 */ 58 .type Lirq_ffs_table, _ASM_TYPE_OBJECT; 59 Lirq_ffs_table: 60 /* same as ffs table but all nums are -1 from that */ 61 /* 0 1 2 3 4 5 6 7 */ 62 .byte 0, 0, 1, 12, 2, 6, 0, 13 /* 0- 7 */ 63 .byte 3, 0, 7, 0, 0, 0, 0, 14 /* 8-15 */ 64 .byte 10, 4, 0, 0, 8, 0, 0, 25 /* 16-23 */ 65 .byte 0, 0, 0, 0, 0, 21, 27, 15 /* 24-31 */ 66 .byte 31, 11, 5, 0, 0, 0, 0, 0 /* 32-39 */ 67 .byte 9, 0, 0, 24, 0, 0, 20, 26 /* 40-47 */ 68 .byte 30, 0, 0, 0, 0, 23, 0, 19 /* 48-55 */ 69 .byte 29, 0, 22, 18, 28, 17, 16, 0 /* 56-63 */ 70 71 /* 72 * 73 * irq_entry 74 * 75 * Main entry point for the IRQ vector 76 * 77 * This function reads the irq request bits in the IOMD registers 78 * IRQRQA, IRQRQB and DMARQ 79 * It then calls an installed handler for each bit that is set. 80 * The function stray_irqhandler is called if a handler is not defined 81 * for a particular interrupt. 82 * If a interrupt handler is found then it is called with r0 containing 83 * the argument defined in the handler structure. If the field ih_arg 84 * is zero then a pointer to the IRQ frame on the stack is passed instead. 85 */ 86 87 Ldisabled_mask: 88 .word _C_LABEL(disabled_mask) 89 90 Lcurrent_spl_level: 91 .word _C_LABEL(current_spl_level) 92 93 Lcurrent_intr_depth: 94 .word _C_LABEL(cpu_info_store) + CI_IDEPTH 95 96 Lspl_masks: 97 .word _C_LABEL(spl_masks) 98 99 LOCK_CAS_CHECK_LOCALS 100 101 AST_ALIGNMENT_FAULT_LOCALS 102 103 /* 104 * Register usage 105 * 106 * r5 - Address of ffs table 107 * r6 - Address of current handler 108 * r7 - Pointer to handler pointer list 109 * r8 - Current IRQ requests. 110 * r10 - Base address of IOMD 111 * r11 - IRQ requests still to service. 112 */ 113 114 Liomd_base: 115 .word _C_LABEL(iomd_base) 116 117 Larm7500_ioc_found: 118 .word _C_LABEL(arm7500_ioc_found) 119 120 ASENTRY_NP(irq_entry) 121 sub lr, lr, #0x00000004 /* Adjust the lr */ 122 123 PUSHFRAMEINSVC /* Push an interrupt frame */ 124 ENABLE_ALIGNMENT_FAULTS 125 126 /* Load r8 with the IOMD interrupt requests */ 127 128 ldr r10, Liomd_base 129 ldr r10, [r10] /* Point to the IOMD */ 130 ldrb r8, [r10, #(IOMD_IRQRQA << 2)] /* Get IRQ request A */ 131 ldrb r9, [r10, #(IOMD_IRQRQB << 2)] /* Get IRQ request B */ 132 orr r8, r8, r9, lsl #8 133 134 ldr r9, Larm7500_ioc_found 135 ldr r9, [r9] /* get the flag */ 136 cmp r9, #0 137 beq skip_extended_IRQs_reading 138 139 /* ARM 7500 only */ 140 ldrb r9, [r10, #(IOMD_IRQRQC << 2)] /* Get IRQ request C */ 141 orr r8, r8, r9, lsl #16 142 ldrb r9, [r10, #(IOMD_IRQRQD << 2)] /* Get IRQ request D */ 143 orr r8, r8, r9, lsl #24 144 ldrb r9, [r10, #(IOMD_DMARQ << 2)] /* Get DMA Request */ 145 tst r9, #0x10 146 orrne r8, r8, r9, lsl #27 147 b irq_entry_continue 148 149 skip_extended_IRQs_reading: 150 /* non ARM7500 machines */ 151 ldrb r9, [r10, #(IOMD_DMARQ << 2)] /* Get DMA Request */ 152 orr r8, r8, r9, lsl #16 153 irq_entry_continue: 154 155 and r0, r8, #0x7d /* Clear IOMD IRQA bits */ 156 strb r0, [r10, #(IOMD_IRQRQA << 2)] 157 158 /* 159 * Note that we have entered the IRQ handler. 160 * We are in SVC mode so we cannot use the processor mode 161 * to determine if we are in an IRQ. Instead we will count the 162 * each time the interrupt handler is nested. 163 */ 164 165 ldr r0, Lcurrent_intr_depth 166 ldr r1, [r0] 167 add r1, r1, #1 168 str r1, [r0] 169 170 /* Block the current requested interrupts */ 171 ldr r1, Ldisabled_mask 172 ldr r0, [r1] 173 stmfd sp!, {r0} 174 orr r0, r0, r8 175 176 /* 177 * Need to block all interrupts at the IPL or lower for 178 * all asserted interrupts. 179 * This basically emulates hardware interrupt priority levels. 180 * Means we need to go through the interrupt mask and for 181 * every asserted interrupt we need to mask out all other 182 * interrupts at the same or lower IPL. 183 * If only we could wait until the main loop but we need to sort 184 * this out first so interrupts can be re-enabled. 185 * 186 * This would benefit from a special ffs type routine 187 */ 188 189 mov r9, #(_SPL_LEVELS - 1) 190 ldr r7, Lspl_masks 191 192 Lfind_highest_ipl: 193 ldr r2, [r7, r9, lsl #2] 194 tst r8, r2 195 subeq r9, r9, #1 196 beq Lfind_highest_ipl 197 198 /* r9 = SPL level of highest priority interrupt */ 199 add r9, r9, #1 200 ldr r2, [r7, r9, lsl #2] 201 mvn r2, r2 202 orr r0, r0, r2 203 204 str r0, [r1] 205 206 ldr r0, Lcurrent_spl_level 207 ldr r1, [r0] 208 str r9, [r0] 209 stmfd sp!, {r1} 210 211 /* Update the IOMD irq masks */ 212 bl _C_LABEL(irq_setmasks) 213 214 mrs r0, cpsr_all /* Enable IRQ's */ 215 bic r0, r0, #I32_bit 216 msr cpsr_all, r0 217 218 ldr r7, Lirqhandlers 219 220 /* 221 * take a copy of the IRQ request so that we can strip bits out of it 222 * note that we only use 24 bits with iomd2 chips 223 */ 224 ldr r4, Larm7500_ioc_found 225 ldr r4, [r4] /* get the flag */ 226 cmp r4, #0 227 movne r11, r8 /* ARM7500 -> copy all bits */ 228 biceq r11, r8, #0xff000000 /* !ARM7500 -> only use 24 bit */ 229 230 /* ffs routine to find first irq to service */ 231 /* standard trick to isolate bottom bit in a0 or 0 if a0 = 0 on entry */ 232 rsb r4, r11, #0 233 ands r10, r11, r4 234 235 /* 236 * now r10 has at most 1 set bit, call this X 237 * if X = 0, branch to exit code 238 */ 239 beq exitirq 240 adr r5, Lirq_ffs_table 241 irqloop: 242 /* 243 * at this point: 244 * r5 = address of ffs table 245 * r7 = address of irq handlers table 246 * r8 = irq request 247 * r10 = bit of irq to be serviced 248 * r11 = bitmask of IRQ's to service 249 */ 250 251 /* find the set bit */ 252 orr r9, r10, r10, lsl #4 /* X * 0x11 */ 253 orr r9, r9, r9, lsl #6 /* X * 0x451 */ 254 rsb r9, r9, r9, lsl #16 /* X * 0x0450fbaf */ 255 /* fetch the bit number */ 256 ldrb r9, [r5, r9, lsr #26 ] 257 258 /* 259 * r9 = irq to service 260 */ 261 262 /* apologies for the dogs dinner of code here, but it's in an attempt 263 * to minimise stalling on SA's, hence lots of things happen here: 264 * - getting address of handler, if it doesn't exist we call 265 * stray_irqhandler this is assumed to be rare so we don't 266 * care about performance for it 267 * - statinfo is updated 268 * - unsetting of the irq bit in r11 269 * - irq stats (if enabled) also get put in the mix 270 */ 271 ldr r4, Lcnt /* Stat info A */ 272 ldr r6, [r7, r9, lsl #2] /* Get address of first handler structure */ 273 274 ldr r1, [r4, #(V_INTR)] /* Stat info B */ 275 276 teq r6, #0x00000000 /* Do we have a handler */ 277 moveq r0, r8 /* IRQ requests as arg 0 */ 278 adreq lr, nextirq /* return Address */ 279 beq _C_LABEL(stray_irqhandler) /* call special handler */ 280 281 #ifdef IRQSTATS 282 ldr r2, Lintrcnt 283 ldr r3, [r6, #(IH_NUM)] 284 #endif 285 /* stat info C */ 286 add r1, r1, #0x00000001 287 str r1, [r4, #(V_INTR)] 288 289 #ifdef IRQSTATS 290 ldr r3, [r2, r3, lsl #2]! 291 #endif 292 bic r11, r11, r10 /* clear the IRQ bit */ 293 294 #ifdef IRQSTATS 295 add r3, r3, #0x00000001 296 str r3, [r2] 297 #endif /* IRQSTATS */ 298 299 irqchainloop: 300 ldr r0, [r6, #(IH_ARG)] /* Get argument pointer */ 301 teq r0, #0x00000000 /* If arg is zero pass stack frame */ 302 addeq r0, sp, #8 /* ... stack frame [XXX needs care] */ 303 mov lr, pc /* return address */ 304 ldr pc, [r6, #(IH_FUNC)] /* Call handler */ 305 306 ldr r6, [r6, #(IH_NEXT)] /* fetch next handler */ 307 308 teq r0, #0x00000001 /* Was the irq serviced ? */ 309 310 /* if it was it'll just fall through this: */ 311 teqne r6, #0x00000000 312 bne irqchainloop 313 nextirq: 314 /* Check for next irq */ 315 rsb r4, r11, #0 316 ands r10, r11, r4 317 /* check if there are anymore irq's to service */ 318 bne irqloop 319 320 exitirq: 321 ldmfd sp!, {r2, r3} 322 ldr r9, Lcurrent_spl_level 323 ldr r1, Ldisabled_mask 324 str r2, [r9] 325 str r3, [r1] 326 327 bl _C_LABEL(irq_setmasks) 328 329 #if __HAVE_FAST_SOFTINTS 330 bl _C_LABEL(dosoftints) /* Handle the soft interrupts */ 331 #endif 332 333 /* Kill IRQ's in preparation for exit */ 334 mrs r0, cpsr_all 335 orr r0, r0, #(I32_bit) 336 msr cpsr_all, r0 337 338 /* Decrement the nest count */ 339 ldr r0, Lcurrent_intr_depth 340 ldr r1, [r0] 341 sub r1, r1, #1 342 str r1, [r0] 343 344 LOCK_CAS_CHECK 345 346 DO_AST_AND_RESTORE_ALIGNMENT_FAULTS 347 PULLFRAMEFROMSVCANDEXIT 348 349 /* NOT REACHED */ 350 b . - 8 351 352 Lcurrent_mask: 353 .word _C_LABEL(current_mask) /* irq's that are usable */ 354 355 ENTRY(irq_setmasks) 356 /* Disable interrupts */ 357 mrs r3, cpsr_all 358 orr r1, r3, #(I32_bit) 359 msr cpsr_all, r1 360 361 /* Calculate IOMD interrupt mask */ 362 ldr r1, Lcurrent_mask /* All the enabled interrupts */ 363 ldr r1, [r1] 364 ldr r0, Lspl_masks /* Block due to current spl level */ 365 ldr r2, Lcurrent_spl_level 366 ldr r2, [r2] 367 ldr r2, [r0, r2, lsl #2] 368 and r1, r1, r2 369 ldr r2, Ldisabled_mask /* Block due to active interrupts */ 370 ldr r2, [r2] 371 bic r1, r1, r2 372 373 ldr r0, Liomd_base 374 ldr r0, [r0] /* Point to the IOMD */ 375 strb r1, [r0, #(IOMD_IRQMSKA << 2)] /* Set IRQ mask A */ 376 mov r1, r1, lsr #8 377 strb r1, [r0, #(IOMD_IRQMSKB << 2)] /* Set IRQ mask B */ 378 mov r1, r1, lsr #8 379 380 ldr r2, Larm7500_ioc_found 381 ldr r2, [r2] 382 cmp r2, #0 383 beq skip_setting_extended_DMA_mask 384 385 /* only for ARM7500's */ 386 strb r1, [r0, #(IOMD_IRQMSKC << 2)] 387 mov r1, r1, lsr #8 388 and r2, r1, #0xef 389 strb r2, [r0, #(IOMD_IRQMSKD << 2)] 390 mov r1, r1, lsr #3 391 and r2, r1, #0x10 392 strb r2, [r0, #(IOMD_DMAMSK << 2)] /* Set DMA mask */ 393 b continue_setting_masks 394 395 skip_setting_extended_DMA_mask: 396 /* non ARM7500's */ 397 strb r1, [r0, #(IOMD_DMAMSK << 2)] /* Set DMA mask */ 398 399 continue_setting_masks: 400 401 /* Restore old cpsr and exit */ 402 msr cpsr_all, r3 403 mov pc, lr 404 405 Lcnt: 406 .word _C_LABEL(uvmexp) 407 408 Lintrcnt: 409 .word _C_LABEL(intrcnt) 410 411 412 Lirqhandlers: 413 .word _C_LABEL(irqhandlers) /* Pointer to array of irqhandlers */ 414 415 #ifdef IRQSTATS 416 /* These symbols are used by vmstat */ 417 418 .text 419 .global _C_LABEL(_intrnames) 420 _C_LABEL(_intrnames): 421 .word _C_LABEL(intrnames) 422 423 .data 424 425 .globl _C_LABEL(intrnames), _C_LABEL(eintrnames), _C_LABEL(intrcnt), _C_LABEL(sintrcnt), _C_LABEL(eintrcnt) 426 _C_LABEL(intrnames): 427 .asciz "interrupt 0 " 428 .asciz "interrupt 1 " /* reserved0 */ 429 .asciz "interrupt 2 " 430 .asciz "interrupt 3 " 431 .asciz "interrupt 4 " 432 .asciz "interrupt 5 " 433 .asciz "interrupt 6 " 434 .asciz "interrupt 7 " /* reserved1 */ 435 .asciz "interrupt 8 " /* reserved2 */ 436 .asciz "interrupt 9 " 437 .asciz "interrupt 10 " 438 .asciz "interrupt 11 " 439 .asciz "interrupt 12 " 440 .asciz "interrupt 13 " 441 .asciz "interrupt 14 " 442 .asciz "interrupt 15 " 443 .asciz "dma channel 0" 444 .asciz "dma channel 1" 445 .asciz "dma channel 2" 446 .asciz "dma channel 3" 447 .asciz "interrupt 20 " 448 .asciz "interrupt 21 " 449 .asciz "reserved 3 " 450 .asciz "reserved 4 " 451 .asciz "exp card 0 " 452 .asciz "exp card 1 " 453 .asciz "exp card 2 " 454 .asciz "exp card 3 " 455 .asciz "exp card 4 " 456 .asciz "exp card 5 " 457 .asciz "exp card 6 " 458 .asciz "exp card 7 " 459 460 _C_LABEL(sintrnames): 461 .asciz "softclock " 462 .asciz "softnet " 463 .asciz "softserial " 464 .asciz "softintr 3 " 465 .asciz "softintr 4 " 466 .asciz "softintr 5 " 467 .asciz "softintr 6 " 468 .asciz "softintr 7 " 469 .asciz "softintr 8 " 470 .asciz "softintr 9 " 471 .asciz "softintr 10 " 472 .asciz "softintr 11 " 473 .asciz "softintr 12 " 474 .asciz "softintr 13 " 475 .asciz "softintr 14 " 476 .asciz "softintr 15 " 477 .asciz "softintr 16 " 478 .asciz "softintr 17 " 479 .asciz "softintr 18 " 480 .asciz "softintr 19 " 481 .asciz "softintr 20 " 482 .asciz "softintr 21 " 483 .asciz "softintr 22 " 484 .asciz "softintr 23 " 485 .asciz "softintr 24 " 486 .asciz "softintr 25 " 487 .asciz "softintr 26 " 488 .asciz "softintr 27 " 489 .asciz "softintr 28 " 490 .asciz "softintr 29 " 491 .asciz "softintr 30 " 492 .asciz "softintr 31 " 493 _C_LABEL(eintrnames): 494 495 .bss 496 .align 0 497 _C_LABEL(intrcnt): 498 .space 32*4 /* XXX Should be linked to number of interrupts */ 499 500 _C_LABEL(sintrcnt): 501 .space 32*4 /* XXX Should be linked to number of interrupts */ 502 _C_LABEL(eintrcnt): 503 504 #else /* IRQSTATS */ 505 /* Dummy entries to keep vmstat happy */ 506 507 .text 508 .globl _C_LABEL(intrnames), _C_LABEL(eintrnames), _C_LABEL(intrcnt), _C_LABEL(eintrcnt) 509 _C_LABEL(intrnames): 510 .long 0 511 _C_LABEL(eintrnames): 512 513 _C_LABEL(intrcnt): 514 .long 0 515 _C_LABEL(eintrcnt): 516 #endif /* IRQSTATS */ 517
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